intel/brw: Use VEC for output stores

This writes the whole destination register in a single builder call.
Eventually, VEC will write the whole destination register in one go,
allowing better visibility into how it is defined.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28971>
This commit is contained in:
Kenneth Graunke
2024-01-08 22:47:35 -08:00
parent f0c29c9b71
commit d4563747d9

View File

@@ -6716,10 +6716,11 @@ fs_nir_emit_intrinsic(nir_to_brw_state &ntb,
fs_reg new_dest = retype(offset(s.outputs[instr->const_index[0]], bld,
4 * store_offset), src.type);
for (unsigned j = 0; j < num_components; j++) {
bld.MOV(offset(new_dest, bld, j + first_component),
offset(src, bld, j));
fs_reg comps[num_components];
for (unsigned i = 0; i < num_components; i++) {
comps[i] = offset(src, bld, i);
}
bld.VEC(offset(new_dest, bld, first_component), comps, num_components);
break;
}