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Erik Faye-Lund
6652eb0ec3 meson: rename meson_options.txt 
The proper name for the meson options changed to meson.options in Meson
1.1. Since we don't support older versions of Meson anyway, let's just
rename the options-file to the new name.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33445>
 2025-02-09 08:13:27 +00:00
Georg Lehmann
fd77cc7c32 ac/nir/lower_ps: move exports after packing alu 
If ACO's wqm section ends just before the first export, this mixing alu and
exports means the alu in question can't be reordered as much by the ILP
scheduler.

Foz-DB Navi31:
Totals from 8959 (11.31% of 79188) affected shaders:
Instrs: 5977212 -> 5978494 (+0.02%); split: -0.02%, +0.04%
CodeSize: 32982732 -> 32987876 (+0.02%); split: -0.01%, +0.03%
Latency: 35218073 -> 35216277 (-0.01%); split: -0.02%, +0.02%
InvThroughput: 5149751 -> 5149696 (-0.00%); split: -0.00%, +0.00%
SClause: 220552 -> 220551 (-0.00%); split: -0.01%, +0.01%
PreVGPRs: 313203 -> 313069 (-0.04%); split: -0.06%, +0.01%

Foz-DB Navi21:
Totals from 8895 (11.21% of 79377) affected shaders:
MaxWaves: 219280 -> 219272 (-0.00%); split: +0.00%, -0.01%
Instrs: 5393330 -> 5393366 (+0.00%); split: -0.00%, +0.00%
CodeSize: 29921900 -> 29922024 (+0.00%); split: -0.00%, +0.00%
VGPRs: 406664 -> 406688 (+0.01%); split: -0.00%, +0.01%
Latency: 35653975 -> 35652220 (-0.00%); split: -0.02%, +0.02%
InvThroughput: 7992134 -> 7992032 (-0.00%); split: -0.00%, +0.00%
SClause: 223784 -> 223786 (+0.00%)
Copies: 370984 -> 370983 (-0.00%)
PreVGPRs: 314323 -> 314330 (+0.00%); split: -0.01%, +0.01%
VALU: 3800023 -> 3800022 (-0.00%)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33417>
 2025-02-08 17:31:18 +00:00
Georg Lehmann
0bc1bffe9a nir/opt_move: don't move into critical sections 
Foz-DB Navi31:
Totals from 6694 (8.43% of 79377) affected shaders:
Instrs: 4125152 -> 4119037 (-0.15%); split: -0.16%, +0.01%
CodeSize: 22786832 -> 22761612 (-0.11%); split: -0.12%, +0.01%
Latency: 23343080 -> 23270421 (-0.31%); split: -0.32%, +0.01%
InvThroughput: 3449821 -> 3449859 (+0.00%); split: -0.00%, +0.00%
SClause: 176624 -> 176219 (-0.23%); split: -0.23%, +0.00%
Copies: 256709 -> 255739 (-0.38%)
PreVGPRs: 240038 -> 240251 (+0.09%)
SALU: 336732 -> 334794 (-0.58%)

Foz-DB Navi21:
Totals from 11227 (14.14% of 79377) affected shaders:
MaxWaves: 279804 -> 279796 (-0.00%)
Instrs: 6652332 -> 6650912 (-0.02%); split: -0.02%, +0.00%
CodeSize: 35974500 -> 35968152 (-0.02%); split: -0.02%, +0.00%
VGPRs: 491440 -> 491512 (+0.01%); split: -0.00%, +0.02%
Latency: 34291475 -> 34247972 (-0.13%); split: -0.15%, +0.02%
InvThroughput: 7603701 -> 7603724 (+0.00%); split: -0.00%, +0.00%
VClause: 132041 -> 132068 (+0.02%); split: -0.00%, +0.02%
SClause: 239880 -> 239438 (-0.18%); split: -0.20%, +0.01%
Copies: 530000 -> 529986 (-0.00%); split: -0.00%, +0.00%
PreVGPRs: 393471 -> 394170 (+0.18%); split: -0.00%, +0.18%
VALU: 4274980 -> 4274966 (-0.00%); split: -0.00%, +0.00%

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33417>
 2025-02-08 17:31:18 +00:00
Pavel Ondračka
4d4a3a6d6b i915: rework shader compile failures reporting 
Report compile errors from create_fs_state instead of finalize_nir.
The current way is broken, since nir_to_tgsi is called in finalize_nir,
however it can't handle lowered IO.

Fixes: dae57e184a
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12373
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33341>
 2025-02-08 15:32:01 +00:00
Marek Olšák
dc1b719e1f gallium,st/mesa: allow reporting compile failures from create_vs/fs/.._state 
This adds a proper interface for reporting shader compile failures.
They are propagated to the GLSL linker.

Reporting errors from finalize_nir will be deprecated.

Fixes: dae57e184a
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33341>
 2025-02-08 15:32:01 +00:00
Pavel Ondračka
fbffe0ecbe i915/ci: update expectations 
Most of those were likely fixed by the unconditional nir_opt_varyings,
since we are less likely to run out of input/output slots.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33341>
 2025-02-08 15:32:01 +00:00
Michel Dänzer
e4d189f26f egl/glx/sw: Check xcb_query_extension_reply return value for MIT-SHM 
For consistency with other xcb_query_extension_reply callers.

v2:
* Now with less use-after-free. (Eric Engestrom)

Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33400>
 2025-02-08 13:50:15 +00:00
Martin Roukala (né Peres)
3d6c5dc790 zink/ci: document more RADV flakes 
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33446>
 2025-02-08 13:22:13 +02:00
Martin Roukala (né Peres)
0ef08b8ccd zink/ci: mark query-rgba-signed-components as fixed on more platforms 
Fixes: 886d720c19 ("mesa: fix RGBA_SIGNED_COMPONENTS for lowered signed luminance")
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33446>
 2025-02-08 13:22:13 +02:00
Martin Roukala (né Peres)
f3b1f5ba2c turnip/ci: re-introduce the multiviewport flakes 
This is a partial revert of 5f3cad0026, as the commit did not
actually fix the flakes it claimed to do.

Fixes: 5f3cad0026 ("tu: Add missing assignment to shared_viewport")
Suggested-by: @Valentine (https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33446#note_2770035)
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33446>
 2025-02-08 13:22:13 +02:00
Martin Roukala (né Peres)
8aa22e834a radv/ci: document more Tahiti VKCTS flakes 
Now that we have a more powerful host, we started getting new flakes.
Let's document them!

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33446>
 2025-02-08 13:22:13 +02:00
Martin Roukala (né Peres)
c63041c0ed ci/b2c: fix the S3 artifact for amd64 manual vk/gl 
Fixes: 5b291c7ce6 ("ci: Move r300/nine/nvk builds out of critical path")
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33446>
 2025-02-08 13:22:13 +02:00
Pavel Ondračka
63afd265a6 ci: disable LTO for nightly debian-build-testing 
Other CI jobs are actually depending on debian-build-testing now
and there doesn't seem to be much interested in fixing LTO, so just
disable it.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Acked-by: David Heidelberg <david@ixit.cz>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12574
Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33446>
 2025-02-08 13:22:13 +02:00
Mel Henning
48edb9cec2 nak/opt_copy_prop: Force alu src for IAdd2X/IAdd3X 
Cc: mesa-stable
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Faith Ekstrand <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33420>
 2025-02-08 08:38:12 +00:00
Mel Henning
2fa557d29d nak/opt_copy_prop: Add force_alu_src_type 
This is just a code cleanup - it shouldn't change any shaders.

Cc: mesa-stable
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Faith Ekstrand <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33420>
 2025-02-08 08:38:12 +00:00
Mel Henning
a5b267980a nak/opt_copy_prop: Fix IAdd3 overflow check 
Cc: mesa-stable
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Faith Ekstrand <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33420>
 2025-02-08 08:38:12 +00:00
Rebecca Mckeever
e8c6e22e14 panvk: Enable YCbCr support for v10+ 
Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32563>
 2025-02-08 07:48:41 +00:00
Rebecca Mckeever
a9759dd0e4 panvk: Report formats not supported by HW as unsupported 
3-plane YUV 444 and 16-bit 3-plane YUV are not supported natively by
the HW. Report these formats as unsupported since we may want to switch
to native YUV support in the future.

Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32563>
 2025-02-08 07:48:41 +00:00
Rebecca Mckeever
755953d337 panvk: Split get_format_properties into format features helper functions 
This will make it easier to get the feature flags per plane for
multiplane formats.

Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32563>
 2025-02-08 07:48:41 +00:00
Rebecca Mckeever
e0f4801438 panvk: Add YCbCr sampler NIR lowering pass 
Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32563>
 2025-02-08 07:48:41 +00:00
Rebecca Mckeever
2ddd021bae panvk: Fix assertion in is_disjoint() 
We were not correctly following VUID-VkImageCreateInfo-format-01577:

If format is not a multi-planar format, and flags does not
include VK_IMAGE_CREATE_ALIAS_BIT, flags must not contain
VK_IMAGE_CREATE_DISJOINT_BIT.

Fixes: 412c2863 ("panvk: Enable multiplane images and image views")

Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32563>
 2025-02-08 07:48:41 +00:00
Rebecca Mckeever
cdf24f067e panvk: Use multiple sampler planes and one texture descriptor per plane 
Multiple sampler planes (one for luma, one for chroma) are needed to
support CONVERSION_SEPARATE_RECONSTRUCTION_FILTER_BIT.

Multiple texture descriptors (one per plane) are needed for the
downsampling in nir_vk_lower_ycbcr_tex() to work in panvk.

Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32563>
 2025-02-08 07:48:41 +00:00
Rebecca Mckeever
45657fb70f panvk: Move mali_texture_packed structs in panvk_image_view to a union 
Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32563>
 2025-02-08 07:48:40 +00:00
Rebecca Mckeever
ddbbc1d217 panvk: Update panvk_get_desc_stride prototype 
This will help set things up for multiplane samplers and textures.

Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32563>
 2025-02-08 07:48:40 +00:00
Rebecca Mckeever
9e5b6370c0 panvk: Create helper function for sampler descriptor emission 
This will help set things up for multiplane samplers.

Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32563>
 2025-02-08 07:48:40 +00:00
Rebecca Mckeever
339c58f21f panvk: Change immutable_samplers to panvk_sampler ** 
We will need vk_sampler for colorspace conversion.

Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32563>
 2025-02-08 07:48:40 +00:00
Rebecca Mckeever
53df2c2260 panvk: Move single-plane views of multiplane formats to pview.planes[0] 
Place the view plane at index 0 for single-plane views of multiplane
formats. Does not apply to YCbCr views of multiplane images since
view->vk.aspects for those will contain the full set of plane aspects.

Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32563>
 2025-02-08 07:48:40 +00:00
Rebecca Mckeever
9c4b530c49 panvk: Allow a 32-bit binding value in desc id key and use 64-bit keys 
Since the binding value can be any 32-bit number, we cannot assume that
it is <= 27 bits. We need 64-bit keys to accommodate a 32-bit binding.

This will also provide more bits to store the subdesc id, which will be
needed for multiplane texture and sampler descriptors.

Fixes: 7bea6f86 ("panvk: Overhaul the Bifrost descriptor set implementation")

Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32563>
 2025-02-08 07:48:40 +00:00
Rebecca Mckeever
1d0f44739d util/hash_table: Add _mesa_hash_table_u64_replace() 
This function updates the data of a u64 hash_table entry and is safe to
use inside a hash_table_u64_foreach() loop.

Fixes: 7bea6f86 ("panvk: Overhaul the Bifrost descriptor set implementation")

Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32563>
 2025-02-08 07:48:40 +00:00
Rebecca Mckeever
3b5114a34b vk/meta: Extend copy/fill/update helpers to support YCbCr 
Since copies happen one plane at a time, we can handle multiplanar copies
like color copies. The user gets to decide the format to use for each
plane, but the pipeline type and the optimal tile size applies to the
whole image.

Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32563>
 2025-02-08 07:48:40 +00:00
Kenneth Graunke
d06c3e21ac brw: Drop unnecessary mlen/header_size on virtual GET_BUFFER_SIZE op 
The logical send lowering code sets these, and is the code which
-should- set these.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33297>
 2025-02-08 01:07:22 +00:00
Kenneth Graunke
37a6278c9f brw: Drop INTERPOLATE_AT mlen handling from size_read() 
FS_OPCODE_INTERPOLATE_AT_{SAMPLE,SHARED_OFFSET} never have a mlen set.
They are lowered to SHADER_OPCODE_SEND in logical send lowering, at
which point they acquire an mlen, but cease to be those opcodes.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33297>
 2025-02-08 01:07:22 +00:00
Kenneth Graunke
ae60338142 brw: Lower MEMORY_FENCE and INTERLOCK in lower_logical_sends 
We teach lower_logical_sends to lower these to SHADER_OPCODE_SEND
and drop all the corresponding generator and eu_emit code.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33297>
 2025-02-08 01:07:22 +00:00
Kenneth Graunke
7b4e31b243 brw: Add latencies for HDC/RC memory fences 
We're about to start lowering these in the IR, at which point the
scheduler will see SEND instructions with fence messages.  Previously,
we handled those in the generator, and didn't handle the virtual opcodes
here, letting them fall through to the default case of 14 cycles.

These new numbers are completely fabricated, matching the times we have
for atomic operations.  This is basically what we did for LSC atomics.
While it may not be accurate, it's at least better than 14 cycles.

Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33297>
 2025-02-08 01:07:22 +00:00
Kenneth Graunke
b9de19f917 brw: Eliminate the BTI source from MEMORY_FENCE/INTERLOCK opcodes 
Memory fences do not refer to an element of a binding table.  Rather,
the reason we had "BTI" in these opcodes was to distinguish what in
modern terms are called UGM (untyped memory data cache) vs. SLM
(cross-thread shared local memory) fences.

Icelake and older platforms used the "data cache" SFID for both
purposes, distinguishing them by having a special binding table
index, 254, meaning "this is actually SLM access".  This is where
the notion that fences had BTIs came in.  (In fact, prior to Icelake,
separate SLM fences were not a thing, so BTI wasn't used there either.)

To avoid confusion about BTI being involved, we choose a simpler lie: we
have Icelake SLM fences target GFX12_SFID_SLM (like modern platforms
would), even though it didn't really exist back then.  Later lowering
code sets it back to the correct Data Cache SFID with magic SLM binding
table index.  This eliminates BTI everywhere and an unnecessary source.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33297>
 2025-02-08 01:07:22 +00:00
Kenneth Graunke
43d0ac9eb4 brw: Change destination of memory fences to UD type 
For some reason, we were using UW type for the destination of memory
fences at the generator level, while in the IR we selected UD.

There are some comments in the documentation for the message about it
writing the notification register to the destination, which is 32-bit.
Prior to Xe2, bits 31:16 were Reserved/MBZ.  But on Xe2, all 32 bits
are populated with actual data.

I don't know whether this will fix anything in practice, but it seems
like a better plan to use UD.  Often we used UW types to avoid having
the destination region of sends span too many registers, but we're in
SIMD1 here, so it shouldn't matter.

Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33297>
 2025-02-08 01:07:22 +00:00
Kenneth Graunke
c0a32af125 brw: Use correct builder size for MEMORY_FENCE/INTERLOCK virtual opcodes 
brw_memory_fence() overrides the instructions generated by the
MEMORY_FENCE or INTERLOCK opcodes to be force_writemask_all with
exec_size == 1.  But the IR was emitting it in SIMD8 (regardless
of dispatch width).  Instead, just emit the IR as SIMD1/NoMask so
the IR matches what we actually generate.  Have size_written indicate
that the entire destination is written, however, as it is ultimately
going to be a SEND that writes a whole register.

We were also using a UD register for the source of
FS_OPCODE_SCHEDULING_FENCE when the generator overrides it to UW,
so just specify UW in the IR as well so that they line up.

Also add validation for MEMORY_FENCE/INTERLOCK that we've done the
exec_size and masking right in the IR.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33297>
 2025-02-08 01:07:22 +00:00
Kenneth Graunke
accef5e8f5 brw: Replace fs_inst::target field with logical FB read/write sources 
We can just specify this as a source to the logical FB read/write
opcodes.  Notably FB reads had no sources before; now they have one.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33297>
 2025-02-08 01:07:22 +00:00
Kenneth Graunke
32dd722ff3 brw: Replace fs_inst::last_rt with a logical control source 
Rather than using a bit in the generic fs_inst data structure, we can
simply set a source on our logical FB write messages.  (We already do
so for many other cases.)

In the repclear shader, setting this wasn't actually having an effect,
as we were setting it on a SHADER_OPCODE_SEND message which ignored it.
(We had already correctly set the bit in the message descriptor.)

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33297>
 2025-02-08 01:07:22 +00:00
Kenneth Graunke
fce01b8461 brw: Drop FB_WRITE_LOGICAL_SRC_DST_DEPTH source 
This was used for legacy depth passthrough on older hardware.  Gfx9+
doesn't actually have dst depth as part of the message, which is the
only hardware brw supports these days.

It sure looks like we were setting it though...

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33297>
 2025-02-08 01:07:22 +00:00
Kenneth Graunke
7390d6189c brw: Replace fs_inst::pi_noperspective with a logical control source 
We already have logical pixel interpolator messages that get lowered
to send messages.  We can just add an extra boolean source to those
opcodes rather than sticking a opcode-specific boolean in the generic
fs_inst data structure.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33297>
 2025-02-08 01:07:22 +00:00
Kenneth Graunke
168ac07ffd brw: Eliminate fs_inst::shadow_compare 
brw_lower_logical_sends can just check for the TEX_LOGICAL_SRC_SHADOW_C
source; we don't need a generic instruction bit for this.  We used to
have one because this was handled in the generator for older hardware
before the advent of logical opcode lowering.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33297>
 2025-02-08 01:07:22 +00:00
Kenneth Graunke
df836ee895 brw: Drop unused defines 
Nothing uses these.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33297>
 2025-02-08 01:07:22 +00:00
Ian Romanick
9c133fe638 crocus: Use nir_shader_intrinsics_pass in crocus_lower_storage_image_derefs 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Suggested-by: Lionel
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33450>
 2025-02-07 23:20:16 +00:00
Ian Romanick
d2458f964f iris: Use nir_shader_intrinsics_pass in iris_lower_storage_image_derefs 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Suggested-by: Lionel
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33450>
 2025-02-07 23:20:16 +00:00
Ian Romanick
40948b9715 crocus: Add missing nir_metadata_preserve in crocus_lower_storage_image_derefs 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Fixes: f3630548f1 ("crocus: initial gallium driver for Intel gfx 4-7")
Closes: #12589
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33450>
 2025-02-07 23:20:16 +00:00
Ian Romanick
f2a01be57e iris: Add missing nir_metadata_preserve in iris_lower_storage_image_derefs 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Fixes: 26a54ae4b2 ("iris: lower storage image derefs")
Closes: #12589
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33450>
 2025-02-07 23:20:16 +00:00
Benjamin Lee
08cd331cc0 panvk: implement VK_EXT_separate_stencil_usage 
Needed for Vulkan 1.2.

The only real improvement from this is that in some situations we can
skip creating texture descriptors for image views that have a more
restrictive usage for either the depth or stencil aspect.

Signed-off-by: Benjamin Lee <benjamin.lee@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33392>
 2025-02-07 12:54:33 -08:00
Aaron Ruby
2553d60d47 gfxstream: Add common interfaces in the VirtGpuDevice to query DrmInfo 
and PciBusInfo

- Advertise the availability of these extensions, fully implemented as
guestOnly features

Reviewed-By: Gurchetan Singh <gurchetansingh@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33363>
 2025-02-07 17:08:34 +00:00
Aaron Ruby
94f8244ac8 gfxstream: Change "mesaOnly" nomenclature to be "guestOnly" 
This refers to extensions that are fully implemented by the guest driver

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33363>
 2025-02-07 17:08:34 +00:00