4ff7e64e81
gallivm: fixes for LLVM-15 opaque pointers in lp_bld_struct.c
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18334 >
2022-09-03 03:31:34 +00:00
02b9a8ba12
gallivm: fixes for LLVM-15 opaque pointers in lp_bld_format_s3tc.c
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18334 >
2022-09-03 03:31:34 +00:00
1b8c4931df
gallivm: fixes for LLVM-15 opaque pointers in lp_bld_jit_types.c
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18334 >
2022-09-03 03:31:34 +00:00
f30251ef9b
gallivm: fixes for LLVM-15 opaque pointers in lp_bld_nir_soa.c
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18334 >
2022-09-03 03:31:34 +00:00
8289ac87a4
gallivm: fixes for LLVM-15 opaque pointers in lp_bld_nir_aos.c
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18334 >
2022-09-03 03:31:34 +00:00
49c6e2fd70
gallium: drop unused macros in draw_llvm.h
...
The reason is that these macros use lp_build_struct_get(), which is
being replaced by lp_build_structure_get2() which takes the explicit
pointer type. Rather than attempt to update these unused macros, simply drop
them.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18334 >
2022-09-03 03:31:34 +00:00
3668ebf8bd
gallivm: drop unused "emit_load" in lp_llvm_buffer_member()
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18334 >
2022-09-03 03:31:34 +00:00
adf2895516
gallivm: LLVM-15 opaque pointers: disable LLVMGetElementType(ptr_type)
...
with opaque pointers, we can't query the element type of a pointer type
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18334 >
2022-09-03 03:31:34 +00:00
08615f2807
llvmpipe: fix front/back face system value in the fs
...
draw needs to inject the face information for tris in line/point fill
mode since llvmpipe only sees lines and points. But for the new style
face information (which is a system value and not an ordinary input
register) we forgot to tell draw.
Reviewed-by: Brian Paul <brianp@vmware.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18285 >
2022-09-03 03:36:25 +02:00
723ae2368f
vulkan: fixup 1.3.226 update
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18397 >
2022-09-02 23:45:21 +00:00
7e282694ed
anv: remove non present field in upstream spec
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18397 >
2022-09-02 23:45:21 +00:00
2a2766ce18
Enable .VALVE_mutable_descriptor_type in physical_device
...
Signed-off-by: Dawn Han <dawnhan@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17505 >
2022-09-02 21:15:43 +00:00
de5879447b
Track bitset when create descriptor pool
...
Signed-off-by: Dawn Han <dawnhan@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17505 >
2022-09-02 21:15:43 +00:00
d5f116feb5
Update bitset when init descriptor layout.
...
Signed-off-by: Dawn Han <dawnhan@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17505 >
2022-09-02 21:15:43 +00:00
7039467522
Increase enum type in vn_descriptor_set.
...
Signed-off-by: Dawn Han <dawnhan@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17505 >
2022-09-02 21:15:43 +00:00
250c684750
ci: uprev piglit 2022-08-30
...
Acked-by: Juan A. Suarez <jasuarez@igalia.com > # for broadcom
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com > # for zink
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com >
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18318 >
2022-09-02 20:15:28 +00:00
c93173fcec
util/perf: use ALWAYS_INLINE for tracepoints
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18309 >
2022-09-02 19:46:50 +00:00
4d747d5690
util/perf: simplify u_trace_instrument
...
When ut_perfetto_enabled changes, update _u_trace_instrument as well.
This allows u_trace_instrument to check just a single variable.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18309 >
2022-09-02 19:46:50 +00:00
18d7cb4abb
util/perf: add u_trace_instrument
...
It is called from tracepoints. When it returns false, instrumentation
is disabled.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18309 >
2022-09-02 19:46:50 +00:00
aeb2c5a8da
util/perf: remove u_trace::enabled
...
We can set ut_trace_instrument when either GPU_TRACE or
GPU_TRACE_INSTRUMENT is set. This results in one less variable to check
in tracepoints.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18309 >
2022-09-02 19:46:50 +00:00
8d8d4347e3
util/perf: ignore ut->enabled for iterators
...
With perfetto, instrumentation can be enabled in the middle of cmd
buffer recording even when ut->enabled is false. It might be better to
be consistent and ignore ut->enabled for iterators.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18309 >
2022-09-02 19:46:50 +00:00
8b15025a2b
mesa: add GLSL_SOURCE
...
many times I just want to dump glsl and not a trillion lines of IR
Reviewed-by: Emma Anholt <emma@anholt.net >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18280 >
2022-09-02 19:15:44 +00:00
9701b9098f
anv: enable EXT_mesh_shader
...
Acked-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18371 >
2022-09-02 17:40:47 +00:00
d5dedecfe7
anv: implement draw calls for EXT_mesh_shader
...
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18371 >
2022-09-02 17:40:47 +00:00
637063ffc6
anv: implement EXT_mesh_shader
...
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18371 >
2022-09-02 17:40:47 +00:00
b3354afd89
anv: replace VK_SHADER_STAGE_[TASK|MESH]_BIT_NV with VK_SHADER_STAGE_[TASK|MESH]_BIT_EXT
...
They have the same numerical values, so nothing changes.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18371 >
2022-09-02 17:40:47 +00:00
9cefaa9b6d
anv: check EXT_mesh_shader whenever NV_mesh_shader is checked
...
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18371 >
2022-09-02 17:40:47 +00:00
2e1b96bb1b
intel/compiler: implement EXT_mesh_shader
...
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18371 >
2022-09-02 17:40:47 +00:00
3ef13ef234
turnip: Treating non-d/s-write pipelines as not having d/s feedback loops.
...
A subpass in gfxbench has the depth buffer present, but not written to,
for a render pass using the depth buffer as an input attachment. We can
skip single-prim-mode and the associated "oh no don't use sysmem" in that
case.
Improves gfxbench vk-5-normal perf by 1.56193% +/- 0.0743035% (n=14).
Part of #6327 .
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18241 >
2022-09-02 16:47:02 +00:00
14911e8f83
spirv, compiler: add "bool nv" to shader_info.mesh
...
Not knowing whether we deal with the NV or EXT extension
makes implementation difficult for Intel HW.
NV support will be dropped at some point, so
this ugliness will go away eventually.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18366 >
2022-09-02 16:18:33 +00:00
7d1bcf1f55
spirv, nir: Handle EmitMeshTasksEXT opcode.
...
A task shader must use this instruction to specify the dimensions
of the launched mesh shader workgroups.
It is a terminating instruction.
When the task shader doesn't have the optional payload, use the
pre-existing launch_mesh_workgroups intrinsics.
When the task shader has a payload, use a new
launch_mesh_workgroups_with_payload_deref intrinsics which has
a deref that refers to the payload variable.
We also add this new intrinsic to nir_lower_io which lowers this
to the pre-existing explicit intrinsic.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18366 >
2022-09-02 16:18:33 +00:00
42e906485c
spirv: Support TaskPayloadWorkgroupEXT storage class.
...
Just use the task_payload NIR storage class for this.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18366 >
2022-09-02 16:18:33 +00:00
a03c30bd8d
spirv: Support the CullPrimitiveEXT mesh shader built-in.
...
This is a per-primitive builtin output which indicates that a
primitive should be culled (deleted) from the output.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18366 >
2022-09-02 16:18:33 +00:00
c5c6cef893
spirv: Support EXT_mesh_shader SetMeshOutputsEXT.
...
Use the set_vertex_and_primitive_count intrinsic to
express the number of vertices and primitives that the
mesh shader workgroup outputs.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18366 >
2022-09-02 16:18:33 +00:00
b3cc09cff3
spirv: Support EXT_mesh_shader mesh/task stages.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18366 >
2022-09-02 16:18:33 +00:00
bbebc1fb35
spirv: Add mesh_shading capability for EXT_mesh_shader.
...
Indicates support for the EXT_mesh_shader SPIR-V capabilities.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18366 >
2022-09-02 16:18:33 +00:00
f6925b8446
spirv: Support EXT_mesh_shader indices and mark them per-primitive.
...
They are not defined as per-primitive in the EXT, but they behave
like per-primitive outputs so it's easier to treat them like that.
They may still require special treatment in the backend in order to
control where and how they are stored.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18366 >
2022-09-02 16:18:33 +00:00
c315e2e718
vulkan, spirv: Update to Vulkan 1.3.226 and latest SPIR-V headers.
...
Done using the "khronos-update.py" script, leaving out parts that
are not relevant to Vulkan.
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18366 >
2022-09-02 16:18:33 +00:00
3bf3c45ae8
pan/bi: Add and use bi_num_successors helper
...
Makes a few patterns easier to read.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17794 >
2022-09-02 16:03:24 +00:00
875a34160a
pan/bi: Add and use bi_replace_src helper
...
This is a common pattern. Make it more ergonomic. With the help of Coccinelle:
@@
expression E;
expression R;
expression instruction;
@@
-instruction->src[E] = bi_replace_index(instruction->src[E], R);
+bi_replace_src(instruction, E, R);
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17794 >
2022-09-02 16:03:24 +00:00
f01ccdbf69
pan/bi: Remove assert(bi_is_ssa(dest))
...
Prior to register allocation, destinations must be in SSA form, except for the
"fake SSA" briefly used in the current RA (for which bi_is_ssa returns true
anyway). These asserts duplicate the asserts in the validator. If there's any
coverage lost here, that's just a sign the validator needs to run more often.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17794 >
2022-09-02 16:03:24 +00:00
3fbd1e97d3
pan/bi: Strengenth assert in the validator
...
We should only see SSA now.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17794 >
2022-09-02 16:03:24 +00:00
98c69de80d
pan/bi: Add and use bi_foreach_ssa_src macro
...
Frequently, we want to iterate over the SSA variables read by an instruction,
while skipping over constants and uniforms. Add and use a macro for this
pattern. A few redundant asserts are removed.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17794 >
2022-09-02 16:03:24 +00:00
d3acfd9be8
pan/bi: Simplify bi_get_index prototype
...
2/3 of its arguments are now unused.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17794 >
2022-09-02 16:03:24 +00:00
93cf569b4a
pan/bi: Remove bi_max_temp
...
This is no longer needed given the flat indexing.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17794 >
2022-09-02 16:03:24 +00:00
a4eebb556a
pan/bi: Inline node_to_index
...
One user, now trivial.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17794 >
2022-09-02 16:03:24 +00:00
46e6e99f09
pan/bi: Get rid of bi_get_node
...
Now that variables have flat naming (no more SSA/reg distinction), we can just
use .value directly. This cleans up the RA a bit.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17794 >
2022-09-02 16:03:24 +00:00
1699d98e8e
pan/bi: Remove NIR registers from the IR
...
They are now unused, so normal == SSA at this point.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17794 >
2022-09-02 16:03:24 +00:00
f6abcf534a
pan/bi: Move non-SSA liveness into RA
...
Now that non-SSA nodes are an internal implementation detail of RA, the
entrypoints should be made private to make sure no other passes use the
RA-specific liveness analysis.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17794 >
2022-09-02 16:03:23 +00:00
30528bac5a
pan/bi: Assume SSA for helper invocation analysis
...
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17794 >
2022-09-02 16:03:23 +00:00
Mihai Preda