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Author SHA1 Message Date
Sagar Ghuge 4f9314588f iris: Set CS stall bit during HIZ_CCS_WT surface fast clear 
It make sense to enable CS stall so that it guarantees that the fast
clear will start after tile cache flush has completed.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23063>
 2023-05-17 10:05:44 -07:00
Sagar Ghuge 688ee02864 anv: Set CS stall bit during HIZ_CCS_WT surface fast clear 
It make sense to enable CS stall so that it guarantees that the fast
clear will start after tile cache flush has completed.

cc: mesa-stable
closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9030

Fixes: e488773b ("anv: Fast clear depth/stencil surface in vkCmdClearAttachments"
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23063>
 2023-05-17 10:05:34 -07:00
Collabora's Gfx CI Team 241741a77a Uprev Piglit to d8c08d123fadb986e9a8a7887b922ff63fcff52e 
https://gitlab.freedesktop.org/mesa/piglit/-/compare/536975d94a40cf76a69fcfa786c2513eccd0c989...d8c08d123fadb986e9a8a7887b922ff63fcff52e

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23017>
 2023-05-17 16:13:21 +00:00
Luca Bacci 098342ce53 Add checks for NULL dxil_validator 
Fixes https://gitlab.freedesktop.org/mesa/mesa/-/issues/8718

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22141>
 2023-05-17 15:33:17 +00:00
Lionel Landwerlin 7f7b2fc53a anv: put private binding BOs into execlists 
Not doing so all the reads/writes go to the scratch page on i915.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: f9fa09ec92 ("anv/image: Add ANV_IMAGE_MEMORY_BINDING_PRIVATE")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22957>
 2023-05-17 14:59:14 +00:00
Jonathan Gray af0f7b3475 intel/dev: remove dg2 0x5698 pci id 
0x5698 is now reserved for future use

From Matt Roper in linux
3a38be31ec82 ("drm/i915/dg2: Drop one PCI ID")

Fixes: 65c9a810ee ("intel/pci_ids: Add dg2 0x5698 pci-id")
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22985>
 2023-05-17 14:08:24 +00:00
Rohan Garg 42ed0f0356 anv: drop duplicated nir_opt_dce passes 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23075>
 2023-05-17 13:26:41 +00:00
Rohan Garg b2e733a8ed anv: use the common vulkan runtime to do the heavy lifting 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23075>
 2023-05-17 13:26:41 +00:00
Mike Blumenkrantz 08279f4b17 zink: add feedback loop usage for swapchains 
affects:
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_linear_filter_color_blit

cc: mesa-stable

Reviewed-by: Joshua Ashton <joshua@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22959>
 2023-05-17 11:16:00 +00:00
Mike Blumenkrantz 1effbccc5c vulkan/wsi: add feedback loop usage to swapchain caps if supported 
this is needed by some apps

cc: mesa-stable

Reviewed-by: Joshua Ashton <joshua@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22959>
 2023-05-17 11:16:00 +00:00
James Glanville 4d188e005b pvr: Fix deferred_control_stream_flags 
Signed-off-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
 2023-05-17 08:18:26 +00:00
James Glanville fbe975e738 pvr: Fix seg fault on unused ds attachment 
Fixes:
  dEQP-VK.renderpass.suballocation.formats.r16g16_sint.input
    .dont_care.dont_care.self_dep_clear

Signed-off-by: James Glanville <james.glanville@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
 2023-05-17 08:18:26 +00:00
Oskar Rundgren 2e5fb91090 pvr: Transfer image to buffer dest rect 
In copy to buffer region, set dest rect to region size.
The rectangle must be block size adjusted in case of block compressed
format.

Fix test: dEQP-VK.api.copy_and_blit.core.image_to_buffer.regions

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
 2023-05-17 08:18:26 +00:00
Oskar Rundgren 9e91e06d45 pvr: Transfer optimisation remove unused features from API 
The transfer command "struct pvr_transfer_cmd" has support for
features not used by Vulkan: colour key, pattern, rop blit and
alpha blending

The whole "struct pvr_transfer_blit" can be removed. Also all code
related to transfer alpha blending can be removed.

This is an optimisation and doesn't fix any dEQP tests.

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
 2023-05-17 08:18:26 +00:00
Oskar Rundgren f142eae05f pvr: Transfer check valid source address mask 
The mask should be inverted.

Fixes tests in dEQP-VK.api.copy_and_blit.* using the texel unwind workaround.

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
 2023-05-17 08:18:26 +00:00
Oskar Rundgren 1f36901ad9 pvr: fix texel unwind workaround mappings 
Fix the rectangle mappings used with texel unwind workaround (unaligned address).

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
 2023-05-17 08:18:26 +00:00
Oskar Rundgren 9d7b35bf8e pvr: Transfer remove byte unwind workaround 
The byte unwind workaround can be used when source texture virtual
address doesn't meet HW requirements (is unaligned) and the pixel
format can't be changed i.e. destination is compressed. If
destination texture is not compressed the simpler texel extend
workaround can be used.

Currently byte unwind workaround has bugs so removing the
workaround fixes tests in
dEQP-VK.api.copy_and_blit.core.blit_image.simple_tests.* when they
instead use texel extend workaround.

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
 2023-05-17 08:18:26 +00:00
Oskar Rundgren 7f5920ba98 pvr: Transfer support flipped rectangle mapping 
The rectangles in "struct pvr_rect_mapping" are unsigned so a
flipped rectangle mapping isn't possible. Add new struct members
flip_x and flip_y to specify flipped mapping.

Add support for flipped rectangles in transfer copy blit path.
Support for flipped rectangles in the clip blit path is not done
in this change.

The new booleans are false by default because transfer command
"struct pvr_transfer_cmd" is zeroed on allocation in
pvr_transfer_cmd_alloc (pvr_blit.c).

Fixes:
  dEQP test case: dEQP-VK.api.copy_and_blit.core.blit_image.simple_tests
    .mirror_xy.nearest

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
 2023-05-17 08:18:26 +00:00
Oskar Rundgren 41fbe9fe8e pvr: Transfer block compressed with 3d twiddled layout 
Block compressed formats with 3d twiddled memory layout not supported.

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
 2023-05-17 08:18:26 +00:00
Oskar Rundgren 59ba5cc2d1 pvr: Transfer ignore non zero stride for twiddled surface 
Twiddled surfaces don't use stride but printing info about ignored
stride is not useful on debug driver.

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
 2023-05-17 08:18:25 +00:00
Oskar Rundgren 0e3c828fc4 pvr: PBE fix mesa pipe swizzle conversion 
The swizzle of pipe formats is described in
"struct util_format_description". The struct has array
"unsigned char swizzle[4];". The index of the array is the colour
channel  (in the order R, G, B and A). The value is what position
the colour channel is sourced from.

In PBE register settings (REG_SWIZ_CHAN[0-3]) the register index is
output channel position (and not colour). The colours are in the PBE
source channels - SWIZ_SOURCE_CHAN0 typically red.

The function pvr_get_pbe_hw_swizzle doesn't translate the swizzle
correctly. Remove function and replace with switch for each colour.
This could be done in a for loop, but there is just as much code
in the loop, it involves pointers and it's less readable for humans.
That's why I opted for this implementation.

Fixed test:
  dEQP-VK.api.copy_and_blit.core.image_to_image
    .all_formats.color.2d.r4g4b4a4_unorm_pack16.b4g4r4a4_unorm_pack16
and other with this pixel format.

Signed-off-by: Oskar Rundgren <oskar.rundgren@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22958>
 2023-05-17 08:18:25 +00:00
Samuel Pitoiset f1e339dfd6 radv: fix resetting VRS if the graphics pipeline doesn't enable it 
Otherwise the VRS state isn't reset and the graphics pipeline might
still use the previous VRS state. The VRS state will only be re-emitted
if it's different when the pipeline is bound.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9005
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23052>
 2023-05-17 07:51:18 +00:00
Pierre-Eric Pelloux-Prayer 9ba416cdc6 llvmpipe: only include old Transform includes when needed 
This fixes building with recent LLVM where these 2 .h files
were removed.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8671
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22980>
 2023-05-17 09:12:32 +02:00
Samuel Pitoiset 518425d107 radv: fix emitting VRS state with a null fragment shader 
Found this while debugging a VRS issue with Valhalla.

Fixes: 87245c6e8e ("radv: handle NULL fragment shaders when recording cmdbuf")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23050>
 2023-05-17 06:12:19 +00:00
Dave Airlie cc99fd42f6 llvmpipe/cs: refactor cs generator args to use an enum 
This was horror I should have cleaned up before, clean it up before
mesh shaders make it worse.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22788>
 2023-05-17 01:19:24 +00:00
Dave Airlie 58e7867c67 draw: move to use common sampler/image binding code 
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22788>
 2023-05-17 01:19:24 +00:00
Dave Airlie 36eb75d281 llvmpipe: move to common sampler/image binding code 
This leaves the cache stuff in place, but we should consider trying
to consolidate that.

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22788>
 2023-05-17 01:19:24 +00:00
Dave Airlie f4c8a520c2 gallivm: add common code for sample/image tracking. 
Now that the other code is consoldiated it makes sense to just
consolidate this binding code between the drivers and core

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22788>
 2023-05-17 01:19:24 +00:00
Dave Airlie d565f67747 gallivm/draw/llvmpipe: consolidate the sampler/image dynamic state fns 
These can all be the same now.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22788>
 2023-05-17 01:19:24 +00:00
Dave Airlie 5f32b2ecf5 gallivm: refactor common resources out of contexts 
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22788>
 2023-05-17 01:19:24 +00:00
Dave Airlie 90295bccc5 llvmpipe: refactor fs/cs jit structure members. 
This lines them up just like the draw ones.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22788>
 2023-05-17 01:19:24 +00:00
Dave Airlie d4b7083ab3 draw: align common members in jit context structs. 
this makes all the structs have the same baseline members for
resources and aniso_filter_table.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22788>
 2023-05-17 01:19:24 +00:00
Amber f677f64e80 freedreno: implement GL_ARB_indirect_parameters 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21593>
 2023-05-17 00:27:27 +00:00
Amber 7609f83c70 ir3, freedreno: implement GL_ARB_shader_draw_parameters 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21593>
 2023-05-17 00:27:27 +00:00
Alyssa Rosenzweig 2cc77088b9 nir: Remove legacy atomics 
The intrinsics are now totally dead and can be removed.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
 2023-05-16 22:36:22 +00:00
Alyssa Rosenzweig af69d0b1d1 nir/opt_uniform_atomics: Drop legacy atomics 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
 2023-05-16 22:36:22 +00:00
Alyssa Rosenzweig 19593f1f40 nir/opt_load_store_vectorize: Reclaim ATOMIC 
NEW_ATOMIC isn't so new anymore.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
 2023-05-16 22:36:22 +00:00
Alyssa Rosenzweig f00c464b5b nir/validate: Drop legacy atomics 
We duplicated the validation for unified vs legacy atomics, so drop the unused
latter set.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
 2023-05-16 22:36:22 +00:00
Alyssa Rosenzweig c853ae660f nir/lower_task_shader: Drop legacy atomics 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
 2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig 44d89774e0 nir/lower_io: Drop legacy atomics 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
 2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig 59e73674c3 nir: Drop legacy atomics in simple cases 
This commit drops legacy atomic support from core passes where we can simply
delete switch cases with no other changes. As such it's separated from the
more complex pass-specific commits for ease of review.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
 2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig 9456e9880f ntt: Stop handling legacy atomics 
Not seen.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
 2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig 0a4c31003d nir: Drop nir_lower_legacy_atomics 
No more users.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
 2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig c323762f9f treewide: Stop lowering legacy atomics 
There are no more producers of legacy atomics so these calls are inert.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
 2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig ec0c9706f0 ac: Produce unified atomic 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
 2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig e7bb53467b intel: Produce unified atomics 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
 2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig 1823eca74d vtn: Produce unified atomics 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
 2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig 5f082f2512 mesa/st: Produce unified atomics 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
 2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig a19660bfc7 nir/lower_printf: Produce unified atomic 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
 2023-05-16 22:36:21 +00:00
Alyssa Rosenzweig 6c8e220136 nir/lower_atomics_to_ssbo: Produce unified atomics 
This could be simplified if we unified also atomic counters, but that's out of
scope for this series.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23036>
 2023-05-16 22:36:21 +00:00