AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
150,183 Commits 1 Branch 0 Tags
4f3f245b784dbddebfe78f7cdabe8055593ec875
Commit Graph

150183 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Mike Blumenkrantz 4f3f245b78 zink: radv ci updates 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15033>
 2022-02-15 11:22:44 -05:00
Simon Ser ffdac8bfa7 vulkan/wsi/wayland: ensure added formats have flags 
A format needs to be either alpha or opaque, but can't be neither.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14874>
 2022-02-15 09:13:21 +00:00
Simon Ser 5617d5c885 vulkan/wsi/wayland: de-duplicate wsi_wl_display_add_wl_shm_format 
Re-use wsi_wl_display_add_drm_format_modifier from
wsi_wl_display_add_wl_shm_format instead of maintaining two
separate switches for DRM and shm formats.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14874>
 2022-02-15 09:13:21 +00:00
Simon Ser 1bdf350197 vulkan/wsi/wayland: introduce wsi_wl_display_add_vk_format_modifier 
This is a helper to avoid repetitive code in
wsi_wl_display_add_drm_format_modifier.

No functional changes, just refactoring.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14874>
 2022-02-15 09:13:21 +00:00
Simon Ser 8ac42a3b1b vulkan/wsi/wayland: switch from alpha/opaque bools to bitfield 
This makes the numerous wsi_wl_display_add_vk_format calls easier
to follow: "ALPHA" is easier to decode than "true, false".

No functional changes, just refactoring.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14874>
 2022-02-15 09:13:21 +00:00
Juan A. Suarez Romero 801d33b2d9 vc4/ci: update failing piglit tests 
See https://gitlab.freedesktop.org/mesa/mesa/-/issues/6038.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15012>
 2022-02-15 09:21:23 +01:00
Tapani Pälli ecc0041030 iris: fix a leak on surface states 
Cc: mesa-stable
Closes:https://gitlab.freedesktop.org/mesa/mesa/-/issues/6013

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15010>
 2022-02-15 07:06:50 +02:00
Dave Airlie cb296047f2 gallivm: fix missing cast in 4-bit blending paths. 
This got noticed on an llvm debug build.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14987>
 2022-02-15 04:09:33 +00:00
Mike Blumenkrantz b7f1f5c77d zink: ci updates 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15020>
 2022-02-15 03:33:31 +00:00
Mike Blumenkrantz e8ba9cee27 zink: always invalidate streamout counter buffer if not resuming 
this otherwise treates begin/end/begin the same as begin/pause/resume

cc: mesa-stable

fixes:
KHR-GL46.texture_view.view_classes
KHR-GL46.transform_feedback.capture_geometry_separate_test
KHR-GL46.transform_feedback.capture_vertex_separate_test
KHR-GL46.transform_feedback.query_geometry_separate_test
KHR-GL46.transform_feedback.query_vertex_separate_test

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15020>
 2022-02-15 03:33:31 +00:00
Mike Blumenkrantz 5e7f4e66cc zink: export PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15020>
 2022-02-15 03:33:31 +00:00
Mike Blumenkrantz c99bd08921 zink: map R8G8B8X8_SRGB -> R8G8B8A8_SRGB 
this fixes a weird texstore bug that seems specific to this format

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15020>
 2022-02-15 03:33:31 +00:00
Mike Blumenkrantz 89477baf95 zink: ci updates 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15018>
 2022-02-14 20:57:51 -05:00
Mike Blumenkrantz b054a233df zink: activate conditional render for compute dispatch when necessary 
fixes:
KHR-GL46.compute_shader.conditional-dispatching

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15018>
 2022-02-14 20:56:55 -05:00
Mike Blumenkrantz ef4ab90d04 zink: restart conditional render when crossing batch boundary 
this will only happen when conditional render was being used outside
of a renderpass

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15018>
 2022-02-14 20:56:55 -05:00
Mike Blumenkrantz 2cc309dd39 zink: always terminate conditional render when flushing a batch 
we might not know whether conditional render is active,
so forcibly disable when necessary

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15018>
 2022-02-14 20:56:55 -05:00
Mike Blumenkrantz 082b42fbda zink: track internal conditional render state 
this allows no-oping redundant calls

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15018>
 2022-02-14 20:56:55 -05:00
Iván Briano db48dcb4f3 intel/compiler: remove what looks like a bad rebase 
This bit in the compiler looks like it was added by accident on one of
the latest versions of the original commit, but it clearly doesn't
belong there.

Fixes: 03e1e19246 ("anv: Refactor descriptor copy")

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15016>
 2022-02-15 01:04:47 +00:00
Dave Airlie 127bcbed18 gallivm/st/lvp: add flags arg to get_query_result_resource api. 
Currently this just has wait, but in order to get the right answer
for vulkan partial, lavapipe/llvmpipe need to pass a partial flag
through here in the future.

This just changes the API so that's possible.

v2: use an enum (zmike)

Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15009>
 2022-02-15 10:12:01 +10:00
Emma Anholt b995a8eba4 nir_to_tgsi: Add support for FBFETCH. 
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15014>
 2022-02-14 22:06:37 +00:00
Emma Anholt eaf6e3d3af nir_to_tgsi: Don't vectorize 64-bit instructions, to keep virgl happy. 
virglrenderer makes invalid shaders when faced with vector 64-bit
instructions, which GLSL-to-TGSI never produced.  While this doesn't fix
everything, it does get more tests running, and virgl probably the primary
consumer of 64-bit TGSI.  virgl may be deprecating its host 64-bit
support, at which point we can drop this workaround.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15014>
 2022-02-14 22:06:37 +00:00
Emma Anholt 036d7172c2 virgl: Move double operands to a temp to avoid double-swizzling bugs. 
virglrenderer applies the swizzle when packing doubles.  Since we use scan
now, we can just use the file count for texture detection.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15014>
 2022-02-14 22:06:37 +00:00
Emma Anholt e643cb40a3 virgl: Move tex immediate operands to a temp to avoid virglrenderer bug. 
Prior to the noted MR, virglrenderer encoded the tex operands in a
limited-size temp buffer which we could easily overflow with TGSI
immediates.  GLSL-to-TGSI always emitted an extra MOV, so keep that
behavior when nir-to-tgsi feeds us more optimized TGSI.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15014>
 2022-02-14 22:06:37 +00:00
Emma Anholt bc912bace1 virgl: Add workarounds for virglrenderer input/sv signedness bugs. 
GLSL-to-TGSI would emit some MOVs that made things OK, but NTT
successfully copy-propagates the inputs and sysvals more, triggering bugs
in virglrenderer when the signedness of the input is different from that
of the ALU op.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15014>
 2022-02-14 22:06:37 +00:00
Emma Anholt f25ccac374 virgl: Apply TGSI transforms to compute shaders, too. 
We need to do this for the upcoming virglrenderer workarounds.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15014>
 2022-02-14 22:06:37 +00:00
Emma Anholt c491afaeab virgl: Add a workaround for virglrenderer output writemask bugs. 
Various workaround paths in virglrenderer assume that outputs are written
with a full writemask, which is not required by TGSI.  To work around
that, store affected outputs in a temp and do a full write after each
writemasked write.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15014>
 2022-02-14 22:06:37 +00:00
Emma Anholt 2fd9e072ce virgl: Work around old virglrenderer's BARRIER counting bug. 
One less regression from doing nir-to-tgsi on CI's virglrenderer.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15014>
 2022-02-14 22:06:37 +00:00
Emma Anholt af19774dd4 tgsi_translate: Make the procType public when translating. 
This means that tgsi_translate users can check the PIPE_SHADER stage
without having to separately tgsi_scan().

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15014>
 2022-02-14 22:06:37 +00:00
Igor Torrente e5405e6400 venus: Exposes VK_EXT_4444_formats extension 
Allows venus to passthrough the VK_EXT_4444_formats extension to
the vulkan client.

And add code to the device initialization and feature query
functions.

Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Signed-off-by: Igor Torrente <igor.torrente@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14954>
 2022-02-14 21:56:22 +00:00
Yiwei Zhang 2a87a741ae turnip: advertise VK_EXT_queue_family_foreign 
Both Venus and Android AHB requires this extension.

Turnip ignores VK_SHARING_MODE_EXCLUSIVE so this is a no-op.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Acked-by: Rob Clark <robdclark@chromium.org>
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14836>
 2022-02-14 21:27:35 +00:00
Danylo Piliaiev 0b2da9d795 ir3: Limit the maximum imm offset in nir_opt_offset for shared vars 
STL/LDL have 13 bits to store imm offset.

Fixes crash in CS compilation in Monster Hunter World.

Fixes: b024102d7c
("freedreno/ir3: Use nir_opt_offset for removing constant adds for shared vars.")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14968>
 2022-02-14 20:56:46 +00:00
Marcin Ślusarz b6557b80a5 intel/compiler: fix array & struct IO lowering in mesh shaders 
We really need offsets to be in dwords, not in vec4s.

The bug manifests as random failure of func.mesh.clipdistance.5 crucible
test, where stores to gl_MeshVerticesNV[x].gl_ClipDistance[4+n] actually write to
gl_MeshVerticesNV[x].gl_ClipDistance[1+n].

Fixes: 1f438eb033 ("intel/compiler: Implement Mesh Output")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14997>
 2022-02-14 19:18:23 +00:00
Timur Kristóf e6cfd1ed64 spirv: Create PRIMITIVE_INDICES for NV_mesh_shader on-demand. 
The shader can have SpvOpWritePackedPrimitiveIndices4x8NV while the
output variable may not exist. This seems to be a defect in the
NV_mesh_shader SPIR-V spec, let's work around it by creating the
variable on-demand.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15005>
 2022-02-14 11:13:45 +01:00
Timur Kristóf 0445802ab2 compiler: Extract num_mesh_vertices_per_primitive function. 
Prevent code duplication.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15005>
 2022-02-14 11:13:42 +01:00
Samuel Pitoiset 32155851f1 radv: remove set but unused radv_buffer::shareable 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14937>
 2022-02-14 09:28:17 +00:00
Samuel Pitoiset af420833f0 radv: remove useless NULL checks in vkBind{Buffer,Image}Memory2() 
The memory object must be a valid vkDeviceMemory handle.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14937>
 2022-02-14 09:28:17 +00:00
Samuel Pitoiset 2dcd12f38b radv: fix finding shaders by PC 
Shaders are allocated contiguously in memory for a pipeline and
the freelist.next pointer is a pointer to the pipeline now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14950>
 2022-02-14 08:31:14 +01:00
Samuel Pitoiset 306e153c18 radv: make the trap handler shader BO resident 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14950>
 2022-02-14 08:31:12 +01:00
Samuel Pitoiset a224b7a057 radv: fix allocating/uploading the trap handler shader 
Since shaders are allocated per pipeline, the trap handler shader
was not uploaded at all.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14950>
 2022-02-14 08:31:10 +01:00
Shmerl da8c2f5ed3 docs/features: Mark VK_KHR_ray_query in progress 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15000>
 2022-02-12 19:18:13 -05:00
Ilia Mirkin 3d41414d26 freedreno/ir3: split up load/store/atomic by generation 
Some bits are slightly different on a4xx. Use the encodings that work.
Perhaps these can be combined at some point if we get a proper
understanding of what they mean.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14789>
 2022-02-12 13:46:11 -05:00
Ilia Mirkin b91b036322 isaspec: add gen-based leaf bitset separation 
This is necessary for some ops which have slightly different encoding on
a4xx/a5xx, but are otherwise identical. This helps keeping the compiler
from having to worry about these details and creating separate ops.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14789>
 2022-02-12 13:46:07 -05:00
Ilia Mirkin 40468430a4 isaspec: fix gen_max to be 2^32-1 
The minus sign has higher preference than shift:

>>> 1 << 32 - 1
2147483648
>>> (1 << 32) - 1
4294967295

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14789>
 2022-02-12 13:45:57 -05:00
Alyssa Rosenzweig 9dc30f99ae panfrost: Flesh out the Shader Program Descriptor 
Only breaking change since Bifrost is that the shader contains barrier? flag is
now fragment-only, meaning it is just a spawn helper threads flag. This affects
compute shaders slightly.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15003>
 2022-02-12 09:32:55 -05:00
Alyssa Rosenzweig 60b37424d9 panfrost: Simplify Valhall preload descriptor 
Honestly, we could stand to do the same to Bifrost...

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15003>
 2022-02-12 09:32:55 -05:00
Alyssa Rosenzweig 1e9a35648a panfrost: Clarify unknowns in z/stencil descriptor 
Depth culling and clamping.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15003>
 2022-02-12 09:32:55 -05:00
Alyssa Rosenzweig 733d5f061d panfrost: Add more fields to Attribute Descriptor 
More XML

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15003>
 2022-02-12 09:32:35 -05:00
Alyssa Rosenzweig b31f6a821d panfrost: Update primitive descriptor for Valhall 
Contains stuff needed for layered rendering. Unfortunately, there's no more
provoking vertex per draw -- ugh! That's fine for Vulkan (just don't set
provokingVertexModePerPipeline), but requires inserting extra flushes on desktop
OpenGL.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15003>
 2022-02-12 09:32:18 -05:00
Bas Nieuwenhuizen d8d32cf773 radv: Only wait on CS/PS to finish if we wait on a semaphore. 
I think plain submission doesn't need it.

Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14574>
 2022-02-11 23:45:24 +00:00
Bas Nieuwenhuizen 79131b6ee6 radv: Fix preamble argument order. 
Used the wrong cmdbuffer in the wrong situation. Oops.

Fixes: 915e9178fa ("radv: Split out commandbuffer submission.")
Reviewed-By: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14574>
 2022-02-11 23:45:24 +00:00