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Author SHA1 Message Date
Marek Olšák 3dd3f2f889 ac/nir/lower_ngg_gs: build streamout after lowering intrinsics 
Streamout will require prerast info, which is gathered by
lower_ngg_gs_intrinsics.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35351>
 2025-06-28 08:20:25 +00:00
Marek Olšák 83dc5917fe ac/nir: lower ClipVertex before all position exports 
just code reordering (position exports should be at the end for perf)

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35351>
 2025-06-28 08:20:25 +00:00
Marek Olšák c9b6a95038 ac/nir: remove the done parameter from ac_nir_export_position 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35351>
 2025-06-28 08:20:25 +00:00
Marek Olšák 7c3760201d ac/nir/lower_ngg: never export edge flags via position exports 
It has no effect, but the extra export instructions is unnecessary and
we can't gather the effective number of position exports from NIR if we
insert incorrect exports.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35351>
 2025-06-28 08:20:25 +00:00
Lionel Landwerlin a742b859bd anv: add support for handling wa_18019110168 with gfx-libs 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35103>
 2025-06-28 05:55:35 +00:00
Lionel Landwerlin fcf4401824 brw: handle wa_18019110168 with independent shader compilation 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35103>
 2025-06-28 05:55:35 +00:00
Lionel Landwerlin bc8d18aee2 brw: make a helper for vertex attribute offset computation 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35103>
 2025-06-28 05:55:34 +00:00
Lionel Landwerlin 8fabcd754f brw: move primitive_id_index field in fs_msaa 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35103>
 2025-06-28 05:55:34 +00:00
Lionel Landwerlin 6336cf0ea2 brw: store the remapping table for wa_18019110168 in constant data 
That way it can be accessed at runtime.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35103>
 2025-06-28 05:55:33 +00:00
Lionel Landwerlin e1a7eb1718 brw: extract out attribute register remapping 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35103>
 2025-06-28 05:55:33 +00:00
Lionel Landwerlin 5cc66e2c8d anv/brw: move Wa_18019110168 handling to backend 
We simplify the implementation by assuming the worse case, copying
entire per-vertex regions if necessary.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35103>
 2025-06-28 05:55:32 +00:00
Lionel Landwerlin 8e7e0ef75a anv: make Wa_18019110168 deal with dynamic provoking vertex 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35103>
 2025-06-28 05:55:32 +00:00
Lionel Landwerlin f0f4f9c566 brw: fix vertex attribute offset computation 
The formula uses scalar indices (4bytes), not slots (16bytes).

We also incorrectly passed a scalar (vertex case) & slot (mesh case)
offset in the push constants. Use slots instead so that the value is
smaller and we can pack more stuff into fs_msaa_flags.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 18bbcf9a63 ("intel: introduce new VUE layout for separate compiled shader with mesh")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35103>
 2025-06-28 05:55:31 +00:00
Lionel Landwerlin 4b5539a0cb brw: fix set_range on load_per_primitive_output 
load intrinsics don't have range

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 18bbcf9a63 ("intel: introduce new VUE layout for separate compiled shader with mesh")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35103>
 2025-06-28 05:55:31 +00:00
Rob Clark 7fd99c88b9 freedreno/a6xx: The great register renaming 
Align register names to internal docs to avoid having to mentally remap
register names between the names we invented over the years and what
they are actually called.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35803>
 2025-06-27 23:08:32 +00:00
Rob Clark a8c052ca9d freedreno: Rename IBO -> UAV 
Internally, adreno uses dx terminology, and calls these UAVs.  Rename to
match.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35803>
 2025-06-27 23:08:31 +00:00
Rob Clark 12530fb8df freedreno/registers: Some reg64 conversion 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35803>
 2025-06-27 23:08:30 +00:00
Rob Clark f55d8fa62e freedreno/registers: Fix a couple missing variants 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35803>
 2025-06-27 23:08:29 +00:00
Rob Clark 79d2014d8b freedreno/a6xx: Fix SP_CS_IBO address on a7xx 
This moved to accomidate the additional BINDLESS_BASE registers, and we
overlooked that when adding a7xx support.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35803>
 2025-06-27 23:08:28 +00:00
Rob Clark 029270f9c1 freedreno/decode: Add a simple util to dump csv reg list 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35803>
 2025-06-27 23:08:28 +00:00
Faith Ekstrand f6bdb8cd06 nvk/copy: Set the gob_kind for tiled copies on Blackwell+ 
This is needed on blackwell to deal with kind/bpp interactions.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35807>
 2025-06-27 21:52:08 +00:00
Dave Airlie a428835681 nouveau/headers: add a hacked up clc9b5 dma-copy 
This adds some hacked up dma-copy bits needed for blackwell
until nvidia can release the class.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35807>
 2025-06-27 21:52:08 +00:00
Faith Ekstrand 6594a11dfe nil: Remove some unused renames from cbindgen.toml 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35807>
 2025-06-27 21:52:07 +00:00
Faith Ekstrand 50a0f9bd88 nil: Add a new GOBType for Z24 on Blackwell+ 
It's a different memory layout from Ada and earlier.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35807>
 2025-06-27 21:52:07 +00:00
Faith Ekstrand f6ff11a594 nil: Reorder the checks in GOBType::choose() again 
Match on HW generation first.  Blackwell is so totally different that it
doesn't make sense to share any code with the others.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35807>
 2025-06-27 21:52:07 +00:00
Faith Ekstrand 6fbd6a52ca nak: Use fswzadd.ndv on Blackwell+ 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35795>
 2025-06-27 21:23:25 +00:00
Faith Ekstrand b4c05a8402 nak: Add a TexDerivMode to OpFSwz and OpFSwzAdd 
Even on Blackwell, this is a single bit but we might as well use the
enum for it so it's consistent with tex ops.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35795>
 2025-06-27 21:23:25 +00:00
Faith Ekstrand 4ac4bd62c8 nak: Add a new TexDerivMode enum and plumb it through 
For most generations, this is just plumbing through a false bit.  But on
Blackwell, we need to set .dxy at least in compute shaders.

Also, we had a bunch of .NDV comments on OpTxd but it has never existed
there on ahy hardware generation, it's just a left-over from trying to
copy+paste from codegen.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35795>
 2025-06-27 21:23:24 +00:00
Faith Ekstrand c6ad70551b nak: Tell NIR to lower invalid implicit LODs 
I think NVIDIA hardware more or less does this for us for free but it's
nice to have NIR make sure.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35795>
 2025-06-27 21:23:24 +00:00
Faith Ekstrand 13935c955c nak: Add better is_blackwell*() helpers 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35795>
 2025-06-27 21:23:24 +00:00
Faith Ekstrand cb9e458d29 nak: Rework printing of TexLodMode 
Puth the "." in the Display implementation like other modifiers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35795>
 2025-06-27 21:23:24 +00:00
Faith Ekstrand 59f4c8dac2 nak: Use set_ureg_src() for Blackwell texture offsets and handles 
Also add handles (they're currently missing).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35795>
 2025-06-27 21:23:24 +00:00
Dave Airlie 45bd5502f5 nak: Add misc Blackwell tex encoding bits 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35795>
 2025-06-27 21:23:24 +00:00
Dave Airlie 06e8db646a nouveau: workaround linear/z rendering interaction 
nvidia hardware can't render to linear surfaces except under some
very limited circumstances, one of those is if Z is enabled.

However there appears to be some combination of gnome-shell, and
prime (with 2 nouveau cards) where we end up getting through the
GL API to the situation where we try this. This in a production
build causes the kernel to crash with a GR error.

However there existed a period of time where the hw/kernel due to
some other random hw misconfiguration didn't crash when this happened
and doing this was prefect fine. (linear + tiled Z).

This restores the userspace code to do this and just ignores the
Z buffers if we are asked for linear rendering, and seems sufficient
to fix the problem.

I do understand this is a workaround, but I think it's reasonable to
add to the nouveau GL driver at this time since we don't want to
maintain if for ever and it probably should fix a bunch of wierd
user problems with multi gpu and nouveau.

Cc: mesa-stable
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35221>
 2025-06-27 21:09:13 +00:00
Yiwei Zhang 5dc3708e97 panvk: refactor swapchain image alias bind 
This is to prepare for ANB support.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35779>
 2025-06-27 16:16:31 +00:00
Yiwei Zhang 827108ab7d panvk: refactor panvk_image to track panvk_device_memory instead of bo 
Since we have already dropped the refcounting there, replacing with a
back pointer to the device memory makes it clear we don't hold any ref.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35779>
 2025-06-27 16:16:31 +00:00
Alyssa Rosenzweig 1fd993388e hk: fix gs static topology + indirect draw 
Fixes: 5640266eb3 ("agx/nir_lower_gs: rework gs rast shape handling")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35797>
 2025-06-27 15:31:49 +00:00
Alyssa Rosenzweig 1c4eb71cbc libagx: port pre-GS to CL 
in prep for changing the compile flow for it.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35797>
 2025-06-27 15:31:49 +00:00
Alyssa Rosenzweig dff1230879 agx/nir_lower_gs: remove random idiv const call 
should be fixed in the agx backend now

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35797>
 2025-06-27 15:31:49 +00:00
Alyssa Rosenzweig 73659b4f67 agx/nir_lower_gs: CLify more XFB code 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35797>
 2025-06-27 15:31:48 +00:00
Alyssa Rosenzweig 10554ccad2 agx/nir_lower_gs: rework XFB prim calculation 
significant instr count reduction for many outputs in a buffer.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35797>
 2025-06-27 15:31:48 +00:00
Alyssa Rosenzweig 46e139d453 libagx: optimize xfb offset pointers 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35797>
 2025-06-27 15:31:47 +00:00
Alyssa Rosenzweig 2544259030 asahi,hk,libagx: drop null checks 
instead require scratch addresses be passed.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35797>
 2025-06-27 15:31:45 +00:00
Alyssa Rosenzweig 222ffc352e hk: eliminate null_sink 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35797>
 2025-06-27 15:31:45 +00:00
Alyssa Rosenzweig fa21722f1c asahi: use zero/scratch page for null textures 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35797>
 2025-06-27 15:31:44 +00:00
Alyssa Rosenzweig db2891ec5f hk,asahi: move scratch BO to common 
gl needs this too.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35797>
 2025-06-27 15:31:44 +00:00
Alyssa Rosenzweig d3adef3164 agx: defer nir_opt_idiv_const 
noticed in GS work.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35797>
 2025-06-27 15:31:43 +00:00
David Rosca 53e3e44eb3 frontends/va: Fix SyncSurface when used to sync coded buffer 
This would skip the coded buffer fence wait if the surface fence is NULL.

Fixes: 0f20a3a4f1 ("frontends/va: Add surface pipe_fence for vl_compositor rendering")
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35782>
 2025-06-27 15:17:08 +00:00
Eric R. Smith 65bc0f715e panvk: add a driConf to force enable atomics in shaders 
This is mainly useful for enabling validation layers, but might also
be useful for a few apps that use very basic atomic operations. In
general these operations do not work properly in Bifrost, but they
work well enough to e.g. pass some piglit tests.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35710>
 2025-06-27 14:48:16 +00:00
Erik Faye-Lund fcd2fbfdfd panfrost/ci: fix up msaa fails... again 
I should really have performed a full run here rather than just copying
the failures from a recent run... poorly.

Fixes: 8e646739baf ("panfrost/ci: add new 8x/16x msaa fails on t760")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35716>
 2025-06-27 14:18:39 +00:00