AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
141,245 Commits 1 Branch 0 Tags
3da170faaec2a57d76e668ab56781621c23c6703
Commit Graph

141245 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Andres Gomez
07b86e64a5 ci: add VKD3D-Proton testsuite job for radv's Navy Flounder 
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10870>
 2021-05-25 17:03:25 +00:00
Andres Gomez
44b085375c ci: add VKD3D-Proton testsuite runner 
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10870>
 2021-05-25 17:03:25 +00:00
Andres Gomez
fb8a4d89a2 ci: include VKD3D-Proton tests into the VK test container 
Instead of installing the distribution package, build and install
locally, including the tests.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10870>
 2021-05-25 17:03:25 +00:00
Andres Gomez
537c9460fa ci: add radv's trace job for Navy Flounder 
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10870>
 2021-05-25 17:03:25 +00:00
Andres Gomez
a71ffa4592 ci: uprev DXVK to 1.8.1 
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10870>
 2021-05-25 17:03:25 +00:00
Andres Gomez
d0e6863bf1 ci: uprev apitrace to 10.0 
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10870>
 2021-05-25 17:03:25 +00:00
Andres Gomez
fa8ca10e27 ci: remove radv's trace job for Polaris10 
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10870>
 2021-05-25 17:03:25 +00:00
Andres Gomez
f0f812dbe7 ci: update radv's trace job tag for Raven 
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10870>
 2021-05-25 17:03:25 +00:00
Chia-I Wu
62014aeccd util/u_thread: fix u_thread_setname for long names 
"WSI swapchain queue", set by vulkan/wsi/x11, is longer than 15
characters.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10935>
 2021-05-25 16:39:02 +00:00
Marek Olšák
7844bdadac radeonsi: remove DFSM after we discovered how bad it is 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
56a450e984 radeonsi: disable DFSM on gfx9 by default because it decreases performance a lot 
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
2fad90dc4a radeonsi: implement threaded context callbacks for resource busy checking 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
9ba17ec21a radeonsi: generate buffer_id_unique for u_threaded_context 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
9dc7fff448 radeonsi: allow changing the NGG subgroup size to 256 but don't change it yet 
Currently, 128 seems to have the best performance.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
13acbaecd8 radeonsi: rewrite the prefix sum computation for shader culling 
Instead of storing the vertex mask per wave into LDS and then computing
the prefix sum, store 8-bit bitcounts (vertex counts) of the vertex masks
into LDS. This allows us to compute the sum using v_sad_u8, which computes
a sum of 4 i8vec4 components in one instruction.

Each i8vec4 of vertex counts is loaded in parallel threads (one dword
per thread) instead of all being loaded in thread 0, and readlane copies
them to SGPRs instead of readfirstlane.

LDS is no longer initialized before culling. Instead, the counts for
inactive waves are masked with AND later.

Incorrect old comments are also fixed.

This change removes 80 bytes from the code size, and it allows increasing
the workgroup size from 128 to 256. (which is the main motivation for this)

Now changing the workgroup size with wave64 has no effect on the code size.
Switching to wave32 with 8 waves even generates slightly smaller code than
wave64 with 4 waves.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
27c9e77c6a radeonsi: add missing threaded_resource_deinit calls in fail paths 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
64b75cc12e radeonsi: add a gfx10 hw bug workaround with the barrier before gs_alloc_req 
Fixes: 8845a23698 - amd: add NAVI10 PCI IDs

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
712f74f590 radeonsi: remove 8 bytes from si_resource, turn other 4 bytes into padding 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
5af124c92c radeonsi: change si_resource::alignment to alignment_log2 for better packing 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
0c8d65a39a radeonsi: improve generated culling code by adding optimization barriers 
This removes a lot of instructions and 16 bytes from the code size.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
980a70573f radeonsi: re-enable fast launch with indexed tri strips because it doesn't hang 
I don't know which change fixed this, but I can't reproduce the hang anymore.

Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
a0fcd37731 radeonsi: remove a twice duplicated workaround for VERT_GRP_SIZE 
This enables better lane occupancy.

Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
c8e8979d6b radeonsi: fix the fast launch vert/prim thread counts if they are trimmed 
This fixes the case when the counts were out of sync because one of them
was decreased.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
f6e19fd831 radeonsi: don't use GS fast launch with small instances 
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
e33e525e16 radeonsi: don't disable L2 caching for staging textures 
Uncached access can be slow if the box is not aligned nicely.
Also, caching in L2 might enable bigger PCIe bursts.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
36e07198a7 radeonsi: always use the L2 LRU cache policy for faster clears and copies 
Waves and CP DMA can finish sooner if L2 doesn't do any evictions, which
is hard to predict.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
805c785314 radeonsi: fix a coherency issue when VS memory stores are not visible in PS 
If a shader has no param exports (no varyings), the pixel shader can start
after the VS position is written before the vertex shader finishes.
The fix is to wait for the memory stores before the position export.

The code needs to be restructured. First prepare param exports to get
nr_param_exports, then emit position exports with the wait, and then
emit param exports.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
d8fefb1322 radeonsi: add a gfx10 bug workaround for NOT_EOP 
Fixes: cc24ec8c07 - radeonsi: set NOT_EOP for back-to-back draws on gfx10+

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
7effb291e6 radeonsi: handle PIPE_CAP_MAX_VERTEX_BUFFERS 
no change in behavior because the value is the same as the default

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
c7e731c737 radeonsi: remove unused SI_IMAGE_ACCESS_AS_BUFFER 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
66c8e40d69 winsys/amdgpu: don't hold a mutex while accessing is_shared 
It adds overhead to amdgpu_bo_wait and I'm not sure whether the mutex
is even needed.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
4602147561 ac/llvm: don't draw the primitive for the dummy export workaround for Navi1x 
for conservative rasterization

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
f33500b187 ac/llvm: set range metadata on mbcnt and deduplicate get_thread_id 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
57e182c75b ac/llvm: allow ac_build_optimization_barrier with SGPRs, pointers, and metadata 
sgpr=true prevents moving the value to a VGPR.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
5f33f80dc7 ac/llvm: expose set_range_metadata to more users 
I sometimes use it for experiments. It will be used later.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
94a1f45e15 ac/llvm: set target features per function instead of per target machine 
This is a cleanup that allows the removal of the wave32 target machine and
the wave32 pass manager.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
38d3c4251d ac/gpu_info: set has_zero_index_buffer_bug for Navi12 too 
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
fbecc47430 amd: fix incorrect addrlib comment for HTILE equations 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
ade5d9c2a7 amd/registers: regenerate json files without 32-bit register fields 
Only a few of those were used in drivers.

Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:44 +00:00
Marek Olšák
72362f2830 amd/registers: don't generate 32-bit register fields 
This removes confusing register types due to deduplication, such as:
   "name": "SQ_WAVE_TTMP10",
   "type_ref": "SPI_SHADER_USER_DATA_PS_0"

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:43 +00:00
Samuel Pitoiset
287c06228c radv: remove an useless TODO for dynamic line width 
We can't do anything it seems.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10881>
 2021-05-25 14:11:44 +00:00
Samuel Pitoiset
eaef5c2934 radv: ignore dynamic blend constants if blend isn't enabled 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10881>
 2021-05-25 14:11:44 +00:00
Timur Kristóf
c783293e47 aco: Don't eliminate exec write when it's used by a copy later. 
Fixes: bc13049747
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10920>
 2021-05-25 13:50:43 +00:00
Alyssa Rosenzweig
5f8778a583 panfrost: Add message preload to pan_shader_info 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10967>
 2021-05-25 13:10:37 +00:00
Alyssa Rosenzweig
821b80d68a panfrost: Add Message Preload descriptor XML 
New to v7, allows executing up to +LD_VAR_IMM or +VAR_TEX instructions
before starting the shader.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10967>
 2021-05-25 13:10:37 +00:00
Alyssa Rosenzweig
84cda22b13 panfrost/ci: Run jobs with PAN_MESA_DEBUG=sync 
This way if there's a fault, the pipeline won't accidentally pass
and let bugs slip into main. This seems to have occurred on both T720
and G72, leading to flakes on both. I want flakeless CI, so this is a
step in eliminating flakes before they hit the tree.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10938>
 2021-05-25 12:55:15 +00:00
Alyssa Rosenzweig
949343f8ef panfrost/ci: Remove reference to dated flag 
This was removed ages ago, nobody updated it.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10938>
 2021-05-25 12:55:15 +00:00
Alyssa Rosenzweig
98b2f97702 panfrost/ci: Disable terrain trace 
It's reliably faulting in CI but not locally, and I can't figure out
what the difference could possibly be. Regardless I can't fix the fault
otherwise, and faultless CI matters more than losing a single trace
(from an app I manually test anyway).

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10938>
 2021-05-25 12:55:15 +00:00
Alyssa Rosenzweig
ac1ee2bebe panfrost: Increase tiler_heap max allocation to 64MB 
We previously allocated only 16MB, but this isn't always enough. Now
that we have growable (heap) on recent kernels, there's not much reason
to try to shrink this allocation.

Fixes OUT_OF_MEMORY fault on furmark trace.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10938>
 2021-05-25 12:55:15 +00:00
Alyssa Rosenzweig
95337edcd7 panfrost: Remove minimal mode 
Superseded by abort-on-fault. It didn't work correctly in the presence
of MMU faults anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10938>
 2021-05-25 12:55:15 +00:00