AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
141,245 Commits 1 Branch 0 Tags
3da170faaec2a57d76e668ab56781621c23c6703
Commit Graph

141245 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Mike Blumenkrantz 3fc8da13f6 zink: flag exact alu op results in ntv with NoContraction 
this propagates the exact flag and ensures precision isn't lost during
optimizations

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8660>
 2021-02-12 23:25:40 +00:00
Daniel Schürmann 8b793f9567 aco: remove dead code for the handling of exec temporaries 
Totals from 26026 (18.67% of 139391) affected shaders (Navi10):
PreSGPRs: 370993 -> 326177 (-12.08%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8870>
 2021-02-12 22:41:31 +00:00
Daniel Schürmann a56ddca4e8 aco: make all exec accesses non-temporaries 
So that they are not counted into the register demand.

Totals from 107336 (77.00% of 139391) affected shaders (Navi10):
VGPRs: 4023452 -> 4023248 (-0.01%); split: -0.01%, +0.01%
SpillSGPRs: 14088 -> 12571 (-10.77%); split: -11.03%, +0.26%
CodeSize: 266816164 -> 266765528 (-0.02%); split: -0.04%, +0.02%
MaxWaves: 1553339 -> 1553374 (+0.00%); split: +0.00%, -0.00%
Instrs: 50977701 -> 50973093 (-0.01%); split: -0.02%, +0.01%
Cycles: 1733911128 -> 1733605320 (-0.02%); split: -0.05%, +0.03%
VMEM: 40867650 -> 40900204 (+0.08%); split: +0.13%, -0.05%
SMEM: 6835980 -> 6829073 (-0.10%); split: +0.10%, -0.20%
VClause: 1032783 -> 1032788 (+0.00%); split: -0.01%, +0.01%
SClause: 2103705 -> 2104115 (+0.02%); split: -0.09%, +0.11%
Copies: 3195658 -> 3193656 (-0.06%); split: -0.30%, +0.24%
Branches: 1140213 -> 1140120 (-0.01%); split: -0.05%, +0.04%
PreSGPRs: 3603785 -> 3437064 (-4.63%); split: -5.13%, +0.50%
PreVGPRs: 3321996 -> 3321850 (-0.00%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8870>
 2021-02-12 22:41:31 +00:00
Daniel Schürmann 5d7b3bf1a7 aco: handle non-temp phi definitions and operands 
This will be necessary as we make exec non-temp.

No fossil-db changes.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8870>
 2021-02-12 22:41:31 +00:00
Daniel Schürmann e663a15098 aco: don't create unnecessary exec phi on merge blocks 
No fossil-db changes.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8870>
 2021-02-12 22:41:31 +00:00
Alejandro Piñeiro 3f614c6f7c v3dv/meta_copy: get tlb compatible BC compressed formats for copies 
So we can use the tlb path for several operations (copy image, clear,
copy buffer to image, etc).

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8929>
 2021-02-12 22:04:13 +00:00
Alejandro Piñeiro 6fdf375a90 v3dv/formats: expose support for BC1-3 compressed formats 
Even though we can't expose textureCompressedBC as the hw doesn't
support all the formats, we can expose as supported individual
formats.

This gets several ~850 CTS tests going from skip to pass, with
patterns like:

  * dEQP-VK.texture.compressed.bc*
  * dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.color.2d*bc*
  * dEQP-VK.api.copy_and_blit.core.image_to_image.all_formats.color.3d*bc*
  * dEQP-VK.api.info.image_format_properties*bc*
  * etc

v2: BC1-3 formats are texture filterable (Iago)

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8929>
 2021-02-12 22:04:13 +00:00
Alejandro Piñeiro fcb229cbe0 v3dv/device: clarify that we can't expose textureCompressionBC 
From spec:

"textureCompressionBC specifies whether all of the BC compressed
 texture formats are supported. If this feature is enabled"

Note the *all*. v3d hw supports BC1, BC2, and BC3, but not BC4 through
BC7.

Let's clarify that we can't expose textureCompressionBC even if we
support some of them.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8929>
 2021-02-12 22:04:13 +00:00
Alyssa Rosenzweig 643873a94f docs/features: gl_HelperInvocation on Panfrost 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:32 -05:00
Alyssa Rosenzweig 2f70317e0d docs/features: Mark sample shading done on Panfrost 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:32 -05:00
Alyssa Rosenzweig 2193d768bd docs/features: Mark some ES3.1 done on Panfrost 
These should be working on both Midgard and Bifrost now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:32 -05:00
Alyssa Rosenzweig 0308095af7 docs/features: Mark more TBO exts done on panfrost 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:32 -05:00
Alyssa Rosenzweig 2e33dfafbe panfrost: Advertise OES_standard_derivatives 
Has been implemented for ages since it's part of ES3, but we missed the
CAP needed for the ES2 extension.

Closes: #4203
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:32 -05:00
Alyssa Rosenzweig f21e13301a panfrost: Bump advertised ESSL feature level 
Needed to run more dEQP tests.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:32 -05:00
Alyssa Rosenzweig ea289ee1db panfrost: Bump max SSBO count 
There's no actual architectural limit, this is totally arbitrary, but
fixes some NotSupported errors in dEQP-GLES31.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:32 -05:00
Alyssa Rosenzweig 6bba718027 panfrost: Advertise SAMPLE_SHADING 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:31 -05:00
Alyssa Rosenzweig 9aede94711 panfrost: Assert on indirect compute shaders 
This case was overlooked. Much simpler than indirect graphics calls, can
come as a follow on to the other indirect work.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:31 -05:00
Alyssa Rosenzweig 4b00d311e7 panfrost: Remove stale TODOs 
The answer is no, we do not. Putting them in the primary batch allows
proper intermixing with graphics work. There's no harm for pure compute
loads, either.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:31 -05:00
Alyssa Rosenzweig 5d83442f8e panfrost: Simplify bind_compute_state 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:31 -05:00
Alyssa Rosenzweig 856f0abd2b pan/{mdg, bi}: Lower load_sample_pos 
Conceptually same lowering as the DDK, although we're missing a number
of relevant compiler optimizations so the generated code is awful.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:31 -05:00
Alyssa Rosenzweig 00c1d5da34 pan/{mdg, bi}: Lower load_helper_invocation 
Passes dEQP-GLES31.functional.shaders.helper_invocation.* on both
architectures

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:31 -05:00
Alyssa Rosenzweig 00df274586 pan/bi: Implement coverage mask updates 
Impressive how simple this looks after dozens of patches of
sysval-related prepwork :)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:31 -05:00
Alyssa Rosenzweig ae8b1fa7db pan/bi: Decouple sysval loading from NIR 
Useful for builder-based sysvals.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:31 -05:00
Alyssa Rosenzweig 1e7b5f3826 pan/bi: Implement nir_intrinsic_load_sample_positions_pan 
Just copy the FAU result.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:31 -05:00
Alyssa Rosenzweig ca0f50ec6a pan/bi: Implement load_sample_mask_in 
Preloaded.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:31 -05:00
Alyssa Rosenzweig 92569f5d6e pan/bi: Fix gl_SampleID read 
Fixes dEQP-GLES31.functional.shaders.sample_variables.sample_id.default_framebuffer

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:31 -05:00
Alyssa Rosenzweig 56240f6e85 pan/bi: Lower ifind_msb 
We have ufind_msb efficient, implement in terms of that.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:31 -05:00
Alyssa Rosenzweig ad06e0592a pan/bi: Implement ufind_msb 
Lowered to #(sz - 1) - clz(x), taking advantage of the machine's
8-bit and 16-bit variants of clz and the widening on the second argument
of ISUB to implement neatly in two instructions.

Note that in NIR, ufind_msb can take any integer type but always output
i32.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:31 -05:00
Alyssa Rosenzweig 2ef97a079a pan/bi: Implement bitfield_reverse 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:31 -05:00
Boris Brezillon 06d6dd1b40 pan/bi: Support bit_count() 
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:30 -05:00
Boris Brezillon 58e887f07e pan/bi: Add uclz() support 
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:30 -05:00
Alyssa Rosenzweig 72c6173a85 pan/bi: Lower bitfield inserts/extracts 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:30 -05:00
Alyssa Rosenzweig b0551cb0c2 pan/bi: Implement texture gathers 
Passes all of dEQP-GLES31.functional.texture.gather.*

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:30 -05:00
Alyssa Rosenzweig ab9650d5aa pan/bi: Remove redundant TEXC opcode check 
Already checked in emit_tex

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:30 -05:00
Alyssa Rosenzweig 1079d7ccd6 pan/mdg: Lower stores from helpers 
Required for correct behaviour of SSBOs in fragment shaders on Midgard.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:30 -05:00
Alyssa Rosenzweig 3c44671df3 pan/mdg: Stub load_barycentric_sample 
Now parity with Bifrost for not failing over these intrinsics.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:30 -05:00
Alyssa Rosenzweig 4a2f128985 pan/mdg: Lower ufind_msb, poorly 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:30 -05:00
Alyssa Rosenzweig 36248dd448 pan/mdg: Implement uclz 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:30 -05:00
Alyssa Rosenzweig 887e391447 pan/mdg: Rename bitcount8 to popcnt, fixing the unit 
Still doesn't seem to work correctly for negative values.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:30 -05:00
Alyssa Rosenzweig e55af16bfe pan/mdg: Lower bitfield instructions 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:30 -05:00
Alyssa Rosenzweig 94b6d4e0ed pan/mdg: Remove unused pack_unorm_4x8 lowering 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:30 -05:00
Alyssa Rosenzweig 954623856c pan/mdg: Assert on bad 64-bit swizzle in disassembly 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:29 -05:00
Alyssa Rosenzweig 97a85c1071 panfrost: Add MULTISAMPLED sysval 
To be used with Bifrost coverage mask updates.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:29 -05:00
Alyssa Rosenzweig 9f55657366 panfrost: Overhaul sysval handling 
Don't preassign.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:29 -05:00
Alyssa Rosenzweig 4086b8980d panfrost: Implement get_sample_position 
Easy now that we have the table.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:29 -05:00
Alyssa Rosenzweig b01df1f9bf panfrost: Advertise MSAA 8x and 16x 
On Bifrost. Could support Mali T760+ with additional debug.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:29 -05:00
Alyssa Rosenzweig 072cc5d5f1 panfrost: Ensure open_device has pandecode initialized 
Requires reordering some calls.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:29 -05:00
Alyssa Rosenzweig dd3bda22f4 panfrost: Use sample location LUT 
Fixes multisampling issues on Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:29 -05:00
Alyssa Rosenzweig a61fb62966 panfrost: Upload sample positions on device init 
Needed to correctly implement multisampling on Bifrost, and used in
gl_SamplePosition  implementation on Midgard. These are architecturally
invariant, so it's fine to hard code.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:29 -05:00
Alyssa Rosenzweig 376c3fa4db panfrost: Set sample count/pattern for tiler FBD 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
 2021-02-12 16:44:29 -05:00