Commit Graph

176882 Commits

Author SHA1 Message Date
Emma Anholt 37fcbb375c blorp: Disable unaligned partial HIZ fast clears for HIZ_CCS too.
Fixes MSAA scissored fast clears under zink and ANGLE.

Fixes: e488773b29 ("anv: Fast clear depth/stencil surface in vkCmdClearAttachments")
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24225>
2023-08-22 16:34:52 +00:00
Konstantin Seurer 7aee3ba36d radv: Stop updating the stack_size in insert_rt_case
There are two paths that call insert_rt_case:
- Traversal shader: The stack size is ignored.
- Monolithic raygen shader: The stack sizes of the inlined shaders are
                            accounted for in compute_rt_stack_size.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
2023-08-22 15:46:29 +00:00
Konstantin Seurer bdec044c88 aco: Do not fixup registers if there are no shader calls
Frees up some registers when using monolithic compilation.

Quake II RTX and Control (with monolithic compilation):

Totals from 10 (29.41% of 34) affected shaders:
MaxWaves: 77 -> 98 (+27.27%)
Instrs: 49047 -> 48984 (-0.13%); split: -0.16%, +0.03%
CodeSize: 260420 -> 259880 (-0.21%); split: -0.25%, +0.04%
VGPRs: 1328 -> 1104 (-16.87%)
Latency: 477134 -> 479377 (+0.47%); split: -0.05%, +0.52%
InvThroughput: 137763 -> 114108 (-17.17%)
VClause: 1318 -> 1286 (-2.43%); split: -2.66%, +0.23%
SClause: 1295 -> 1293 (-0.15%); split: -0.54%, +0.39%
Copies: 7838 -> 7782 (-0.71%); split: -0.82%, +0.10%
Branches: 2592 -> 2589 (-0.12%)
PreSGPRs: 874 -> 796 (-8.92%)
PreVGPRs: 1283 -> 1013 (-21.04%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
2023-08-22 15:46:29 +00:00
Konstantin Seurer ec708c26ef radv/rt: Split stage initialization and hashing
The dependency chain is: init stages -> compute pipeline key -> hash
stages.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
2023-08-22 15:46:29 +00:00
Konstantin Seurer f3e2900c59 radv/rt: Insert rt_return_amd before lowering shader calls
Also skips running nir_lower_shader_calls for the traversal shader. This
will be used to skip the pass and the rt_return_amd insertion for
monolithic raygen shaders.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
2023-08-22 15:46:29 +00:00
Konstantin Seurer 774421f11e radv/rt: Add and use radv_build_traversal
Moves most of the build code to a helper which will be useful for adding
inline traversal.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
2023-08-22 15:46:29 +00:00
Konstantin Seurer 2d7965dbff radv/rt: Do not apply stack_ptr for non-recursive stages
stack_ptr is set to 0.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
2023-08-22 15:46:29 +00:00
Konstantin Seurer d174a71db8 radv/rt: Remove some dead code
- call_idx_base was used for resume shaders in the shader call loop
- hit attribs are lowered elsewhere
- stack_size is set in radv_pipeline_rt.c

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
2023-08-22 15:46:29 +00:00
M Henning 10bbe17253 nv/codegen: Remove Function::buildDefSets
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
2023-08-22 10:42:24 -04:00
M Henning bf48f7ca97 nv/codegen: Delete periodicMask32
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
2023-08-22 10:42:24 -04:00
M Henning eae6800ec3 nv/codegen: Delete unused OP_CONSTRAINT
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
2023-08-22 10:42:24 -04:00
M Henning dcec14c51e nv50_ir_ra: Delete unused functions
Wrap the file in an anonymous namespace and delete any code that
gcc warns is unused.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
2023-08-22 10:42:24 -04:00
M Henning 21a3889d9b nv/codegen: Remove unused clipVertexOutput var
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
2023-08-22 10:42:24 -04:00
M Henning 95c20be563 nv/codegen: Merge from_common into from_nir
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
2023-08-22 10:42:24 -04:00
M Henning b80897fab1 nv/codegen: Remove fragCoord variable.
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
2023-08-22 10:42:24 -04:00
M Henning 2ef8af39d8 nv/codegen: Delete OP_EXP, OP_LOG
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
2023-08-22 10:42:24 -04:00
M Henning 401bdd7d1e nv/codegen: Delete OP_WRSV
It's never generated by anything.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
2023-08-22 10:42:24 -04:00
M Henning f4ba2fdd73 nv/codegen: Fix an uninitialized variable warning
The warning was actually a false positibe, but CI failed with:
error: 'nvirOp' may be used uninitialized [-Werror=maybe-uninitialized]

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
2023-08-22 10:42:16 -04:00
Friedrich Vock a28ff7f240 nir/load_store_vectorize: Handle intrinsics with constant base
This includes nir_load_stack and nir_store_stack, which are vectorized
in nir_lower_shader_calls. If not adjusted, we end up loading from
the wrong base.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9596
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9587
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24789>
2023-08-22 13:26:12 +00:00
Tapani Pälli db05db44fe iris: implement a dummy depth flush for Wa_14016712196
Emit depth flush after state that sends implicit depth flush. These
states are:

 3DSTATE_HIER_DEPTH_BUFFER
 3DSTATE_STENCIL_BUFFER
 3DSTATE_DEPTH_BUFFER
 3DSTATE_CPSIZE_CONTROL_BUFFER

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24689>
2023-08-22 12:49:37 +00:00
Tapani Pälli c9abcddad4 anv: implement a dummy depth flush for Wa_14016712196
Emit depth flush after state that sends implicit depth flush. These
states are:

 3DSTATE_HIER_DEPTH_BUFFER
 3DSTATE_STENCIL_BUFFER
 3DSTATE_DEPTH_BUFFER
 3DSTATE_CPSIZE_CONTROL_BUFFER

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24689>
2023-08-22 12:49:37 +00:00
Georg Lehmann 9cf6984200 nir: unify lower_find_msb with has_{find_msb_rev,uclz}
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24662>
2023-08-22 12:08:37 +00:00
Georg Lehmann 2ac7e6614a nir: unify lower_bitfield_extract with has_bfe
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24662>
2023-08-22 12:08:37 +00:00
Georg Lehmann 34c3f81614 nir: unify lower_bitfield_insert with has_{bfm,bfi,bitfield_select}
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24662>
2023-08-22 12:08:37 +00:00
Friedrich Vock bfb55d0266 ac/sqtt,radv/sqtt: Add and use marker for separate RT compilation
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
2023-08-22 11:33:11 +00:00
Friedrich Vock 3d3d5c4bc3 radv/sqtt: Handle separately-compiled RT pipelines
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
2023-08-22 11:33:11 +00:00
Friedrich Vock 1cd9525b18 radv/sqtt: Write LDS size metadata in code objects
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
2023-08-22 11:33:11 +00:00
Friedrich Vock 7809fb9e49 radv/sqtt: Unregister records based on hash
RT pipelines have multiple hashes used in records, so don't always use
the pipeline hash.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
2023-08-22 11:33:11 +00:00
Friedrich Vock 3ed4cca883 radv/sqtt: Move record filling to helper function
RT shaders construct records differently, but this piece of code is
common to all types of pipelines.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
2023-08-22 11:33:11 +00:00
Friedrich Vock b4a704b42a ac/rgp: Add metadata for separate-compiled RT stages
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
2023-08-22 11:33:11 +00:00
Friedrich Vock 0c4e92bf3e ac/rgp: Write lds_size metadata
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
2023-08-22 11:33:11 +00:00
Friedrich Vock be0e3e8e09 ac/sqtt,radv: Split internal and API hash in PSO correlations
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
2023-08-22 11:33:11 +00:00
Friedrich Vock d5f1c9fb4b ac/msgpack: make fixstrs a const char
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
2023-08-22 11:33:10 +00:00
Marek Vasut ef4cb2431d etnaviv: Fully replicate back stencil config
The blob replicates both the value mask as well as the stencil reference
of the back-facing stencil to the front-facing stencil. This fixes the
remaining failures in the following dEQPs:

   dEQP-GLES2.functional.fbo.render.*_stencil_index8

Fixes: c8ccd63911 ("etnaviv: Fix depth stencil ops on GC880/GC2000")
Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4867>
2023-08-22 12:00:27 +02:00
José Roberto de Souza a425ae17ac anv: Update Wa_16014390852 for MTL
On MTL Wa_16014390852 is fixed on B0 stepping so we can't use a macro
check anymore for this workaround.

cc: mesa-stable

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24812>
2023-08-22 06:33:56 +00:00
Samuel Pitoiset a29e2c6fbc aco: implement create_tcs_jump_to_epilog()
This implements jumping from the main TCS to the epilog.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24643>
2023-08-22 06:10:32 +00:00
Samuel Pitoiset e03c09dfb2 aco: allow SGPRs operands with p_jump_to_epilog
For TCS epilogs, we will have to pass SGPRs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24643>
2023-08-22 06:10:32 +00:00
Samuel Pitoiset fc9283938f aco: adjust TCS epilogs for RADV
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24643>
2023-08-22 06:10:32 +00:00
Samuel Pitoiset 0c2adc7ada aco: fix jumping from main TCS to epilog on GFX9+
On GFX9+, VS is merged with TCS which means this function is called
twice and the epilog was emitted in both shader parts.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24643>
2023-08-22 06:10:32 +00:00
Samuel Pitoiset 131c3aa3dc radv: add tcs_out_patch_fits_subgroup to radv_tcs_epilog_key
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24643>
2023-08-22 06:10:32 +00:00
Samuel Pitoiset 65191bb351 radv: declare shader arguments for TCS epilogs
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24643>
2023-08-22 06:10:32 +00:00
Samuel Pitoiset d0808b22cb radv: stop declaring the scratch offset argument for TCS epilogs
ACO skip it for epilogs now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24643>
2023-08-22 06:10:32 +00:00
Samuel Pitoiset 6ad8abf7aa radv: use the maximum possible workgroup size for TCS epilogs
It's similar to when the patch control points value is dynamic.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24643>
2023-08-22 06:10:32 +00:00
Chia-I Wu e74c3dbb70 ac/surface: limit RADEON_SURF_NO_TEXTURE to color surfaces
For z surfaces, flags.texture should be based on
RADEON_SURF_TC_COMPATIBLE_HTILE alone.  Otherwise, addrlib could pick a
_X/_T swizzle mode for a MSAA depth texture, which is said to be broken:

  When _X/_T swizzle mode was used for MSAA depth texture, TC will get zplane
  equation from wrong address within memory range a tile covered and use the
  garbage data for compressed Z reading which finally leads to corruption.

Fixes: de0885cdb8 ("amd/surface: add RADEON_SURF_NO_TEXTURE flag")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24767>
2023-08-22 02:36:20 +00:00
Dave Airlie 21778950e1 lavapipe: use vk_buffer_range common code.
trivial switch over.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24822>
2023-08-22 02:13:10 +00:00
Dave Airlie d4f5ac5025 lavapipe: use vk_buffer common code.
This is a trivial swapover to the common runtime code for buffers.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24822>
2023-08-22 02:13:10 +00:00
Mike Blumenkrantz d9942442f2 zink: handle patch variable locations for separate shaders better
these don't overlap with other locations so they can keep whatever their
current assignments are

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24757>
2023-08-22 01:31:35 +00:00
Mike Blumenkrantz ca987c0dfb zink: wait on async fence during ctx program removal
removed=true implies that no async jobs are outstanding

fixes #9580

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24811>
2023-08-22 00:58:56 +00:00
Dave Airlie 0a90994fce llvmpipe/cs: drop tgsi for compute/mesh/task shader internals.
This drops the info from the compute shader infrastructure.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24804>
2023-08-22 09:53:42 +10:00
Dave Airlie 6222d0633d llvmpipe/cs: convert to using tgsi->nir
Step 1 to removing tgsi info from llvmpipe

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24804>
2023-08-22 09:53:42 +10:00