iris: implement a dummy depth flush for Wa_14016712196

Emit depth flush after state that sends implicit depth flush. These
states are:

 3DSTATE_HIER_DEPTH_BUFFER
 3DSTATE_STENCIL_BUFFER
 3DSTATE_DEPTH_BUFFER
 3DSTATE_CPSIZE_CONTROL_BUFFER

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24689>
This commit is contained in:
Tapani Pälli
2023-08-15 10:37:25 +03:00
committed by Marge Bot
parent c9abcddad4
commit db05db44fe
+8
View File
@@ -7223,6 +7223,14 @@ iris_upload_dirty_render_state(struct iris_context *ice,
iris_batch_emit(batch, cso_z->packets, sizeof(cso_z->packets));
/* Wa_14016712196:
* Emit depth flush after state that sends implicit depth flush.
*/
if (intel_needs_workaround(batch->screen->devinfo, 14016712196)) {
iris_emit_pipe_control_flush(batch, "Wa_14016712196",
PIPE_CONTROL_DEPTH_CACHE_FLUSH);
}
if (zres)
genX(emit_depth_state_workarounds)(ice, batch, &zres->surf);