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radv/rt: Insert rt_return_amd before lowering shader calls

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Also skips running nir_lower_shader_calls for the traversal shader. This
will be used to skip the pass and the rt_return_amd insertion for
monolithic raygen shaders.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
This commit is contained in:
Konstantin Seurer
2023-08-21 13:30:12 +02:00
committed by Marge Bot
parent 774421f11e
commit f3e2900c59
2 changed files with 16 additions and 15 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/amd/vulkan/radv_pipeline_rt.c
+16 -8
View File
@@ -22,6 +22,7 @@
*/
#include "nir/nir.h"
#include "nir/nir_builder.h"
#include "radv_debug.h"
#include "radv_private.h"
@@ -371,16 +372,23 @@ radv_rt_nir_to_asm(struct radv_device *device, struct vk_pipeline_cache *cache,
*/
NIR_PASS_V(stage->nir, move_rt_instructions);
const nir_lower_shader_calls_options opts = {
.address_format = nir_address_format_32bit_offset,
.stack_alignment = 16,
.localized_loads = true,
.vectorizer_callback = radv_mem_vectorize_callback,
.vectorizer_data = &device->physical_device->rad_info.gfx_level,
};
uint32_t num_resume_shaders = 0;
nir_shader **resume_shaders = NULL;
nir_lower_shader_calls(stage->nir, &opts, &resume_shaders, &num_resume_shaders, stage->nir);
if (stage->stage != MESA_SHADER_INTERSECTION) {
nir_builder b = nir_builder_at(nir_after_cf_list(&nir_shader_get_entrypoint(stage->nir)->body));
nir_rt_return_amd(&b);
const nir_lower_shader_calls_options opts = {
.address_format = nir_address_format_32bit_offset,
.stack_alignment = 16,
.localized_loads = true,
.vectorizer_callback = radv_mem_vectorize_callback,
.vectorizer_data = &device->physical_device->rad_info.gfx_level,
};
nir_lower_shader_calls(stage->nir, &opts, &resume_shaders, &num_resume_shaders, stage->nir);
}
unsigned num_shaders = num_resume_shaders + 1;
nir_shader **shaders = ralloc_array(stage->nir, nir_shader *, num_shaders);
if (!shaders)
src/amd/vulkan/radv_rt_shader.c
-7
View File
@@ -808,13 +808,6 @@ radv_parse_rt_stage(struct radv_device *device, const VkPipelineShaderStageCreat
nir_shader *shader = radv_shader_spirv_to_nir(device, &rt_stage, key, false);
if (shader->info.stage == MESA_SHADER_RAYGEN || shader->info.stage == MESA_SHADER_CLOSEST_HIT ||
shader->info.stage == MESA_SHADER_CALLABLE || shader->info.stage == MESA_SHADER_MISS) {
nir_block *last_block = nir_impl_last_block(nir_shader_get_entrypoint(shader));
nir_builder b_inner = nir_builder_at(nir_after_block(last_block));
nir_rt_return_amd(&b_inner);
}
NIR_PASS(_, shader, nir_split_struct_vars, nir_var_ray_hit_attrib);
NIR_PASS(_, shader, nir_lower_indirect_derefs, nir_var_ray_hit_attrib, UINT32_MAX);
NIR_PASS(_, shader, nir_split_array_vars, nir_var_ray_hit_attrib);