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Author SHA1 Message Date
Rob Clark
2b2bcbb96d ci: Re enable fd-farm 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34263>
 2025-04-02 20:13:37 +00:00
Dylan Baker
ff4b1b1e43 intel/decoder: free memory in error case 
This was handled in other instances in a previous patch, but this
instance remains, as the zlib decompression routine is slightly
different.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34118>
 2025-04-02 19:26:55 +00:00
Dylan Baker
da14c0af67 intel/tools: move ascii85_decode to common code 
We have 3 copies of this function, so put it in the shared static
library.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34118>
 2025-04-02 19:26:55 +00:00
Dylan Baker
7b791cd0b4 intel/tools: deduplicate zlib_inflate function 
There are three copies of this function, all of them have the same
memory leak in them. Instead of fixing them one by one, just use a
common implementation for all three, since they already all have a
shared helper lib.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34118>
 2025-04-02 19:26:55 +00:00
Eric Engestrom
a1a9c7cda2 docs: add sha sum for 25.0.3 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34349>
 2025-04-02 19:18:32 +00:00
Eric Engestrom
d9d8a58475 docs: add release notes for 25.0.3 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34349>
 2025-04-02 19:18:32 +00:00
Eric Engestrom
6f1d502af7 docs: update calendar for 25.0.3 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34349>
 2025-04-02 19:18:32 +00:00
David Rosca
a5edb9faac radeonsi/vcn: Disable AV1 unidir compound with rate control 
It causes significant bitrate overshoot currently.

Cc: mesa-stable
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34237>
 2025-04-02 17:55:23 +00:00
Eric Engestrom
2063084903 virgl: fix typo inverting a condition 
Fixes: 8513bcbd2f ("virtio: Remove virglrenderer_hw.h entirely")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34340>
 2025-04-02 16:28:24 +00:00
Connor Abbott
15660caa90 tu: Fix layer_count with dynamic rendering + multiview 
With "classic" renderpasses, the VkFramebuffer's layerCount must be 1 if
multiview is enabled. We accidentally rely on this to not disable GMEM
for multiview, and possibly for other things too. Apparently the dynamic
rendering equivalent, VkRenderingInfo::layerCount, can be anything when
multiview is enabled, and some CTS tests set it to the number of views.
Sanitize it when constructing the internal framebuffer for dynamic
rendering.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34080>
 2025-04-02 15:47:47 +00:00
Danylo Piliaiev
c538a9ec6e tu: Use EARLY_Z also for stencil tests 
EARLY tests can test and write out stencil values.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33851>
 2025-04-02 12:03:30 +00:00
Danylo Piliaiev
534cf4feeb tu/lrz: Improve LRZ around stencil tests and reads_dest cases 
We were a bit too conservative and fully disabled LRZ for when stencil
or blending were involved. There is no need to fully disable LRZ
in those cases, only LRZ writes should be disabled.

The final rules are:
 LRZ is DISABLED until depth attachment is cleared when:
   - Depth Write + changing direction of depth test
      e.g. from OP_GREATER to OP_LESS;
   - Depth Write + OP_ALWAYS or OP_NOT_EQUAL;
   - Clearing depth with vkCmdClearAttachments;
   - Depth image is a target of blit commands.
   - (pre-a650) Not clearing depth attachment with LOAD_OP_CLEAR;
   - (pre-a650) Using secondary command buffers;
 LRZ WRITE is DISABLED until depth attachment is cleared when:
   - Depth Write + blending (color blend, logic ops, partial color mask, etc.);
   - Fragment may be killed by stencil;
 LRZ is disabled for CURRENT draw when:
   - Fragment shader side-effects (writing to SSBOs, atomic operations, etc);
   - Fragment shader writes depth or stencil;
 LRZ WRITE is DISABLED (via LATE_Z) for CURRENT draw when:
   - Fragment may be via killed alpha-to-coverage, discard, sample coverage;

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33851>
 2025-04-02 12:03:30 +00:00
Juan A. Suarez Romero
0d2ebca39f v3dv: include depth offset on image view creation 
When creating the image view in the texel buffer shader copy function,
take in account the region to copy can start in a different Z-offset
than 0.

This fixes several dEQP-VK.image.concurrent_copy.* failing tests.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34112>
 2025-04-02 10:31:15 +00:00
Juan A. Suarez Romero
91ee8ab284 v3dv: don't batch regions with different depth offsets 
As we will be creating an image view that covers the region to copy,
batch all the regions that share the same depth offset and depth extent.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34112>
 2025-04-02 10:31:15 +00:00
Juan A. Suarez Romero
f7de4ad0fb v3dv: remove src_format from blit render pass creation 
Source format is not involved at all on creating the blit render pass,
so remove from the function call.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34112>
 2025-04-02 10:31:15 +00:00
David Rosca
597f13b244 radv: Add radv_format_description to remap 10/12bit formats to 16bit 
Remapping was missing for format description which made these formats
effectively unsupported as zero format features were reported.

Fixes: 0098f8ef35 ("radv: Remap 10 and 12 bit formats to 16 bit formats")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34274>
 2025-04-02 08:40:28 +00:00
David Rosca
3ef0ee2241 radv: Use radv_format_to_pipe_format instead of vk_format_to_pipe_format 
Fixes: 9af11bf306 ("radv: add initial DCC support on GFX12")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34274>
 2025-04-02 08:40:28 +00:00
Samuel Pitoiset
5784a36fd1 Revert "radeonsi/gfx11: program SAMPLE_MASK_TRACKER_WATERMARK optimally for APUs" 
This reverts commit 6ce3a95852.

This likely also causes random GPU hangs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34306>
 2025-04-02 07:10:40 +00:00
Samuel Pitoiset
64e6e043b3 Revert "radv: program SAMPLE_MASK_TRACKER_WATERMARK optimally for GFX11 APUs" 
This reverts commit 96e9c3fe77.

This actually causes random GPU hangs like on Phoenix.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12461
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12426
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12692
Tested-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34306>
 2025-04-02 07:10:40 +00:00
Samuel Pitoiset
fac44c0ca0 ac/surface: fix selecting preferred alignments for HiZ/HiS on GFX12 
VK_MESA_image_alignment_control is used by vkd3d-proton to set
optimal alignments for images. Though, the preferred alignment was
only applied to the surface (or the stencil aspect) but not to the HiZ
surface due to the NULL check.

This caused rendering issues because swizzle modes didn't match.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12831
Fixes: 079f55d405 ("radv: advertise VK_MESA_image_alignment_control on GFX12")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34322>
 2025-04-02 06:47:59 +00:00
Ian Romanick
e210b79ce3 brw/nir: Lower fsign again after last call to brw_nir_optimize 
No shader-db or fossil-db changes on any Intel platform.

Fixes: 13332c23 ("intel/brw: Unconditionally run optimizations after nir_opt_uniform_subgroup")
Closes: #12888
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34251>
 2025-04-02 01:59:49 +00:00
Ian Romanick
ca95cb8178 brw: Fix typo in comment 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34251>
 2025-04-02 01:59:49 +00:00
Erik Faye-Lund
17d254e978 panvk/ci: disable some more slow tests 
These tests currently take over 30 seconds, let's disable them to keep
CI performance reasonable.

Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34315>
 2025-04-01 22:44:53 +00:00
Aaron Ruby
8513bcbd2f virtio: Remove virglrenderer_hw.h entirely 
Capset definitions replaced by those in virtgpu_drm.h

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34300>
 2025-04-01 22:11:10 +00:00
Aaron Ruby
b1ca6a0b43 drm-uapi: Sync virtgpu header 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34300>
 2025-04-01 22:11:10 +00:00
Dave Airlie
7a01953a39 nak: Add Ampere and Ada latency information 
This adds the latency information provided by NVIDIA.  This is copied
from excel spreadsheets provided to Red Hat.

Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33573>
 2025-04-01 21:20:57 +00:00
Dave Airlie
6b8a4e6bb7 nak: Add Turing latency information 
This adds the latency information provided by NVIDIA.  This is copied
from excel spreadsheets provided to Red Hat.

This fully passes CTS on Turing TU104 with no regressions.

I'm sure future use of some instructions like IMAD may require some
changes to this, but it should be functionally complete.

Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33573>
 2025-04-01 21:20:57 +00:00
Mel Henning
3868855144 nak/instr_sched: Barriers activate after 2 cycles 
This mirrors the logic around line 365 of calc_instr_deps.rs

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33573>
 2025-04-01 21:20:57 +00:00
Dave Airlie
38d2212194 nak: Add an a_has_pred parameter to waw_latency 
This affects the HMMA units, among others.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33573>
 2025-04-01 21:20:57 +00:00
Faith Ekstrand
4914470327 nak: Add an Op::no_scoreboard() helper 
Control-flow ops are theoretically variable-latency but we don't
actually want to scoreboard them because of the way NAK dependency
tracking works.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33573>
 2025-04-01 21:20:57 +00:00
Faith Ekstrand
2b569ecdb6 nak: Handle delays > 15 
Delays greater than 15 needs to be encoded into a nop following the
instruction.  These delays will start to happen when we add accurate
latency handling and with certain instructions.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33573>
 2025-04-01 21:20:57 +00:00
Faith Ekstrand
348f345238 nak: Put the cycle count assert behind a debug flag 
Fixes: c1d64053f2 ("nak: Assert instr_sched matches calc_instr_deps")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33573>
 2025-04-01 21:20:57 +00:00
Dave Airlie
7a55a9afcc nak: add reads after setting writes 
Otherwise we schedule this sort of thing wrong,
 r0    = iadd3 r0 c[0x0][0x0] rZ
 r0    = shf.l.w.i32 r0 rZ 0x2
 r0 p0 = iadd3 r0 c[0x1][0x0] rZ

since raw latencies are more important than waw, but we go do a
waw for the first two instructions instead of a raw which is correct.

Fixes: 2d4e445099 ("nak/calc_instr_deps: Rewrite calc_delays() again")
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33573>
 2025-04-01 21:20:57 +00:00
Autumn Ashton
afa254ad68 ci/zink+radv: Add sample locations fails 
These fail on Polaris10 too.

Are these tests even valid? Is this a Zink bug?
Vulkan CTS is happy with our implementation.

Signed-off-by: Autumn Ashton <misyl@froggi.es>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28237>
 2025-04-01 21:15:37 +01:00
Autumn Ashton
ae6d24c4ef radv: Expose VK_SAMPLE_COUNT_1_BIT for sample position on GFX10+ 
This works on GFX10+.

Signed-off-by: Autumn Ashton <misyl@froggi.es>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28237>
 2025-04-01 21:15:34 +01:00
Autumn Ashton
693e3b47f7 radv: Expose EXT_sample_locations everywhere 
This works and passes CTS now!

Signed-off-by: Autumn Ashton <misyl@froggi.es>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28237>
 2025-04-01 21:15:31 +01:00
Autumn Ashton
343c434c50 radv: Enable fragmentShadingRateWithCustomSampleLocations 
We need to expose this, as we support it.

Otherwise 1x1 is assumed and we fail some CTS.

Signed-off-by: Autumn Ashton <misyl@froggi.es>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28237>
 2025-04-01 21:15:28 +01:00
Autumn Ashton
3d75082c02 radv: Fix compute resolve rounding 
When we are using compute resolve, we can get
values the CTS does not expect due to the value
we end up writing for UNORM in
`nir_image_deref_store`.

Make the compute resolve rounding path match with
the output of the fragment shader resolve path,
by going through the same FP16 RTZ conversion as
we do for UNORM/SNORM formats.

This is why VK_EXT_sample_locations CTS was
failing on > GFX9.
On <= GFX9, I am assuming we are falling back to
RESOLVE_FRAGMENT, due to DCC stuff, which is why
it works there.

I tested a handful of images from the Vulkan CTS
for the sample locations and resolve tests for
diff UNORM formats from the qpa file forcing
FRAGMENT and with this change.
With this change, we now match on the compute
resolve path the same sha for the ones I compared
with ImageMagick `identify`.

CTS passes for: *resolve*, *image_clearing* and
*sample_locations* on RX 7900XTX.

Signed-off-by: Autumn Ashton <misyl@froggi.es>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28237>
 2025-04-01 21:15:24 +01:00
Lucas Stach
b60d816d6e include: update GL headers from the registry 
Taken from OpenGL-Registry commit ca62982097eb
("Remove plural bindings in GL_ARB_shader_texture_image_samples (#637)")

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33356>
 2025-04-01 19:08:38 +00:00
Eric Engestrom
66f813ae0f docs: remove the last 24.3 releases 
They're not going to happen anymore.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34325>
 2025-04-01 18:27:26 +00:00
Alyssa Rosenzweig
bfca178e27 asahi: clang-format 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34326>
 2025-04-01 17:42:51 +00:00
Alyssa Rosenzweig
28dbdf2549 asahi: fix depth buffer feedback loops 
fixes supertuxkart without the old hack.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34326>
 2025-04-01 17:42:51 +00:00
Alyssa Rosenzweig
a4677945d2 asahi: fix printf without result buffer 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34326>
 2025-04-01 17:42:51 +00:00
Alyssa Rosenzweig
1a36d0b5d7 libagx: use common heap allocs 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34326>
 2025-04-01 17:42:51 +00:00
Alyssa Rosenzweig
55046d0293 libagx: assert alignment for copies 
would have exposed the bug fixed.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34326>
 2025-04-01 17:42:50 +00:00
Alyssa Rosenzweig
f0ee1b1967 libagx: clean up query copy; bug fix 
oops.
-      .partial = flags & VK_QUERY_RESULT_WITH_AVAILABILITY_BIT,

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34326>
 2025-04-01 17:42:50 +00:00
Alyssa Rosenzweig
b5367dd797 hk: fix unaligned copies 
Fixes regression in Deus Ex: Human Revolution (DX11) via DXVK reported by James
Calligeros.

Pending CTS coverage: https://gitlab.khronos.org/Tracker/vk-gl-cts/-/issues/5640

Only the alignment check here is load bearing but I clarified the logic while at
it.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34326>
 2025-04-01 17:42:50 +00:00
Alyssa Rosenzweig
f7e706e325 hk: advertise bufferDeviceAddressCaptureReplayEXT 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34326>
 2025-04-01 17:42:50 +00:00
Alyssa Rosenzweig
8f2dc51e7f hk: advertise semaphore extensions 
works on current kernels.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34326>
 2025-04-01 17:42:50 +00:00
Alyssa Rosenzweig
c068b34013 agx: fix tg4 offset residency 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34326>
 2025-04-01 17:42:50 +00:00