Connor Abbott
211aeb2dda
ir3: Add ir3_find_input_loc() helper
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25076 >
2023-09-11 10:34:10 +00:00
Connor Abbott
0d82f92942
tu: Pull entangled shader state into program config
...
There are a few cross-stage states that we absolutely have to wait to
emit until we know more than one stage. Pull these into the program
config draw state, so that we can split up the program draw state into a
per-stage draw state. For VK_EXT_shader_object, these will have to
emitted at draw time.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25076 >
2023-09-11 10:34:10 +00:00
Connor Abbott
5666758820
tu, freedreno/a6xx: Don't use VS for PrimID passthru state
...
Emit the registers solely based on whether FS reads PrimID, and assume
the HW will do the right thing and disable PrimID passthru when GS is
enabled. This untangles these registers so we can set them from the FS
draw state in the future.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25076 >
2023-09-11 10:34:10 +00:00
Connor Abbott
b312155cc5
tu: Rename PrimID-related registers
...
It turns out that the hardware automatically selects whether PrimID
passthrough needs to happen based on whether GS is enabled, which means
that it's safe to always set these registers based whether PrimID is
read by the FS and the hardware will ignore them when GS is enabled. Use
the real names for these registers to make it less confusing when we
start to do that.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25076 >
2023-09-11 10:34:10 +00:00
Connor Abbott
979cf7bac0
tu: Merge depth/stencil draw states
...
This removes more draw states that are commonly set together. We still
have a separate draw state for RB_DEPTH_CNTL, because it depends on
other things like the attachment state and depth clamp and it would be
more difficult for layers like zink to use a combined depth/stencil
state.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25076 >
2023-09-11 10:34:10 +00:00
Connor Abbott
3a1f7c61b6
tu: Stop reusing base Vulkan dynamic state enums
...
We're about to remove the 1:1 correspondance between base Vulkan 1.0
dynamic states and draw states.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25076 >
2023-09-11 10:34:10 +00:00
Connor Abbott
1f88c9c5a4
tu: Merge PC_RASTER_CNTL into RAST draw state
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25076 >
2023-09-11 10:34:10 +00:00
Connor Abbott
51ba8d4331
tu: Merge SAMPLE_LOCATIONS and SAMPLE_LOCATIONS_ENABLE draw states
...
There's no need to separate them except that it was easier before, no
one will enable the second without also enabling the first. Now that
mesa will merge the states for us we can go ahead and merge them.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25076 >
2023-09-11 10:34:09 +00:00
Connor Abbott
d3ab5b68d5
tu: Remove MSAA draw state
...
We only need to emit MSAA state once per subpass at most, unless the
pipeline switches primitive types or for framebuffer-less subpasses
(which always use sysmem anyway). Therefore it seems like draw state
skipping isn't going to bring much benefit here, and having it as a draw
state in the first place is a remnant of how this used to be part of the
pipeline state.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25076 >
2023-09-11 10:34:09 +00:00
Iván Briano
8179b6fcf4
anv: tell blorp to do mesh stuff only if it's enabled
...
Otherwise blorp operations will set dirty bits for mesh that we don't
expect at pipeline state emission time.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25109 >
2023-09-11 10:08:44 +00:00
Iván Briano
3d7153afdf
anv: ensure pipelines have all state
...
While we don't need to emit all of the unused mesh/task states when mesh
is disabled, if we don't have them we fail some assertions in the
difference checks due to the corresponding state being empty.
This may happen when going from a mesh pipeline to a non-mesh one, or
one that uses task shaders to one that doesn't.
It may be possible to avoid having to do this, but I'd rather start from
a working state and optimize it later.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25109 >
2023-09-11 10:08:44 +00:00
Iván Briano
3fb3752e33
anv: fix missing 3DSTATE_SBE_CLIP emission
...
Fixes: 50f6903bd9 ("anv: add new low level emission & dirty state tracking")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25109 >
2023-09-11 10:08:44 +00:00
Lionel Landwerlin
05ebfa5463
anv: fix missing 3DSTATE_SBE_MESH emission
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: 50f6903bd9 ("anv: add new low level emission & dirty state tracking")
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25109 >
2023-09-11 10:08:44 +00:00
Lionel Landwerlin
a023897cd3
anv: ensure partially packed instructions are emitted in the pipeline
...
Any partially packed instructions should always be pre-packed by
genX_pipeline.c
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25109 >
2023-09-11 10:08:44 +00:00
Lionel Landwerlin
f5344a6b1c
anv: ensure mesh pipeline have all pre-rasterization stages disabled
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: 44656f98d5 ("anv: split pipeline programming into instructions")
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25109 >
2023-09-11 10:08:44 +00:00
Lionel Landwerlin
80feff8559
anv: emit 3DSTATE_URB_ALLOC_(MESH|TASK) only when mesh shaders are enabled
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25109 >
2023-09-11 10:08:44 +00:00
Lionel Landwerlin
ef8f28403f
anv: fix 3DSTATE_VFG emission
...
3DSTATE_VFG was moved into a section that only gets emitted for legacy
pipelines, not mesh pipelines.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: 0ce772bd19 ("anv: split 3DSTATE_VFG emission")
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25109 >
2023-09-11 10:08:44 +00:00
Ganesh Belgur Ramachandra
51773d135d
radeonsi: sets OPTIMAL_BIN_SELECTION to 0 if using bottom_edge_rule
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24725 >
2023-09-11 04:24:41 -05:00
Ganesh Belgur Ramachandra
86b4fe5d68
radeonsi: stores bottom_edge_rule option in the rasterizer state
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24725 >
2023-09-11 04:23:59 -05:00
Corentin Noël
c558c49550
ci: disable Collabora's LAVA lab for maintenance
...
This is to inform you of some planned downtime in the LAVA lab as follows:
* Start: 2023-09-11 08:00 BST (UTC+1)
* End: 2023-09-11 12:00 BST (UTC+1)
Signed-off-by: Corentin Noël <corentin.noel@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25141 >
2023-09-11 07:42:26 +00:00
Samuel Pitoiset
729cb4004a
radv: fix enabling DGCC
...
This was broken if only DGC (graphics) is enabled.
Fixes: 559da06755 ("radv: implement NV_device_generated_commands_compute")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25126 >
2023-09-11 07:13:10 +00:00
Dave Airlie
2d4fe5f229
clover/llvm: move to modern pass manager.
...
This seems like it should work, but I haven't tested it yet.
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24879 >
2023-09-11 13:04:07 +10:00
Erico Nunes
cb1c88d41f
lima: fix plbu block stride calculation
...
For some specific texture sizes, notably some texture sizes with width
4096, block stride calculation could end up calculating stride 256 which
is an invalid value.
In those specific cases, this could cause rendering artifacts or
application/driver crashes.
Cc: mesa-stable
Signed-off-by: Erico Nunes <nunes.erico@gmail.com >
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25084 >
2023-09-10 20:41:24 +00:00
Konstantin Seurer
df710fe695
radv/rt: Enable monolithic pipelines
...
Store can_inline inside the stages to avoid rerunning the analysis pass
for library stages.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21929 >
2023-09-10 11:40:12 +00:00
Konstantin Seurer
f2514e75f0
radv/rt: Add monolithic raygen lowering
...
Ray traversal is inlined to allow for constant folding and avoid
spilling.
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21929 >
2023-09-10 11:40:12 +00:00
Konstantin Seurer
e039e3cd76
radv/rt: Store NIR shaders separately
...
In order to compile monolithic shaders with pipeline libraries, we need
to keep the NIR around for inlining recursive stages.
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21929 >
2023-09-10 11:40:12 +00:00
Mike Blumenkrantz
39fca243bb
nir/inline_uniforms: fix oob access with nir_find_inlinable_uniforms
...
the array dimensionality needs to match nir_add_inlinable_uniforms even if
only the first member is used
Fixes: 0c0fb216dd ("nir/inline_uniforms: Allow possibility of more than one UBO")
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25063 >
2023-09-09 16:40:46 +00:00
Mike Blumenkrantz
94941de25b
zink: delete all psiz=1.0 stores if maintenance5 is present
...
this frees up an output location woooo
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24782 >
2023-09-09 15:44:45 +00:00
Mike Blumenkrantz
23df2bf41b
zink: slightly refactor psiz deletion during linking
...
no functional changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24782 >
2023-09-09 15:44:45 +00:00
Eric Engestrom
b5c2e91e4a
Revert "ci: taking igalia farm offline"
...
This reverts commit a69ffbd08a .
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25136 >
2023-09-09 14:08:23 +00:00
Mike Blumenkrantz
6d5174974a
zink: use HIC for image subdata when possible
...
this has a lot of caveats:
* extension must be supported
* resource must have usage bit set
* resource must not have any pending batch usage
* resource must be in supported layout
if all of these conditionals pass, then HIC can be used for direct image subdata
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24775 >
2023-09-09 13:02:44 +00:00
Mike Blumenkrantz
f24891269d
zink: check/use suboptimal HIC during ici init
...
this allows implicit use of HIC where possible while rejecting it when
it would cause performance loss
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24775 >
2023-09-09 13:02:44 +00:00
Mike Blumenkrantz
e006a3d8bc
zink: use some return codes for check_ici errors
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24775 >
2023-09-09 13:02:44 +00:00
Mike Blumenkrantz
4feb37d629
zink: fix some off-by-one indentation
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24775 >
2023-09-09 13:02:44 +00:00
Mike Blumenkrantz
9907573d98
zink: add a fixup method for extra driver props
...
some extensions have "extra" props which need the get_count -> get_prop_array
dance, and codegen is too stupid to figure this out (and probably always will be)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24775 >
2023-09-09 13:02:44 +00:00
Mike Blumenkrantz
9ff5026100
zink: disable HIC without resizable BAR
...
this otherwise ooms the system
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24775 >
2023-09-09 13:02:44 +00:00
Mike Blumenkrantz
f95134468a
zink: move mem type detection up in file
...
no functional changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24775 >
2023-09-09 13:02:44 +00:00
Mike Blumenkrantz
521800cf59
zink: hook up VK_EXT_host_image_copy
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24775 >
2023-09-09 13:02:44 +00:00
Mike Blumenkrantz
5edcab3385
lavapipe: don't advertise UNDEFINED layout for HIC
...
this is illegal
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24775 >
2023-09-09 13:02:44 +00:00
Mike Blumenkrantz
943909514e
lavapipe: handle VkHostImageCopyDevicePerformanceQueryEXT
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24775 >
2023-09-09 13:02:44 +00:00
Mike Blumenkrantz
87fa46c10d
zink: use VkFormatProperties3
...
but wrap it in a smaller type to save some space
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24775 >
2023-09-09 13:02:44 +00:00
Mike Blumenkrantz
e02441b000
zink: simplify redundant is_buffer check
...
it's in the params
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24775 >
2023-09-09 13:02:43 +00:00
Mike Blumenkrantz
738eb0d78c
ci: bump VVL to 1.3.263
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24925 >
2023-09-09 11:29:36 +00:00
Jordan Justen
ddc3c18e4a
intel/dev: Update device string for MTL PCI ID 0x7d55
...
Ref: bspec 55420
Cc: mesa-stable
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Acked-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25073 >
2023-09-09 07:00:30 +00:00
Faith Ekstrand
bb91e0306c
nvk: Invalidate the texture cache in PipelineBarrier
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25135 >
2023-09-09 05:17:05 +00:00
Faith Ekstrand
dff769e2bd
nvk: Set the discard bit for Z/S self-deps
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25135 >
2023-09-09 05:17:05 +00:00
Faith Ekstrand
35e0989779
nvk: Don't add a dummy attachment when gl_SampleMask is written
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25135 >
2023-09-09 05:17:05 +00:00
Ian Romanick
8ce4d7a08d
intel/compiler: Don't evict for workgroup-scope fences
...
Flushing and invalidating caches isn't necessary for workgroup scope
fences. In fact, the DP_FLUSH_TYPE docs (BSpec 54041) say:
"If the fence scope is Local or Threadgroup, HW ignores the flush
type and operates as if it was set to None(no flush)"
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24842 >
2023-09-09 04:41:25 +00:00
Ian Romanick
5eddf60e56
intel/compiler: Combine control barriers with identical memory semantics
...
This prevents the second barrier generating a spurious, identical fence
message as the first barrier.
fossil-db stats on Alchemist:
Totals:
Instrs: 196513342 -> 196512777 (-0.00%); split: -0.00%, +0.00%
Cycles: 14271426028 -> 14271404569 (-0.00%); split: -0.00%, +0.00%
Send messages: 8021892 -> 8021770 (-0.00%)
Totals from 46 (0.01% of 653252) affected shaders:
Instrs: 76761 -> 76196 (-0.74%); split: -0.75%, +0.01%
Cycles: 2027946 -> 2006487 (-1.06%); split: -1.45%, +0.39%
Send messages: 7589 -> 7467 (-1.61%)
Nothing in shader-db was affected.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24842 >
2023-09-09 04:41:25 +00:00
Kenneth Graunke
9f98f20c58
anv: Use nir_opt_barrier_modes() to drop unnecessary barriers
...
fossil-db stats on Alchemist:
Totals:
Instrs: 196514947 -> 196513342 (-0.00%); split: -0.00%, +0.00%
Cycles: 14271450761 -> 14271426028 (-0.00%); split: -0.00%, +0.00%
Send messages: 8022316 -> 8021892 (-0.01%)
Totals from 43 (0.01% of 653252) affected shaders:
Instrs: 98558 -> 96953 (-1.63%); split: -1.63%, +0.00%
Cycles: 15867801 -> 15843068 (-0.16%); split: -0.17%, +0.02%
Send messages: 8997 -> 8573 (-4.71%)
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24842 >
2023-09-09 04:41:24 +00:00