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10573 Commits

Author SHA1 Message Date
Tapani Pälli 7a6ea04795 anv: invalidate L3 read only cache when VF cache is invalidated 
When enabling the caching of index,vertex data in the L3 RO Cache
(L3BypassDisable), we need to use L3ReadOnlyCacheInvalidationEnable
to invalidate cache when buffer is modified by CPU/GPU.

Ref: bspec 46314
Fixes: 6c345ddbe4 ("anv: Cache VB/IB in L3$ for Gfx12")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5941
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14815>
 2022-02-09 10:05:10 +00:00
Tapani Pälli 442628b702 intel/genxml: add PIPE_CONTROL field for L3 read only cache invalidation 
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14815>
 2022-02-09 10:05:10 +00:00
Rohan Garg 03e1e19246 anv: Refactor descriptor copy 
Refactor descriptor copies to use the existing helper functions instead
of rolling our own. In order to facilitate this, we need to store the
appropriate buffer views for the relevant descriptors internally and
reuse them in the helpers.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14909>
 2022-02-09 09:24:37 +00:00
Emma Anholt ef112db311 ci: Bump VK-GL-CTS to 1.3.1.0. 
The main thing is VK 1.3 testing, but also includes test bugfixes.  The
1.3 CTS required an uprev of deqp-runner to handle a new style of test
output, and that deqp-runner brings in some neat new features, too (piglit
in your deqp-runner suite, and extension list checking).

A bunch of VK tests got renamed, so I replaced panvk's custom test list
with simple include filters on the main test list.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> (panvk)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14920>
 2022-02-08 22:16:36 +00:00
Lionel Landwerlin 93a90fc85d anv: fix conditional render for vkCmdDrawIndirectByteCountEXT 
We just forgot about conditional render for this entry point.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 2be89cbd82 ("anv: Implement vkCmdDrawIndirectByteCountEXT")
Tested-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14891>
 2022-02-08 13:33:38 +00:00
Lionel Landwerlin 5d3e419378 anv: enable ray queries 
Only on platforms that support it.

v3: Split out code setting up ray query shadow buffer (Caio)
    Don't forget to setup ray query globals even when no shadow buffer
    is used (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin c78be5da30 intel/fs: lower ray query intrinsics 
v2: Add helper for acceleration->root_node computation (Caio)

v3: Update comment on "done" bit (Caio)
    Remove progress bool value for impl function (Caio)
    Don't use nir_shader_instructions_pass to search the shader (Caio)

v4: Rename variable for if/else block (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin 712d8fb043 intel/nir: document RT builder 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin 0465714790 intel/nir/rt: add more helpers for ray queries 
v2: Split stack_id helper in sync/async version (Caio)
    Fixup a few bit field mistake (Caio)
    Simplify some bitfield manipulations (Caio)

v3: Remove duplicated helper (Caio)
    Simplify brw_nir_rt_set_dword_bit_at (Caio)
    Comment brw_nir_rt_query_mark_init (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin d5b994ec8a intel/nir/rt: make RT manipulation helpers helper invocations ready 
Since we need to be able to perform ray queries in helper invocations,
we need to have all the helpers properly tag their load/store
operations so that they operate in helper lanes.

v2: Switch from macros to inline functions (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin fb69fed65b intel/nir: document committed argument 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin b0624e414f intel/fs: make trivial shader complete tracing operations with missing shaders 
v2: Apply workaround only on < DG2-512-C0 & < DG2-128-B0

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin 35bd19f53d intel/nir/rt: load bvh_level value off mem_hit structure 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin 6d9ae6ec1e intel: add a new intrinsic to get the shader stage from bindless shaders 
We'll use this to apply ray tracing operations in our trivial return
shader based on the stage we're in.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin bb40e999d1 intel/nir: use a single intel intrinsic to deal with ray traversal 
In the future we'll want to reuse this intrinsic to deal with ray
queries. Ray queries will use a different global pointer and
programmatically change the control/level arguments of the trace send
instruction.

v2: Comment on barrier after sync trace instruction (Caio)
    Generalize lsc helper (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin 39f6cd5d79 intel/nir: fix shader call lowering 
We're replacing a generic instruction by an intel specific one, we
need to remove the previous instruction.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c5a42e4010 ("intel/fs: fix shader call lowering pass")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin 2665595244 intel/fs: limit FS dispatch to SIMD16 when using ray queries 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin 57eed6698b intel/compiler: tracker number of ray queries in prog_data 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin 9b366243ed intel/fs: load more fields from BVH instance leafs 
v2: Fixup mask (Caio)
    Drop old comment (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:24 +00:00
Lionel Landwerlin c89024e446 intel/fs: don't set allow_sample_mask for CS intrinsics 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 77486db867 ("intel/fs: Disable sample mask predication for scratch stores")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:24 +00:00
Lionel Landwerlin 9d22f8ed23 intel/fs: add support for ACCESS_ENABLE_HELPER 
v2: Factor out fragment shader masking on send messages (Caio)
    Update comments (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:24 +00:00
Lionel Landwerlin c199f44d17 intel/fs: name sources for A64 opcodes 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:24 +00:00
Lionel Landwerlin 23ce94ff7e intel/nir/rt: add a new number of SIMD lanes per DSS helper 
v2: Add prefix brw_nir_rt (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:24 +00:00
Lionel Landwerlin 61c9b7a82e intel/fs: add support for Eu/Thread/Lane id 
This index will be used for accessing ray query data in memory.

v2: Drop a MOV (Caio)

v3: Rework back code emission (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:24 +00:00
Lionel Landwerlin 3dabe93257 intel/fs: rework dss_id opcode into generic opcode 
We'll want different types of IDs based on topology. Let's make this
more flexible and also move the bit shifting code a layer above where
it's easier to do bitshifting operations, especially if you need to
stash things into temporary registers.

v2: Keep previous comment.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:24 +00:00
Lionel Landwerlin 4deb8e86df nir: change intel dss_id intrinsic to topology_id 
This will allow to reuse the same intrinsic for various topology based
ID.

v2: fix intrinsic comment (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:24 +00:00
Lionel Landwerlin fdb74a77d2 intel/ds: fix compilation with perfetto 
Forgot to test with perfetto...

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 9da3d714b8 ("anv: add dynamic rendering traces")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5992
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Tested-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14914>
 2022-02-08 12:29:21 +00:00
Kenneth Graunke 9c5dc4985b blorp: Assert that blorp_copy() on the blitter can handle it 
Safeguards against callers that don't guarantee the necessary things.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14912>
 2022-02-07 09:50:01 -08:00
Kenneth Graunke d2646e147b intel/genxml: Add missing MI_FLUSH_DW::Flush CCS field 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14912>
 2022-02-07 09:50:01 -08:00
Kenneth Graunke c7a357787f anv: Increase maxUniformBufferRange to 2^30 when not using the sampler 
The limit here is from the RENDER_SURFACE_STATE height/width/depth
fields - it's 2^30 for ISL_FORMAT_RAW buffers, and 2^27 otherwise.

anv_isl_format_for_descriptor_type() uses ISL_FORMAT_R32G32B32A32_FLOAT
for uniform buffers when compiler->indirect_ubos_use_sampler is set
(Icelake and earlier), but ISL_FORMAT_RAW when it isn't (Tigerlake+).

So we can increase the limit on Tigerlake and later.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14892>
 2022-02-05 11:23:16 -08:00
Lionel Landwerlin 9da3d714b8 anv: add dynamic rendering traces 
v2: Get rid of subpass_count

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14798>
 2022-02-04 23:43:48 +00:00
Lionel Landwerlin d0811ca046 anv: flush utrace before at device destroy 
Ensuring any remaining traces are displayed.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14798>
 2022-02-04 23:43:48 +00:00
Dylan Baker 2f916f2be6 meson: add support for meson devenv with vulkan 
Meson devenv is a feature added in meson 0.58 (thus the features is
version guarded) that allows creating a shell environment with
environment variables automatically setup for running the project inside
the build dir. Some variables (such as LD_LIBRARY_PATH and PATH) are set
automatically, others must be added by the project.

For vulkan is is relativley simple, we create a new, uninstalled, icd
file for each driver and set the VK_ICD_FILENAMES variable
appropriately. This can be used with:

```sh
meson devenv -C $builddir
```

then, vulkan applications will automatically use the uninstall vulkan
driver, no need to install.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14826>
 2022-02-04 09:08:47 -08:00
Emma Anholt a177f0de8f ci: Uprev vulkan-cts to 1.2.8.0 
This brings in some interesting new vulkan tests and fixes for the
spurious KHR-GL TF failures.  Also, reduces the runtime of
dEQP-GLES31.functional.ssbo.layout.random.all_shared_buffer.36 so that it
should stop timing out.

Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13779>
 2022-02-03 22:41:23 +00:00
Emma Anholt dbcdededb2 intel: Add missing dep of gen_*_header.py on utils.py. 
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14725>
 2022-02-02 11:21:57 -08:00
Caio Oliveira 242c7a6513 anv: Add experimental support for VK_NV_mesh_shader 
Enable setting ANV_EXPERIMENTAL_NV_MESH_SHADER=1 environment variable.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
 2022-02-02 18:17:57 +00:00
Caio Oliveira d9416cd8bd intel/dev: Enable Mesh Shading for DG2 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
 2022-02-02 18:17:57 +00:00
Marcin Ślusarz da273b2b7b anv: Put first few push constants directly into Task/Mesh InlineData 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
 2022-02-02 18:17:57 +00:00
Marcin Ślusarz 27c32fd14b anv: include ClipDistance array in mesh shader per-vertex output 
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
 2022-02-02 18:17:57 +00:00
Marcin Ślusarz c95b4ac2eb anv: tell the hardware about gl_[Clip|Cull]Distance in mesh shaders 
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
 2022-02-02 18:17:57 +00:00
Marcin Ślusarz bbde9f2448 anv: Implement indirect dispatch for Mesh pipeline 
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
 2022-02-02 18:17:57 +00:00
Marcin Ślusarz 18e628135d anv: Add support for UBOs, SSBOs and push constants in Mesh pipeline 
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
 2022-02-02 18:17:57 +00:00
Marcin Ślusarz f12f5ae2f8 anv: Add support for non-zero firstTask in vkCmdDrawMeshTasksNV 
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
 2022-02-02 18:17:57 +00:00
Marcin Ślusarz 97da3e0814 anv: Enable conditional rendering in vkCmdDrawMeshTasksNV 
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
 2022-02-02 18:17:57 +00:00
Caio Oliveira ef04caea9b anv: Implement Mesh Shading pipeline 
The Mesh pipeline is implemented as a variant of the
regular (primitive) Graphics Pipeline.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
 2022-02-02 18:17:57 +00:00
Caio Oliveira 325ac235a7 anv: Add boilerplate for VK_NV_mesh_shader 
Use minimum values for the properties.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
 2022-02-02 18:17:57 +00:00
Caio Oliveira c93cbc77f7 intel/common: Add helper for URB allocation in Mesh pipeline 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
 2022-02-02 18:17:57 +00:00
Caio Marcelo de Oliveira Filho b01c73fd0a intel: Add INTEL_URB_DEREF_BLOCK_SIZE_MESH 
And corresponding value in XML.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13662>
 2022-02-02 18:17:57 +00:00
Lionel Landwerlin 665ffd4bf9 anv: Update VK_KHR_fragment_shading_rate for newer HW 
Per primitive & attachment shading rate support added.

v2: Rebase on KHR_dynamic_rendering

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13739>
 2022-02-02 17:09:46 +00:00
Lionel Landwerlin fc837e9f8b anv/pass: rely on precomputed dynamic rendering pass/subpass more 
For instance, the current code in genX_cmd_buffer.c assumes that the
depth/stencil attachments & resolves will be at the end of all
attachments, but that won't be the case anymore with fragment rate
shading.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13739>
 2022-02-02 17:09:46 +00:00