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Author SHA1 Message Date
Zhang He 5d7f3753d7 iris, crocus: fix a typo and break comment line correctly 
Signed-off-by: Zhang He <zhanghe9702@163.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31557>
 2024-10-09 17:56:23 +00:00
Christian Gmeiner 04521c14b0 etnaviv: Improve split sampler check 
Check if the block size is bigger then 64. We want to block
e.g. one of the following formats:
 - R32G32B32A32_FLOAT
 - R32G32B32A32_SINT
 - R32G32B32A32_ZINT

Unbreaks e.g. dEQP-GLES3.functional.fbo.completeness.renderable.texture.color0.rgb16i

Fixes: e481c1269c ("etnaviv: disable 64bpp render/sampler formats")
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27111>
 2024-10-09 15:17:33 +00:00
Juan A. Suarez Romero 992ada2f8f v3d: add new flake 
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31572>
 2024-10-09 09:17:36 +02:00
Samuel Pitoiset 336f80137d radv: fix conditional rendering with DGC preprocessing on compute 
Preprocess now must use the same conditional rendering state as the
execute, so the DGC prepare shader must reset the number of sequences
to generate an empty cmdbuf for compute.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31563>
 2024-10-08 12:35:16 -04:00
David Rosca 89ea2b6c26 radeonsi/vcn: Don't hardcode nal_ref_idc 
For slice header use the value parsed by frontend.
For SPS and PPS directly output first NAL byte from packed header.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31354>
 2024-10-08 15:24:36 +00:00
David Rosca 8880f0f141 radeonsi/vcn: Use correct initial DPB size for HEVC encode 
sps_max_dec_pic_buffering_minus1 specifies the maximum number of
references, same as H264 max_num_ref_frames.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31354>
 2024-10-08 15:24:36 +00:00
David Rosca 88c134d496 radeonsi/vcn: Allow per-frame QP and max frame size changes 
Also don't reset QP values when rate control changes because
QP is ignored with rate control enabled anyway.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31354>
 2024-10-08 15:24:36 +00:00
Rob Clark 85d7826afa freedreno/ir3: Add more cat1 float-immed cases 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31446>
 2024-10-08 13:50:05 +00:00
Rob Clark 8ddfe9cfc8 freedreno/ir3: Fix cat1 parser ambiguity vs FLUTs 
The lexer can't really tell the difference.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31446>
 2024-10-08 13:50:05 +00:00
Rob Clark 0633a23dc9 freedreno/ir3: Add half-FLUT cases 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31446>
 2024-10-08 13:50:05 +00:00
Rob Clark 771fe03787 freedreno/ir3: Fix GPU name in disasm test 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31446>
 2024-10-08 13:50:05 +00:00
Lucas Stach a422ebc500 etnaviv: flush shader caches when UBO content is modified 
Shader load/stores are cached by the shader L1 cache. As UBOs on etnaviv
are implemented as regular loads from the constant buffer, this cache
needs to be flushed whenever the content of a constant buffer is modified.

Fixes most of the currently failing dEQP-GLES3.functional.ubo.* on GC3000.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31527>
 2024-10-08 10:32:16 +00:00
Tapani Pälli 78b614b333 anv: add depth, DC and L3 fabric flush for aux map invalidation 
These should be included according to table in Bspec 43904.

Patch removes PIPE_CONTROL_STATE_CACHE_INVALIDATE based on HSDES.

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29764>
 2024-10-08 08:45:40 +00:00
Tapani Pälli 3e29ea69ce iris: add depth, DC and L3 fabric flush for aux map invalidation 
These should be included according to table in Bspec 43904.

Patch removes PIPE_CONTROL_STATE_CACHE_INVALIDATE based on HSDES.

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29764>
 2024-10-08 08:45:40 +00:00
Tapani Pälli 11774075a3 iris: add plumbing/support for L3 fabric flush 
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29764>
 2024-10-08 08:45:40 +00:00
Tapani Pälli e3814dee1a anv: add plumbing/support for L3 fabric flush 
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29764>
 2024-10-08 08:45:40 +00:00
Tapani Pälli 03f762f90c intel/ds: add L3 fabric flush support 
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29764>
 2024-10-08 08:45:40 +00:00
Tapani Pälli 8cb08830e6 intel/genxml: introduce L3 Fabric Flush for gfx12 
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29764>
 2024-10-08 08:45:40 +00:00
Peyton Lee 0dacdba804 radeonsi: correct map and unmap function timing 
The timing of buffer map and unmap is wrong.
Correct the usage of map and unmap function.

Signed-off-by: Peyton Lee <peytolee@amd.com>
 2024-10-08 13:44:24 +08:00
Samuel Pitoiset 5bd825a4b8 vulkan: fix merging bind sparse submits together 
Looks like this was completely broken because what we want is to merge
first/second binds to the merged object.

This fixes new CTS dEQP-VK.sparse_resources.image_sparse_binding.*.

Fixes: bba6bf33a8 ("vulkan/queue: Merge submits when possible")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31545>
 2024-10-07 15:59:42 +00:00
Mike Blumenkrantz e46dffddb1 util/vbuf: rename/consolidate some bools 
now that the pipe caps are unified, this makes reading a bit easier

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31482>
 2024-10-07 13:09:59 +00:00
Mike Blumenkrantz d008aaa6da gallium: rework vbuf alignment pipe caps 
this consolidates 4 pipe caps into 1 using an enum

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Neha Bhende <neha.bhende@broadcom.com>

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31482>
 2024-10-07 13:09:59 +00:00
Samuel Pitoiset afe28429f9 zink/ci: update list of expected failures for NAVI10 
Looks like this test is also fixed on NAVI10.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31543>
 2024-10-07 12:33:41 +00:00
Samuel Pitoiset 1cbc316999 radv: remove RADV_THREAD_TRACE_TRIGGER completely 
SteamOS switched to VK_MESA_TRACE_TRIGGER since a while.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31539>
 2024-10-07 11:42:38 +00:00
Samuel Pitoiset 2e66ab265d radv: squash radv_get_memory_fd() with radv_GetMemoryFdKHR() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31539>
 2024-10-07 11:42:37 +00:00
Samuel Pitoiset 78666f1caf radv: remove RADV_MAX_DRM_DEVICES 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31539>
 2024-10-07 11:42:37 +00:00
Daniel Schürmann 19583023a2 aco/ra: remove unnecessary check for duplicate precolored operands 
An instruction can have at most one operand precolored to the same register.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31362>
 2024-10-07 07:00:20 +00:00
Daniel Schürmann 9b2c4c4644 aco/ra: manually fill killed operands when required 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31362>
 2024-10-07 07:00:20 +00:00
Daniel Schürmann b530b67c73 aco/ra: add RegisterFile::fill_killed_operands(Instruction*) helper 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31362>
 2024-10-07 07:00:20 +00:00
Daniel Schürmann 1499848487 aco/live_var_analysis: don't test whether phis are assigned to VCC 
This check is redundant.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31362>
 2024-10-07 07:00:19 +00:00
Daniel Schürmann 1d3e01cd62 aco: remove Program::allocationId 
It is a duplicate of temp_rc.size().

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31362>
 2024-10-07 07:00:19 +00:00
Daniel Schürmann 39fc327b8f aco/reindex_ssa: remove update_live_out parameter 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31362>
 2024-10-07 07:00:19 +00:00
Daniel Schürmann bc2d166b50 aco/lower_to_hw: don't allocate new temporaries 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31362>
 2024-10-07 07:00:19 +00:00
Daniel Schürmann 30e7644e5f aco: simplify Definition constructors 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31362>
 2024-10-07 07:00:19 +00:00
Erico Nunes b274e32de3 lima/ci: update piglit ci expectations 
Some tests were affected during lima lab downtime.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31537>
 2024-10-06 09:54:30 +00:00
Erico Nunes e60c735594 lima/ci: define FDO_HTTP_CACHE_URI for caching-proxy 
This did not use to exist in the lima lab, but it does now.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31537>
 2024-10-06 09:54:30 +00:00
Karol Herbst 1301d61de4 rusticl: allow devices to be enabled by default 
Reviewed-by: David Heidelberg <david@ixit.cz>
Acked-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31202>
 2024-10-05 22:13:12 +00:00
Alyssa Rosenzweig 911606081f hk: drop gunk 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31532>
 2024-10-05 18:30:13 +00:00
Alyssa Rosenzweig 6f3d9cba75 hk: fail probing silently 
so we don't spam qualcomm devices

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31532>
 2024-10-05 18:30:13 +00:00
Alyssa Rosenzweig 921aeeaf5d hk: check arch in pipeline cache 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31532>
 2024-10-05 18:30:13 +00:00
Alyssa Rosenzweig 870dbfae12 hk: drop FSR todo 
idk if we'll even do this ext.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31532>
 2024-10-05 18:30:13 +00:00
Alyssa Rosenzweig 423318b7b2 hk: support geom/tess subgroups 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31532>
 2024-10-05 18:30:13 +00:00
Alyssa Rosenzweig 76e18c23de hk: fix store_op_none 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31532>
 2024-10-05 18:30:13 +00:00
Alyssa Rosenzweig 71d76c318d agx: inline texture states into EOT 
fixes extra moves.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31532>
 2024-10-05 18:30:13 +00:00
Alyssa Rosenzweig a0c9cba600 asahi: rm include 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31532>
 2024-10-05 18:30:13 +00:00
Alyssa Rosenzweig 57c357befb hk: advertise KHR_dynamic_rendering_local_read 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31532>
 2024-10-05 18:30:13 +00:00
Alyssa Rosenzweig 9845e01f0f asahi,hk: implement remapping in epilog 
for DRLR

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31532>
 2024-10-05 18:30:13 +00:00
Alyssa Rosenzweig 03a81d79f8 hk: Reset rendering attachment locations in BeginCommandBuffer/Rendering 
backport of b1abf771c7 ("nvk: Reset rendering attachment locations in
BeginCommandBuffer/Rendering")

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31532>
 2024-10-05 18:30:13 +00:00
Alyssa Rosenzweig d741adf1f3 hk: perf debug some meta 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31532>
 2024-10-05 18:30:13 +00:00
Alyssa Rosenzweig 713aa46a8e hk: perf debug resolves 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31532>
 2024-10-05 18:30:13 +00:00