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Samuel Pitoiset 075d8aeb67 radv: advertise extendedDynamicState2PatchControlPoints 
For less stuttering with Zink, also required by Zink for full GPL.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6584
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18344>
 2022-09-13 08:24:14 +00:00
Samuel Pitoiset eef1511437 radv: implement dynamic patch control points 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18344>
 2022-09-13 08:24:14 +00:00
Samuel Pitoiset 76960e2d93 radv: move emitting GE_CNTL for non-NGG pipelines from the cmdbuf 
GE_CNTL is the equivalent of IA_MULTI_VGT_PARAM on GFX9 and older.
Calling this function for every draw shouldn't really hurt in practice
because only non-NGG pipelines need this.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18344>
 2022-09-13 08:24:14 +00:00
Samuel Pitoiset 0bf822144f radv: move emitting PRIMGROUP_SIZE for <= GFX9 from the cmdbuf 
The number of tessellation patches that is computed from the number
of patch control points might change dynamically too.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18344>
 2022-09-13 08:24:14 +00:00
Samuel Pitoiset 556b297977 radv: pass the number of patch control points to si_get_ia_multi_vgt_param() 
To prepare for dynamic patch control points.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18344>
 2022-09-13 08:24:14 +00:00
Samuel Pitoiset 5bfac03c8a radv: add ABI lowering support for dynamic patch control points 
The number of patch control points (TCS) and the number of patches
(TCS/TES) is read from user SGPRs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18344>
 2022-09-13 08:24:14 +00:00
Samuel Pitoiset 8253ec3855 radv: add shader arguments for dynamic patch control points 
This introduces two new user SGPRS:

- tcs_offchip_layout: input patch size and number of patches in TCS
- tes_num_patches: number of patches in TES

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18344>
 2022-09-13 08:24:14 +00:00
Samuel Pitoiset 9a6aa3e23a aco: prevent a division by zero when patch control points is dynamic 
tess_input_vertices is zero if the state is dynamic.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18344>
 2022-09-13 08:24:14 +00:00
Samuel Pitoiset 21d9390b0e radv: set workgroup_size to 256 when patch control points is dynamic 
It's the maximum possible value. This is to ensure that compilers
don't optimize away barriers, like in ACO when workgroup_size is less
than or equal to wave_size, s_barrier is considered a no-op.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18344>
 2022-09-13 08:24:14 +00:00
Samuel Pitoiset 9373dbdfcc radv: skip computing some tess info when patch control points is dynamic 
We don't know the value.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18344>
 2022-09-13 08:24:14 +00:00
Samuel Pitoiset 0cea8276bc radv: add radv_pipeline_key::dynamic_patch_control_points 
This will be used to compile different tessellation shaders when
patch control points is dynamic.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18344>
 2022-09-13 08:24:14 +00:00
Samuel Pitoiset 54bd5851ba radv: emit the LDS size for TCS directly from the pipeline on GFX9+ 
To be consistent with the LDS shader config for LS, and this will
be emitted from the cmdbuf for dynamic patch control points.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18344>
 2022-09-13 08:24:14 +00:00
Samuel Pitoiset 9a67edaa56 radv: reword a comment about dynamic states when rasterization is disabled 
Make it more generic instead of listing all states.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18344>
 2022-09-13 08:24:14 +00:00
Erik Faye-Lund 3454ff21e5 docs/zink: document rgtc requirement 
OpenGL 3.0 requires RGTC support, and until we have emulation in place,
we should document that requirement.

Fixes: d50e8554b9 ("zink: add feature-documentation")
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18549>
 2022-09-13 08:15:40 +00:00
Samuel Pitoiset 7c34b31db2 radv: upload the PS epilog in the existing pipeline BO 
This reduces the number of BOs needed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18363>
 2022-09-13 07:03:14 +00:00
Samuel Pitoiset 36d9fc5b5f radv: store the binary to radv_shader_part 
This is currently always freed after the upload but this will allow
to upload the PS epilog later.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18363>
 2022-09-13 07:03:14 +00:00
Samuel Pitoiset 702bcffc89 radv: split upload_shader_part() in two parts 
One that creates the radv_shader_part object and one that uploads it.
This will be used to upload the PS epilogs as part of the existing
pipeline BO.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18363>
 2022-09-13 07:03:14 +00:00
Samuel Pitoiset c59d15c80c radv: store the VS prologs/PS epilogs VA at upload time 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18363>
 2022-09-13 07:03:14 +00:00
Samuel Pitoiset 0ee5217fdd radv/ci: re-enable dEQP-VK.renderpass2.depth_stencil_resolve.*_samplemask 
Since RADV switched to 100% dynamic rendering, image transitions for
attachments not used in a subpass are correctly performed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18542>
 2022-09-13 06:39:50 +00:00
Samuel Pitoiset f8d887527a radv: add a pointer to radv_shader_binary in radv_shader 
With GPL, we will have to keep the shader binary in the library for
uploading it later, so it's easier to have a pointer in radv_shader.
The shader binary will be freed when the library is destroyed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18515>
 2022-09-13 06:19:18 +00:00
Caio Oliveira e612f32e1a intel/compiler: Use brw_ud* helpers in thread payload code 
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18176>
 2022-09-13 01:44:24 +00:00
Caio Oliveira f019687d23 intel/compiler: Add a few more brw_ud* helpers 
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18176>
 2022-09-13 01:44:24 +00:00
Caio Oliveira 3272868218 intel/compiler: Make thread_payload struct abstract 
Each shader stage has its own struct and will instantiate it, so the
base class doesn't need to be instantiated anymore.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18176>
 2022-09-13 01:44:24 +00:00
Caio Oliveira 0b6e613de8 intel/compiler: Create and use struct for CS thread payload 
Move subgroup_id, that's only used by CS for verx10 < 125, as part of
the payload too -- even though is not, strictly speaking.

Note the thread execution of Task/Mesh is similar enough, so we make
their common struct inherit from cs_thread_payload.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18176>
 2022-09-13 01:44:24 +00:00
Caio Oliveira d8461e975a intel/compiler: Export brw_get_subgroup_id_param_index() 
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18176>
 2022-09-13 01:44:24 +00:00
Caio Oliveira 9de790760e intel/compiler: Create and use struct for Bindless thread payload 
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18176>
 2022-09-13 01:44:24 +00:00
Caio Oliveira a70378f292 intel/compiler: Store start of ICP handles in GS thread payload struct 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18176>
 2022-09-13 01:44:24 +00:00
Caio Oliveira 5b6987daee intel/compiler: Create and use struct for GS thread payload 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18176>
 2022-09-13 01:44:24 +00:00
Caio Oliveira 7664c85b1d intel/compiler: Create and use struct for TASK and MESH thread payloads 
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18176>
 2022-09-13 01:44:24 +00:00
Caio Oliveira 0ca65b3c4c intel/compiler: Create and use struct for VS thread payload 
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18176>
 2022-09-13 01:44:24 +00:00
Caio Oliveira 19c6e1b447 intel/compiler: Create and use struct for TES thread payload 
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18176>
 2022-09-13 01:44:24 +00:00
Caio Oliveira eb837dd23b intel/compiler: Store start of ICP handles in TCS thread payload struct 
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18176>
 2022-09-13 01:44:24 +00:00
Caio Oliveira 2622fc3af1 intel/compiler: Store Primitive ID in TCS thread payload struct 
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18176>
 2022-09-13 01:44:24 +00:00
Caio Oliveira 9a9b1119b4 intel/compiler: Store Patch URB output in TCS thread payload struct 
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18176>
 2022-09-13 01:44:24 +00:00
Caio Oliveira e21359ed0e intel/compiler: Create struct for TCS thread payload 
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18176>
 2022-09-13 01:44:24 +00:00
Caio Oliveira 73920b7e2f intel/compiler: Use FS thread payload only for FS 
Move the setup into the FS thread payload constructor.  Consolidate
payload setup for that in brw_fs_thread_payload.cpp file.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18176>
 2022-09-13 01:44:24 +00:00
Caio Oliveira dab66d20a7 intel/compiler: Make a type for Thread Payload and FS variant 
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18176>
 2022-09-13 01:44:24 +00:00
Jordan Justen 582bad0256 intel/devinfo: Add MTL platforms enums and intel_device_info_is_mtl() 
Ref: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/drm/i915_pciids.h?h=v6.0-rc4#n736
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18482>
 2022-09-13 00:30:22 +00:00
Alyssa Rosenzweig 6177c43bb9 nir/lower_blend: Avoid emitting unnecessary fsats 
The option struct passed to nir_lower_blend doesn't have a "blending
disabled" flag. Unless blending is skipped due to logic ops or
framebuffer formats, nir_lower_blend always blends, even if the blend
mode is "replace" (corresponding to the API level blend disable).

That's mostly okay, since NIR can optimize out the code, at the expense
of a little compile time. However, there's a catch: nir_lower_blend
emits fsat at the start of the shader (for UNORM framebuffers, or
fsat_signed for SNORM). We can expect hardware to saturate the input to
store_output itself, so these operations are redundant, but it's tricky
to optimize these instructions out otherwise. Don't even try: detect the
replace blend mode and don't call nir_blend in that case. Colour masking
is still applied as usual.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18535>
 2022-09-12 23:44:54 +00:00
Timur Kristóf 5f68262de3 radv: Enable subgroup feature bits for mesh and task shaders. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18520>
 2022-09-12 23:23:27 +00:00
Timur Kristóf 3335f9b19f radv: Replace NV_mesh_shader macros with EXT. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18521>
 2022-09-12 22:59:56 +00:00
Yiwei Zhang fb756d7949 venus: avoid fixing pipeline if not derivative 
Fixes: 33e791bc02 ("venus/pipeline: Ignore basePipelineHandle")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18555>
 2022-09-12 22:10:45 +00:00
Yiwei Zhang 84a0056033 venus: zero out the pipeline handles 
We only have to zero out the handles on failure, which is missed. For
pipelines, we can just do it at the beginning for simplicity.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18555>
 2022-09-12 22:10:45 +00:00
Yiwei Zhang d8809b5edc venus: vn_ResetDescriptorPool to reset mutable type states 
Fixes: de5879447b ("Track bitset when create descriptor pool")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18555>
 2022-09-12 22:10:45 +00:00
Yiwei Zhang a49f3069f4 venus: fix an oob in descriptor pool state restoration 
Fixes: de5879447b ("Track bitset when create descriptor pool")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18555>
 2022-09-12 22:10:45 +00:00
Adam Jackson 4d8420dcb4 Revert "glx: Use XSaveContext, delete glxhash.c" 
This reverts commit 057c58b39b.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7242
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18556>
 2022-09-12 21:18:15 +00:00
Pavel Ondračka e90cafa435 r300: add special path for merging movs with the same source 
This is quite rare but still helps few tesseract shaders and
is quite straightforward.

shader-db with RV530:
total instructions in shared programs: 135671 -> 135646 (-0.02%)
instructions in affected programs: 322 -> 297 (-7.76%)
helped: 13
HURT: 0

Reviewed-by: Filip Gawin <filip@gawin.net>
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18288>
 2022-09-12 20:29:33 +00:00
Pavel Ondračka 9156a7aab5 r300: merge together MOV and MAD instructions 
Assuming they write different channels of the same destination
and they share at least one source or one of the sources is
RC_FILE_NONE.

shader-db with RV530:
total instructions in shared programs: 136033 -> 135673 (-0.26%)
instructions in affected programs: 22987 -> 22627 (-1.57%)
total temps in shared programs: 18977 -> 18965 (-0.06%)
temps in affected programs: 74 -> 62 (-16.22%)

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6188

Reviewed-by: Filip Gawin <filip@gawin.net>
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18288>
 2022-09-12 20:29:33 +00:00
Pavel Ondračka 708b2b611a r300: run copy propagate once more after merging channels 
The previous pass can actually create some new movs that are eligible
for copy propagation. There is some minor inctruction and temps
improvement but the biggest win is a gained gnome-shell shader.
Nine more still fail with too many instructions though.

GAINED: shaders/gnome-shell-42/6-1.shader_test FS

shader-db with RV530:
total instructions in shared programs: 136382 -> 135538 (-0.62%)
instructions in affected programs: 31021 -> 30177 (-2.72%)
total temps in shared programs: 18939 -> 18937 (-0.01%)
temps in affected programs: 563 -> 561 (-0.36%)

Reviewed-by: Filip Gawin <filip@gawin.net>
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18288>
 2022-09-12 20:29:33 +00:00
Tapani Pälli 40c2e0a317 intel/compiler: fix assert from ver to verx10 
Fixes: 027b8b4249 ("intel/compiler: Add helper for barrier message payload setup for gfx >= 125")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18546>
 2022-09-12 19:03:17 +00:00