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radv: determine the ES stage for merged NGG shaders compiled separately

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27575>
This commit is contained in:
Samuel Pitoiset
2024-02-12 14:44:58 +01:00
committed by Marge Bot
parent eea75777be
commit b98a7abcd6
1 changed files with 11 additions and 1 deletions
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src/amd/vulkan/radv_pipeline_graphics.c
+11 -1
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@@ -2955,9 +2955,19 @@ radv_emit_hw_ngg(const struct radv_device *device, struct radeon_cmdbuf *ctx_cs,
{
const struct radv_physical_device *pdevice = device->physical_device;
uint64_t va = radv_shader_get_va(shader);
gl_shader_stage es_type = shader->info.stage == MESA_SHADER_GEOMETRY ? shader->info.gs.es_type : shader->info.stage;
gl_shader_stage es_type;
const struct gfx10_ngg_info *ngg_state = &shader->info.ngg_info;
if (shader->info.stage == MESA_SHADER_GEOMETRY) {
if (shader->info.merged_shader_compiled_separately) {
es_type = es->info.stage;
} else {
es_type = shader->info.gs.es_type;
}
} else {
es_type = shader->info.stage;
}
radeon_set_sh_reg(cs, R_00B320_SPI_SHADER_PGM_LO_ES, va >> 8);
radeon_set_sh_reg_seq(cs, R_00B228_SPI_SHADER_PGM_RSRC1_GS, 2);