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ac/nir/tess: Add tcs_inputs_read to LS output lowering.

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This commit just adds the field, it will be taken into use
in a following commit.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29812>
This commit is contained in:
Timur Kristóf
2024-06-20 17:07:35 +02:00
committed by Marge Bot
parent a8d78f889e
commit b5f53fdf32
4 changed files with 11 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/amd/common/ac_nir.h
+1
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@@ -77,6 +77,7 @@ void
ac_nir_lower_ls_outputs_to_mem(nir_shader *ls,
ac_nir_map_io_driver_location map,
bool tcs_in_out_eq,
uint64_t tcs_inputs_read,
uint64_t tcs_temp_only_inputs);
void
src/amd/common/ac_nir_lower_tess_io_to_mem.c
+8
View File
@@ -124,6 +124,11 @@ typedef struct {
*/
uint64_t tcs_temp_only_inputs;
/* Bit mask of inputs read by the TCS,
* this is used for linking VS outputs to TCS inputs.
*/
uint64_t tcs_inputs_read;
/* Bit mask of TCS outputs read by TES. */
uint64_t tes_inputs_read;
uint32_t tes_patch_inputs_read;
@@ -969,12 +974,14 @@ void
ac_nir_lower_ls_outputs_to_mem(nir_shader *shader,
ac_nir_map_io_driver_location map,
bool tcs_in_out_eq,
uint64_t tcs_inputs_read,
uint64_t tcs_temp_only_inputs)
{
assert(shader->info.stage == MESA_SHADER_VERTEX);
lower_tess_io_state state = {
.tcs_in_out_eq = tcs_in_out_eq,
.tcs_inputs_read = tcs_inputs_read,
.tcs_temp_only_inputs = tcs_in_out_eq ? tcs_temp_only_inputs : 0,
.map_io = map,
};
@@ -992,6 +999,7 @@ ac_nir_lower_hs_inputs_to_mem(nir_shader *shader,
assert(shader->info.stage == MESA_SHADER_TESS_CTRL);
lower_tess_io_state state = {
.tcs_inputs_read = shader->info.inputs_read,
.tcs_in_out_eq = tcs_in_out_eq,
.map_io = map,
};
src/amd/vulkan/nir/radv_nir_lower_io.c
+1 -1
View File
@@ -134,7 +134,7 @@ radv_nir_lower_io_to_mem(struct radv_device *device, struct radv_shader_stage *s
if (nir->info.stage == MESA_SHADER_VERTEX) {
if (info->vs.as_ls) {
NIR_PASS_V(nir, ac_nir_lower_ls_outputs_to_mem, map_output, info->vs.tcs_in_out_eq,
info->vs.tcs_temp_only_input_mask);
info->vs.hs_inputs_read, info->vs.tcs_temp_only_input_mask);
return true;
} else if (info->vs.as_es) {
NIR_PASS_V(nir, ac_nir_lower_es_outputs_to_mem, map_output, pdev->info.gfx_level, info->esgs_itemsize);
src/gallium/drivers/radeonsi/si_shader.c
+1 -1
View File
@@ -1841,7 +1841,7 @@ static bool si_lower_io_to_mem(struct si_shader *shader, nir_shader *nir,
if (nir->info.stage == MESA_SHADER_VERTEX) {
if (key->ge.as_ls) {
NIR_PASS_V(nir, ac_nir_lower_ls_outputs_to_mem, si_map_io_driver_location,
key->ge.opt.same_patch_vertices, tcs_vgpr_only_inputs);
key->ge.opt.same_patch_vertices, ~0ULL, tcs_vgpr_only_inputs);
return true;
} else if (key->ge.as_es) {
NIR_PASS_V(nir, ac_nir_lower_es_outputs_to_mem, si_map_io_driver_location,