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radeonsi: don't use SI_COHERENCY_NONE in si_compute_shorten_ubyte_buffer

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This removes the last non-AMD_TEST use of SI_COHERENCY_NONE.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31168>
This commit is contained in:
Marek Olšák
2024-08-19 20:55:03 -04:00
parent 68adac4d28
commit 413bdcd7c3
2 changed files with 6 additions and 6 deletions
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src/gallium/drivers/radeonsi/si_compute_blit.c
+1 -6
View File
@@ -415,11 +415,6 @@ void si_compute_shorten_ubyte_buffer(struct si_context *sctx, struct pipe_resour
if (!sctx->cs_ubyte_to_ushort)
sctx->cs_ubyte_to_ushort = si_create_ubyte_to_ushort_compute_shader(sctx);
/* Use COHERENCY_NONE to get SI_CONTEXT_WB_L2 automatically used in
* si_launch_grid_internal_ssbos.
*/
enum si_coherency coher = SI_COHERENCY_NONE;
si_improve_sync_flags(sctx, dst, src, &flags);
struct pipe_grid_info info = {};
@@ -434,7 +429,7 @@ void si_compute_shorten_ubyte_buffer(struct si_context *sctx, struct pipe_resour
sb[1].buffer_offset = src_offset;
sb[1].buffer_size = count;
si_launch_grid_internal_ssbos(sctx, &info, sctx->cs_ubyte_to_ushort, flags, coher,
si_launch_grid_internal_ssbos(sctx, &info, sctx->cs_ubyte_to_ushort, flags, SI_COHERENCY_SHADER,
2, sb, 0x1);
}
src/gallium/drivers/radeonsi/si_state_draw.cpp
+5
View File
@@ -2105,6 +2105,11 @@ static void si_draw(struct pipe_context *ctx,
index_offset = 0;
index_size = 2;
/* GFX6-7 don't read index buffers through TC L2. */
sctx->flags |= SI_CONTEXT_WB_L2 | SI_CONTEXT_PFP_SYNC_ME;
si_mark_atom_dirty(sctx, &sctx->atoms.s.cache_flush);
si_resource(indexbuf)->TC_L2_dirty = false;
} else if (!IS_DRAW_VERTEX_STATE && info->has_user_indices) {
unsigned start_offset;