From 413bdcd7c3d053dcdeabe61a6b42efb4abe85368 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Mon, 19 Aug 2024 20:55:03 -0400 Subject: [PATCH] radeonsi: don't use SI_COHERENCY_NONE in si_compute_shorten_ubyte_buffer This removes the last non-AMD_TEST use of SI_COHERENCY_NONE. Reviewed-by: Pierre-Eric Pelloux-Prayer Part-of: --- src/gallium/drivers/radeonsi/si_compute_blit.c | 7 +------ src/gallium/drivers/radeonsi/si_state_draw.cpp | 5 +++++ 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_compute_blit.c b/src/gallium/drivers/radeonsi/si_compute_blit.c index a6eee619ab1..4736bc8ac45 100644 --- a/src/gallium/drivers/radeonsi/si_compute_blit.c +++ b/src/gallium/drivers/radeonsi/si_compute_blit.c @@ -415,11 +415,6 @@ void si_compute_shorten_ubyte_buffer(struct si_context *sctx, struct pipe_resour if (!sctx->cs_ubyte_to_ushort) sctx->cs_ubyte_to_ushort = si_create_ubyte_to_ushort_compute_shader(sctx); - /* Use COHERENCY_NONE to get SI_CONTEXT_WB_L2 automatically used in - * si_launch_grid_internal_ssbos. - */ - enum si_coherency coher = SI_COHERENCY_NONE; - si_improve_sync_flags(sctx, dst, src, &flags); struct pipe_grid_info info = {}; @@ -434,7 +429,7 @@ void si_compute_shorten_ubyte_buffer(struct si_context *sctx, struct pipe_resour sb[1].buffer_offset = src_offset; sb[1].buffer_size = count; - si_launch_grid_internal_ssbos(sctx, &info, sctx->cs_ubyte_to_ushort, flags, coher, + si_launch_grid_internal_ssbos(sctx, &info, sctx->cs_ubyte_to_ushort, flags, SI_COHERENCY_SHADER, 2, sb, 0x1); } diff --git a/src/gallium/drivers/radeonsi/si_state_draw.cpp b/src/gallium/drivers/radeonsi/si_state_draw.cpp index 453c8f6f70b..55acb97edc1 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.cpp +++ b/src/gallium/drivers/radeonsi/si_state_draw.cpp @@ -2105,6 +2105,11 @@ static void si_draw(struct pipe_context *ctx, index_offset = 0; index_size = 2; + + /* GFX6-7 don't read index buffers through TC L2. */ + sctx->flags |= SI_CONTEXT_WB_L2 | SI_CONTEXT_PFP_SYNC_ME; + si_mark_atom_dirty(sctx, &sctx->atoms.s.cache_flush); + si_resource(indexbuf)->TC_L2_dirty = false; } else if (!IS_DRAW_VERTEX_STATE && info->has_user_indices) { unsigned start_offset;