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Author SHA1 Message Date
Jianxun Zhang
ff3589b460 anv: Enable compression on importing Android buffers (xe2) 
Consolidate importing paths by using the new importing
function so that compressed buffer can be imported
correctly.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36825>
 2025-12-09 14:16:43 -08:00
Jianxun Zhang
0c523b6661 anv: Use gralloc helper to get tiling 
The helper gets tiling and modifier in a single step.
The later will be used in the coming changes.

Copy the changes introduced in
cf5c294df4.
Suggested-by: Juston Li <justonli@google.com>

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36825>
 2025-12-09 14:16:42 -08:00
Jianxun Zhang
7dbff29de1 anv: Replace ANV_MAX_PLANES with ISL_MODIFIER_MAX_PLANES 
As discussed in the reviews of cf5c294df4,
the 'plane' in this context means plane of a drm
modifier, so it makes sense to just use the new ISL
macro once it is available.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36825>
 2025-12-09 14:16:42 -08:00
Jianxun Zhang
33074e3ebe isl: Add a macro for number of maximum planes of modifiers 
We will need it in multiple places in the following changes.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36825>
 2025-12-09 14:16:42 -08:00
Jianxun Zhang
fa8f98138a anv: And a new function to consolidate import paths 
The new added function will be invoked on several paths
of importing Android native and hardware buffers.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36825>
 2025-12-09 14:16:42 -08:00
Ian Forbes
4b63535d3c svga: Fix vertex-fallbacks Piglit test 
This test was hitting an assert because gl_PrimitiveID is an input to the
FS that does not come from the VS which should be handled similar to
TGSI_SEMANTIC_FACE.

Signed-off-by: Ian Forbes <ian.forbes@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38834>
 2025-12-09 21:49:21 +00:00
Ian Forbes
6beb92a0d4 svga: Enable GL_ARB_texture_mirror_clamp_to_edge 
We've supported this via SVGA3D_TEX_ADDRESS_MIRRORONCE for years.
Lets enable it as it gets us slightly closer to GL 4.4.

Signed-off-by: Ian Forbes <ian.forbes@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38854>
 2025-12-09 21:31:04 +00:00
Alyssa Rosenzweig
5ced623fdf nir: print nir_tex_instr::backend_flags if present 
I was wondering where this was disappearing to.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38789>
 2025-12-09 20:44:15 +00:00
Alyssa Rosenzweig
b5063953ca people: update Marek's email 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38789>
 2025-12-09 20:44:15 +00:00
Dylan Baker
0735551b08 anv/video: Read the right source for memcpy 
I'm assuming this based off the `if` branch above, after reading the
code for bit that Coverity pointed out in that branch. It doesn't look
correct to start at the base pointer, which will be 0 initialized and
has 52 bits of zero padding, while the default values are 255.

Fixes: 314de7af06 ("anv: Initial support for VP9 decoding")
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38437>
 2025-12-09 12:15:45 -08:00
Dylan Baker
26aba9dc9f anv/video: void cast array we intentionally read off the end of 
Coverity notices we're reading off the end of the array here, which is
true. We also intend to do that because we want to read the next field as
well. Cast to a `void *` to help Coverity out.

CID: 1649593
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38437>
 2025-12-09 12:15:35 -08:00
Benjamin Cheng
72b43c0595 radv/video: Always end ref pic modification list 
The app-provided arrays should always end with IDC_END, but when
overriding we need to end the list with IDC_END as well.

Fixes: 2e21eec921 ("radv/video: Fix num_ref_idx_l{0,1} related overrides")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14436
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38858>
 2025-12-09 16:04:52 +00:00
Boris Brezillon
69a9ed4d9e panvk/csf: Use cs_vt_{start,end}() 
Use the syntactic sugar for heap operations on the vertex/tiler queue.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Suggested-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38826>
 2025-12-09 16:42:05 +01:00
Boris Brezillon
02b6942c91 panvk/csf: Make sure FINISH_FRAGMENTs are properly ordered 
The spec requires FINISH_FRAGMENT calls to be issue in the exact same
order FINISH_TILING calls were, otherwise heap chunks that are still
used by in-flight IDVS/FRAGMENT jobs might be returned to the heap
leading to a UAF situation.

In order to guarantee FINISH_FRAGMENT ordering, we request the new
iterator scoreboard (the one to be used on the next RUN_FRAGMENT)
just before issuing our FINISH_FRAGMENT, and we select this next
iterator scoreboard as our signal scoreboard. This guarantees that the
next FINISH_FRAGMENT won't trigger until both the next RUN_FRAGMENT and
the current FINISH_FRAGMENT are done.

This new approach forces us to revisit the sequencing of our
issue_fragment() logic. Previously we were requesting a new scoreboard
before RUN_FRAGMENT, but now we're assuming the scoreboard has already
been claimed, either by the subqueue init logic (simple static assignment,
since all scoreboards are free at this time) or by the previous
issue_fragment() call.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38826>
 2025-12-09 16:42:04 +01:00
Boris Brezillon
ff99e5289b panvk/csf: Prepare for more complex scoreboard transitions 
Right now all we do is get the next available scoreboard, and set
it as the current iterator scoreboard, but the fragment queue is
about require something more involved to fix FINISH_FRAGMENT ordering
issue.

Provide a cs_iter_sb_update() block where everything between the
selection of a new scoreboard and the transition to this new
scorevoard is customizable. Implement cs_next_iter_sb() as a dummy
wrapper around this new construct.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38826>
 2025-12-09 16:41:58 +01:00
Boris Brezillon
14391cc5c5 panvk/csf: Make sure we don't get the same iter SB assigned twice in a row 
We are about to add sequences where we will do

	wait(cur_iter_sb),signal(next_iter_sb)

in some deferred operations. When that happens, the wait mask can't have
the signal sb set, otherwise the behavior is undefined.

On v11+, we have enough scoreboards to disallow the currently bound
endpoint SB from being returned on a NEXT_SB_ENTRY, so let's do that all
the time.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38826>
 2025-12-09 16:41:47 +01:00
Boris Brezillon
ced586fabd pan/decode: Print defer mode in deferrable instructions 
Knowing which defer mode is used is quite useful.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38826>
 2025-12-09 16:41:47 +01:00
Boris Brezillon
97a10dfcae pan/cs: Rename cs_select_sb_entries_for_async_ops() 
The name is misleading since it's only setting the endpoint scoreboard
on v11+. On v10, we shouldn't assume the "other" SB is always zero,
since we're passed the SB slot to use at init time (ls_sb_slot).

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38826>
 2025-12-09 16:41:47 +01:00
Boris Brezillon
728cd0d150 pan/cs: Fix bitop helpers 
Source assignment is mixed up in some of them. While at it, make
source argument names consistent with the descriptor field names.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38826>
 2025-12-09 16:41:47 +01:00
Boris Brezillon
afb66778d1 pan/cs: Fix cs_extract_tuple() 
Fix cs_extract_tuple() and implement cs_extract{32,64}() as wrappers
around cs_extract_tuple().

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38826>
 2025-12-09 16:41:47 +01:00
Erik Faye-Lund
7b61b2eb61 docs/panfrost: remove some stray newlines 
These were accidental when I split up the large article in to multiple
documents. Let's fix that up, so we don't end up repeating this for
future documents.

Fixes: 8248cc0bf4 ("docs/panfrost: move details to separate articles")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38738>
 2025-12-09 15:18:39 +00:00
Pavel Ondračka
54ae9016a8 r300/ci: asan testing 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36447>
 2025-12-09 14:49:46 +00:00
Pavel Ondračka
2cca7d5d74 r300: fix contant remap table leak 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36447>
 2025-12-09 14:49:46 +00:00
Pavel Ondračka
16ffa0a490 r300: fix locked_zbuffer leak 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36447>
 2025-12-09 14:49:46 +00:00
Pavel Ondračka
31aea50093 r300: fix overflow in r300_draw_elements_immediate 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36447>
 2025-12-09 14:49:46 +00:00
Pavel Ondračka
bf453aa004 r300: fix dummy_vs leak 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36447>
 2025-12-09 14:49:46 +00:00
Zan Dobersek
f8363b8d25 driconf: use vk_dont_care_as_load workaround for Spilled! 
Unity's Vulkan backend used by Spilled! requires the vk_dont_care_as_load
workaround to achieve correct rendering. Observed on Turnip, in GMEM mode.

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38863>
 2025-12-09 07:48:32 +01:00
Calder Young
2fbc722dcf anv: Fix misplaced assertion in anv_scratch_pool_alloc 
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Fixes: ee42a489 ("anv: Fix scratch pool buffer allocation sizes")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38861>
 2025-12-09 06:13:53 +00:00
Arcady Goldmints-Orlov
68bb5d9e49 kk: enable shaderClipDistance 
Since Metal doesn't pass clip distance into the fragment shader, we have to
do it ourselves. The CLIP_DIST0/1 varying slots are used to represent the
user-defined varyings we use to pass them from vertex to fragment and
a new intrinsic is added to represent the write to the built-in
clip_distance variable. Since the CLIP_DIST0/1 varying slots are not affected
by opt_varyings, there can be potential interface mismatches so the machinery
in msl_iomap.c is refactored to allow them to be output as a series of scalars
rather than vectors.

Reviewed-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38839>
 2025-12-08 23:09:53 -05:00
Aitor Camacho
6d6634e805 kk: Expose 4444 and ycbcr 2plane 444 formats 
Extensions:
- VK_EXT_4444_formats
- VK_EXT_ycbcr_2plane_444_formats

Features:
- formatA4R4G4B4
- formatA4B4G4R4
- ycbcr2plane444Formats

Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38831>
 2025-12-09 01:19:32 +00:00
Aitor Camacho
4a58046caa kk: Fix emulated format's swizzle 
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38831>
 2025-12-09 01:19:31 +00:00
Aitor Camacho
dd4a1a50f5 kk: Expose ASTC HDR formats 
Extensions:
- VK_EXT_texture_compression_astc_hdr

Features:
- textureCompressionASTC_HDR

Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38831>
 2025-12-09 01:19:31 +00:00
Aitor Camacho
2112eb4aa4 kk: Match float formats to actual Metal features (union of Apple and Mac2) 
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38851>
 2025-12-09 01:02:52 +00:00
Aitor Camacho
d5b05d53e4 kk: Expose shaderImageGatherExtended 
Limit gather offsets to hardware's limit [-8, 7].

Reviewed-By: Arcady Goldmints-Orlov <arcady@lunarg.com>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38846>
 2025-12-08 23:49:01 +00:00
Yonggang Luo
9649eee307 meson: Use /Zc:enumTypes enables C++ conforming enum underlying type and enumerator type deduction 
The detail is at https://learn.microsoft.com/en-us/cpp/build/reference/zc-enumtypes?view=msvc-170

For example:

enum Enum {
    A = 'A',
    B = sizeof(A)
};

static_assert(B == 1); // previously failed, now succeeds under /Zc:enumTypes

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38639>
 2025-12-08 22:47:13 +00:00
Rob Clark
6e3598177b freedreno/common: Add A840 and X2-85 
Add support for A840 and X2-85.  Despite slice count, differences in
memory bus and clks, they are architecturally similar from the PoV of
the UMD.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
 2025-12-08 22:12:12 +00:00
Rob Clark
11364f4ee2 freedreno: gen8 support 
Enable gen8 support.  Sysmem, gmem, and binning work.  DEQP gles2/3/31
tests are passing.

LRZ is not supported yet, and will follow later.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
 2025-12-08 22:12:12 +00:00
Rob Clark
469a19f66b freedreno/computerator: gen8 support 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
 2025-12-08 22:12:12 +00:00
Rob Clark
46dd4b166e freedreno/a6xx: Fix VSC_BIN_SIZE for gen8 
It was missed that this register changed for larger bin sizes.   Use a
common bitset for all related gen8 regs, and change the field names for
earlier gens to match so the generated register packers dtrt.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
 2025-12-08 22:12:12 +00:00
Rob Clark
237e93aa45 freedreno/a6xx: Add gen8 query support 
The RBBM_PIPESTAT_x regs moved around.  Re-work how we figure out the
appropriate reg offset to take this into account by using the templated
reg packers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
 2025-12-08 22:12:12 +00:00
Rob Clark
e15ac3b043 freedreno/a6xx: Drop log_pipeline_stats() 
This was useful when we didn't have docs and had to figure out which
counter was which.  That is no longer an issue.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
 2025-12-08 22:12:12 +00:00
Rob Clark
a818287fd6 freedreno/registers: gen8 support 
Co-developed-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
 2025-12-08 22:12:11 +00:00
Rob Clark
6c39336f2f freedreno/registers: More gen8 prep 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
 2025-12-08 22:12:11 +00:00
Rob Clark
01041c858e freedreno/a6xx: Handle tess_bo size differences for gen8 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
 2025-12-08 22:12:10 +00:00
Rob Clark
222c005c01 freedreno/fdl: Fix gen8 buffer depth 
Seems we need to program it to 1, otherwise all ssbo writes (and reads?)
end up in index 0.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
 2025-12-08 22:12:10 +00:00
Rob Clark
5310672706 freedreno/fdl: Fix gen8 TEX_LINE_OFFSET 
It is in units of bits.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
 2025-12-08 22:12:10 +00:00
Rob Clark
4f6076f531 freedreno/registers: Add TPL1_MODE_CNTL bitfields 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
 2025-12-08 22:12:09 +00:00
Rob Clark
be6c181ae6 freedreno/registers: Fix gen8 UBWC array pitch 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
 2025-12-08 22:12:08 +00:00
Rob Clark
5c98f110da ir3: Add new cat3 instructions 
b13 encodes alternate opcode meanings for new instructions with
otherwise the same encoding (ie. src precision implied by opc).

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
 2025-12-08 22:12:08 +00:00
Rob Clark
aadd1dabde ir3: dp2acc is removed in gen8 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
 2025-12-08 22:12:08 +00:00