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Author SHA1 Message Date
Timur Kristóf fb4e68b724 ac/nir/cull: Move the contents of cull_bbox into ac_nir_cull_triangle. 
No Fossil DB changes.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17870>
 2022-08-05 22:10:28 +00:00
Timur Kristóf e2ca24063a ac/nir/cull: Move some code from cull_bbox into helper functions. 
No Fossil DB changes.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17870>
 2022-08-05 22:10:27 +00:00
Samuel Pitoiset 239363f3c6 radv: implement VK_EXT_attachment_feedback_loop_layout 
This extension introduces a new layout which allows applications
to both render and sample from the same image inside the same draw
(aka. feedback loops).

Previously, the GENERAL layout was used and this introduced some
rendering artifacts because the hw can't read&write DCC/HTILE for
the same image, and we try to keep it compressed on GFX10+.

This helps fixing corruption with D3D9 and RPCS3 games which
are candidate for feedback loops.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4411
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17883>
 2022-08-05 18:10:57 +00:00
Samuel Pitoiset 5992b8bbf7 vulkan: add support for VK_IMAGE_LAYOUT_ATTACHMENT_FEEDBACK_LOOP_OPTIMAL_EXT 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17883>
 2022-08-05 18:10:57 +00:00
Mike Blumenkrantz 58858c9d00 vulkan: Update the XML and headers to 1.3.224 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17883>
 2022-08-05 18:10:57 +00:00
Rob Clark 2d7f00d5c8 freedreno: Drop fixed upper bound on # of tiles 
Placate things that think 16k x 16k FBO is a good idea.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6997
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17888>
 2022-08-05 17:31:55 +00:00
Rob Clark 2497741a1b freedreno/gmem: Fix col0 calc 
Fix typo in calculation of position of start of a row of tiles.  This
could otherwise cause an out-of-bounds access in the next patch.

Fixes: 81d85be9a5 freedreno/gmem: Reverse order of alternative tile rows
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17888>
 2022-08-05 17:31:55 +00:00
Rob Clark 8b3f2a9e5d freedreno/drm: Fix potential bo cache vs export crash 
Keep the list head valid (empty) after allocation from bo cache.  Avoids
a potential later crash in lookup_bo in the following sequence:

1. alloc, bo cache hit
2. export
3. re-import

Cc: mesa-stable
Fixes: f3cc0d2747 ("freedreno: import libdrm_freedreno + redesign submit")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6988
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17888>
 2022-08-05 17:31:55 +00:00
Corentin Noël 0a0205f045 virgl/ci: Update virglrenderer 
Update virglrenderer to the latest version on time.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17853>
 2022-08-05 15:12:29 +00:00
David Heidelberg 0fc06daabb ci: separate wine setup into own script 
It will be used by LAVA jobs too.

Reviewed-by: "Sergi Blanch Torne" <sergi.blanch.torne@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17887>
 2022-08-05 14:34:42 +00:00
David Heidelberg ceb52f6460 ci: make shellcheck happy on dxvk script 
Reviewed-by: "Sergi Blanch Torne" <sergi.blanch.torne@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17887>
 2022-08-05 14:34:42 +00:00
David Heidelberg 1d8cf2ecdd ci: move DXVK instalation outside of x86_test-vk 
It will be used by LAVA jobs.

Reviewed-by: "Sergi Blanch Torne" <sergi.blanch.torne@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17887>
 2022-08-05 14:34:42 +00:00
Yonggang Luo b6fb2da6f2 d3d12: Fixes compile error with mingw/gcc-x64 when static linkage to runtime library 
Closes #6968

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Suggested-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Tested-by: Prodea Alexandru-Liviu <liviuprodea@yahoo.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17889>
 2022-08-05 14:17:20 +00:00
David Heidelberg f9b95667fd ci: Turn off the entire Lima farm (devices report out-of-space) 
Reference: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7009

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17910>
 2022-08-05 12:49:54 +00:00
Jason Ekstrand 239623ecee anv: Don't require 32-bit addresses for scratch on Gen12.5+ 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17908>
 2022-08-05 11:51:31 +00:00
Jason Ekstrand d82cea5fc3 genxml: Add BVH data structures 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17908>
 2022-08-05 11:51:31 +00:00
Jason Ekstrand a680083546 intel/rt: Handle multiple exits in lower_shader_returns 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17908>
 2022-08-05 11:51:31 +00:00
Jason Ekstrand a329e6e511 intel/rt: Handle halts in any-hit shaders properly 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17908>
 2022-08-05 11:51:31 +00:00
Jason Ekstrand caed8df146 intel/fs_reg_allocate: Improve compressed instruction self-interference 
The old version worked fine for SIMD16 instructions but SIMD8
instructions where the destination spans two registers have the same
problem.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17908>
 2022-08-05 11:51:31 +00:00
Lionel Landwerlin 1ce5be916f intel/nir: specify synchronous value for tracing op 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17908>
 2022-08-05 11:51:31 +00:00
Lionel Landwerlin 03ab1d6aaa intel/compiler: document units of brw_ubo_range fields 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17908>
 2022-08-05 11:51:31 +00:00
Lionel Landwerlin 734384e8bc intel/fs: fixup simd selection with shader calls 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17908>
 2022-08-05 11:51:31 +00:00
Lionel Landwerlin 9cb9390962 intel/fs: store num of resume shaders in prog_data 
That way we can look at the SBT entries for debug purposes.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17908>
 2022-08-05 11:51:31 +00:00
Filip Gawin b2bf792ea5 r300: add khr r400 failures 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17895>
 2022-08-05 11:06:18 +00:00
Filip Gawin dce6409e6d r300: add list of deqp gles2 r400 failures 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17895>
 2022-08-05 11:06:18 +00:00
Iago Toral Quiroga 20591573f1 broadcom/compiler: use nir_opt_idiv_const 
total instructions in shared programs: 12463625 -> 12463571 (<.01%)
instructions in affected programs: 1758 -> 1704 (-3.07%)
helped: 12
HURT: 0

total uniforms in shared programs: 3704589 -> 3704591 (<.01%)
uniforms in affected programs: 17 -> 19 (11.76%)
helped: 0
HURT: 1

total max-temps in shared programs: 2148088 -> 2148138 (<.01%)
max-temps in affected programs: 170 -> 220 (29.41%)
helped: 0
HURT: 10

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17871>
 2022-08-05 09:28:22 +00:00
Iago Toral Quiroga 73e8fc3efb broadcom/compiler: don't use imprecise_32bit_lowering for idiv lowering 
This is known to produce bogus results for certain combinations of
operands, so don't use it. See this issue for details:

https://gitlab.freedesktop.org/mesa/mesa/-/issues/6555

With this change, the idiv lowering will produce mul_high instructions,
so we need to instruct the compiler to lower those with the ALU lowering
right after the idiv lowering by adding the lower_mul_high option (we
only need to add this to V3D, since V3DV already had it set). This will
cause injection of uadd_carry instructions, for which we have backend
implementations that produce better code for us than the NIR lowering.

total instructions in shared programs: 12457692 -> 12463625 (0.05%)
instructions in affected programs: 23115 -> 29048 (25.67%)
helped: 0
HURT: 111

total threads in shared programs: 416372 -> 416368 (<.01%)
threads in affected programs: 8 -> 4 (-50.00%)
helped: 0
HURT: 2

total uniforms in shared programs: 3704067 -> 3704589 (0.01%)
uniforms in affected programs: 5804 -> 6326 (8.99%)
helped: 2
HURT: 109

total max-temps in shared programs: 2147845 -> 2148088 (0.01%)
max-temps in affected programs: 2456 -> 2699 (9.89%)
helped: 6
HURT: 91

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17871>
 2022-08-05 09:28:22 +00:00
Marek Olšák 0c1801706e ac/llvm: handle external textures in ac_nir_lower_resinfo 
Fixes: 4f622d62d0 - ac/nir: add ac_nir_lower_resinfo
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6993

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17902>
 2022-08-05 09:04:17 +00:00
Marek Olšák bdfaf51014 radeonsi: fix a regression due to reordering PIPE_SHADER_* 
Fixes: 27f46465c7 - gallium/tgsi: reorder pipe shader type defines.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17902>
 2022-08-05 09:04:17 +00:00
Marek Olšák 7e45622728 radeonsi/ci: update failing tests on navi21 
These pass now.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17902>
 2022-08-05 09:04:17 +00:00
Marek Olšák 279315fd73 radeonsi: don't assume that TC_ACTION_ENA invalidates L1 cache on gfx9 
Just got into a midnight discussion with a hw guy.
TC_ACTION_ENA apparently doesn't invalidate L1, so don't clear
the INV_VCACHE flag.

Fixes: 4056e953fe - radeonsi: move emit_cache_flush functions into si_gfx_cs.c

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17902>
 2022-08-05 09:04:17 +00:00
Sagar Ghuge 50802f96a8 iris: Handle new untyped dataport cache flush PIPE_CONTROL field 
Also while switching to GPGPU pipeline, make sure to flush the untyped
dataport cache. HDC pipeline flush bit must be set if we are flushing
untyped dataport L1 data cache.

v2: Add utrace support (Lionel)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16905>
 2022-08-05 10:44:22 +03:00
Sagar Ghuge 845ab3d627 anv: Handle bits to flush data-port's Untyped L1 data cache 
v2: Drop ANV_PIPE_UNTYPED_DATAPORT_CACHE_FLUSH_BIT from invalidate bits (Lionel)
    Add utrace support
    Expand on comment about PIPE_CONTROL::UntypedDataPortCache

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16905>
 2022-08-05 10:43:50 +03:00
Lionel Landwerlin 1f34ce7e8e intel/ds: track untyped dataport flushes 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16905>
 2022-08-05 10:43:50 +03:00
Sagar Ghuge 8aead60434 iris: Specify Untyped L1 cache policy for stateless accesses 
Set write back L1 cache policy in STATE_BASE_ADDRESS instruction for A64
messages.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16905>
 2022-08-05 10:43:50 +03:00
Sagar Ghuge 79cd2c2759 anv: Specify Untyped L1 cache policy for stateless accesses 
Set write back L1 cache policy in STATE_BASE_ADDRESS instruction for A64
messages.

v2: Also set the value in genX_state.c (Lionel)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16905>
 2022-08-05 10:43:50 +03:00
Sagar Ghuge d4b2b769d1 intel/isl: Setting L1 caching policy to Write-back mode 
For a RW L1 cache, both reads and writes are cached in the L1, at high
priority (MRU position). For a RO L1 cache, reads are cached at higher
priority and writes bypass the cache.

v1: (Ken)
- Set caching policy for buffer surfaces too

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16905>
 2022-08-05 10:43:50 +03:00
Lionel Landwerlin 5e21f47428 anv: fixup PIPE_CONTROL restriction on gfx8 
We're missing a condition that is currently papered over by having
ANV_PIPE_HDC_PIPELINE_FLUSH_BIT in the invalidate bits.

v2: rework with simplication (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16905>
 2022-08-05 10:42:16 +03:00
Juan A. Suarez Romero 644daa9743 vc4: properly restore vc4 debug option 
Otherwise VC4_DEBUG does not work.

Fixes: c3f5d27631 ("vc4/v3d: restore calling debug_get_option_vc4/v3d_debug")
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17882>
 2022-08-05 07:16:00 +00:00
Dave Airlie 5449e6d14c draw: don't touch info values that aren't valid. 
These shouldn't be accessed, and shows up as an uninit access in
valgrind with piglit rasterpos

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10641>
 2022-08-05 06:18:44 +00:00
Dave Airlie f4abd32749 llvmpipe/ci: update ci results for clover. 
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10641>
 2022-08-05 06:18:44 +00:00
Dave Airlie 0d41c4b3d9 lavapipe: scan shader for info before lowering images. 
Otherwise the values will be wrong.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10641>
 2022-08-05 06:18:44 +00:00
Dave Airlie 5036e0a08e lavapipe: lower images to non-derefs in vulkan side 
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10641>
 2022-08-05 06:18:44 +00:00
Dave Airlie a17635e988 gallivm/nir/st: lower image derefs in advance. 
This improves clover from crashing to just failing, but I mainly
want it this to cleanup the nir code first

It's also important the shaders coming from the state tracker
for feedback get images lowered when they are draw shaders now.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10641>
 2022-08-05 06:18:44 +00:00
Feng Jiang 060936fe0d virgl/vtest: fix memory overwrite problem in virgl_vtest_send_get_caps() 
Signed-off-by: Feng Jiang <jiangfeng@kylinos.cn>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17901>
 2022-08-05 06:07:11 +00:00
Yiwei Zhang f54aa49c14 venus: double the abort timeout to allow long shader compiles 
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17898>
 2022-08-05 04:47:39 +00:00
Yiwei Zhang ecd5509969 venus: increase busy wait order in vn_relax 
This is mainly to workaround a platform issue that has huge sleep
penalty, which could lead to a timeout if the small synchronous queries
are going to sleep.

This change adjusts the warn and abort order correspondingly so that to
match prior timing.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17898>
 2022-08-05 04:47:39 +00:00
Mike Blumenkrantz 1911dc5abb zink: remove an old RGBA4 nvidia workaround 
this should be automatically handled

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17775>
 2022-08-05 03:51:05 +00:00
Mike Blumenkrantz 32446f51a8 zink: don't fixup sparse texops 
this is broken, and these will never need to be fixed

Fixes: 3a47576687 ("zink: add a compiler pass to match up tex op dest types")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17775>
 2022-08-05 03:51:05 +00:00
Mike Blumenkrantz 247b8f2924 zink: add all format modifiers when adding for dmabuf export 
adding LINEAR before was a good starter step, but LINEAR
might not actually be supported (e.g., nvidia)

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17775>
 2022-08-05 03:51:05 +00:00