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Author SHA1 Message Date
Karol Herbst fa94b1b29c rusticl: check the returned pointer of mmap 
Prior Linux 4.17 MAP_FIXED_NOREPLACE might not be respected and might
return a pointer different than the requested one.

Fixes: da4de8d7e3 ("rusticl: add support for coarse-grain buffer SVM")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35286>
 2025-06-04 06:28:39 +00:00
Karol Herbst 9b28067b59 rusticl: move unmap out of debug_assert_eq statement 
Fixes: da4de8d7e3 ("rusticl: add support for coarse-grain buffer SVM")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35286>
 2025-06-04 06:28:39 +00:00
Karol Herbst 931ec3e954 rusticl: fix compilation on non Linux systems 
Thanks to @jbeich to validate this on FreeBSD!

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13278
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35286>
 2025-06-04 06:28:39 +00:00
Lionel Landwerlin a51d061c00 brw: don't generate invalid instructions 
0e3e5146cf ("intel/brw: Use correct instruction for value change check
when coalescing") enabled some new cases that exposed a pre-existing
bug that would turn something like this :

      mul.sat(16) %789:F, %787:F, %788:F
      mov.g.f0.0(16) %790:F, %789:F
      (+f0.0) sel(16) %800:UD, %790:UD, 0u

into this :

      mul.sat(16) %790:F, %787:F, %788:F
      mov.g.f0.0(16) null:F, null<8,8,1>:F
      (+f0.0) sel(16) %800:UD, %790:UD, 0u

The mov[] array can contain the same instruction because it's repeated
for each REG_SIZE writes and a SIMD16 instruction will write 2
REG_SIZE.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 0e3e5146cf ("intel/brw: Use correct instruction for value change check when coalescing")
Cc: mesa-stable
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35276>
 2025-06-04 06:08:26 +00:00
Caio Oliveira 2bb9b94c4c brw/disasm: Don't print src1 information for SEND gather 
There's always only the ARF scalar register source, so don't
bother printing other information that won't be used.  Matches
the assembler code.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35297>
 2025-06-03 22:52:39 +00:00
Mauro Rossi 7e523b4400 Revert "android: Link with libc++fs up to SDK 35" 
This reverts commit 84cae30f0a.

 Conflicts:
	android/Android.mk

Backport-to: 25.1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35208>
 2025-06-03 22:01:01 +00:00
Mauro Rossi 9fd6bae3c4 llvmpipe: Use mkdir instead of std::filesystem::create_directory on Android 
libc++fs symbols are not available to vendor modules up to Android 15
this patch allows to build llvmpipe as module for Android 14 and older

Backport-to: 25.1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35208>
 2025-06-03 22:01:01 +00:00
Mauro Rossi 4aafb5fcc3 llvmpipe: Define LP_NIR_SHADER_DUMP_DIR differently on Android 
Reference Android temporary path /data/local/tmp is used for Android builds

Backport-to: 25.1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35208>
 2025-06-03 22:01:01 +00:00
Caio Oliveira 542836afe5 intel: Don't require dpas_intel src2 to match destination 
With upcoming configurations, the number of elements in the src2
slice might not match the destination.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35301>
 2025-06-03 21:31:23 +00:00
Eric Engestrom b83f406c91 ci: inline the only anchor reference that was on its own line 
The way yaml works, this makes no difference in practice, it's just to be more consistent.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35285>
 2025-06-03 20:58:51 +00:00
Eric Engestrom 50dbb6c31a ci: improve explanation of the pre-merge/merge-request pipelines 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35285>
 2025-06-03 20:58:51 +00:00
Eric Engestrom f2f8a1cb3e ci: improve name of merge-request pipelines 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35285>
 2025-06-03 20:58:50 +00:00
Eric Engestrom 730c938a46 ci: improve name of fork pipelines 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35285>
 2025-06-03 20:58:50 +00:00
Eric Engestrom f29524c1de ci: improve names of push-to-upstream-{default,staging}-branch pipelines 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35285>
 2025-06-03 20:58:50 +00:00
Marek Olšák 942b565f34 mesa: strengthen the condition that triggers generating VS with edge flags 
Check the cull face state to see if polygon mode has any effect.
It could happen that polygon mode is GL_LINE, but that face is always
culled, in which case polygon mode has no effect, thus edge flags
have no effect either.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35314>
 2025-06-03 19:49:21 +00:00
Mike Blumenkrantz d8a6ec5985 lavapipe: undo fb remapping before poisoning memory at end of renderpass 
in a scenario like:
* begin_rendering(cbuf1:store=DONTCARE, cbuf2)
* draw
* remap(cbuf2, NULL)
* draw
* end_rendering

cbuf1 will be poisoned at the end of the renderpass, but the corresponding
clear call to trigger the poisoning will not be able to detect that this
texture is being written by an async fs, causing a write hazard

unremapping the fb here ensures that all attachments are fb-referenced
as expected in order to guarantee threads sync before memory is poisoned

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35319>
 2025-06-03 18:57:23 +00:00
Connor Abbott 723a1fabac tu: Use safe-const GS variant for VPC binning state 
When binning with a GS, both VS and GS are active. This means that we
could have to use the safe-const variant for the GS. However we only
emitted VPC state for the binning case with the "normal" GS variant.
Emit the VPC state with the safe-const variant too, and select between
the state variants at link time.

This fixes a few tests like
dEQP-VK.spirv_assembly.instruction.graphics.8bit_storage.32struct_to_8struct.uniform_uint_geom
with TU_DEBUG=gmem,forcebin.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35294>
 2025-06-03 18:34:05 +00:00
Mary Guillemard 946bbd8b2f panvk: Enable vertexPipelineStoresAndAtomics on ANGLE for v13+ 
ANGLE requires VK_EXT_transform_feedback or vertexPipelineStoresAndAtomics
to enable OpenGL ES 3.1 support. As we currently don't support this extension,
we enable support for vertexPipelineStoresAndAtomics via DRICONF
to allow XFB emulation on hardware without speculative behaviors around vertices (v13+).

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34758>
 2025-06-03 14:28:06 +00:00
Mary Guillemard d7f21cd9c6 pan/bi: Lower VS atomics direct output store to only exec in one stage when possible 
Atomics and memory write on the vertex stage have implementation-defined
behaviors on how many invocations will happen. However for some reasons,
atomic counters on GL/GLES specs are quite ambigous here and even have tests
counting how many invocations have been made on VS.... This pass detects
atomics that result in a direct store output of one specific IDVS stage and
ensure it's only executed for said stage.

This allows "dEQP-GLES31.functional.shaders.opaque_type_indexing.atomic_counter.*" to
pass under panvk+ANGLE.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34758>
 2025-06-03 14:28:06 +00:00
Mary Guillemard 4100f1d08a pan/bi: Stop writing pan_shader_info::vs::idvs on non VS stages 
We were unconditionally writing to vs anonymous union on other stages
than VS. this was not causing issues as pan_shader_compile
unconditionally overrite the value for fragment shaders and compute
shaders union is too small to be affecte.

Fixes: 1d21de788d ("pan/bi: Specialize shaders for IDVS")
Reported-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34758>
 2025-06-03 14:28:06 +00:00
Mary Guillemard f1ba807099 panforst: Update ForEachMacros for pan/bi 
We have various clang-format issues around those nir macros in
bifrost_compile.c.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34758>
 2025-06-03 14:28:06 +00:00
Valentine Burley 5b60cae2af ci/android: Make android-runner scripts safe for set -u 
Also make having VK_DRIVER set mandatory for Cuttlefish.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35277>
 2025-06-03 13:58:11 +00:00
Mary Guillemard a6de893b60 panvk: Expose 2 queues on v10+ 
This works out of the box.

We could have more (up to 127) but this cause timeouts on
"dEQP-VK.api.device_init.create_device_various_queue_counts.basic" and
realistically we only need 2 for Android 14+ HWUI framework.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35310>
 2025-06-03 13:35:14 +00:00
Karol Herbst 4f5ce2d5aa ac/nir: fix unaligned single component load/stores 
This fixes two problems:
1. we need to lower the bit_size according to the alignment.
2. num_components could end up being 0, so we need to round up instead.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13102
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34976>
 2025-06-03 13:14:31 +00:00
Juan A. Suarez Romero d30a6f8102 v3dv: consider render area when configuring supertiles 
If the render area is restricted to a section of the framebuffer, there
is no need to consider all the framebuffer size when configuring the
supertiles, as only the supertiles coordinates of the affected area will
be submitted.

This allow to create supertiles smaller than the ones in case
considering the full screen, reducing the tiles that need to be
processed.

This also fixes https://gitlab.freedesktop.org/mesa/mesa/-/issues/13218.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35257>
 2025-06-03 11:21:14 +00:00
Juan A. Suarez Romero 2cac70558d v3d,v3dv: set max supertiles to 256 
So far the driver was configuring the supertiles to be less than 256.
But actually, there can be up to 256, not strictly less than 256.

There is one restriction though: the frame width or height in supertiles
must be less than 256.

It also moves this limit to the limits file, which is shared by v3d and
v3dv.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35257>
 2025-06-03 11:21:14 +00:00
Karol Herbst 9e3f190e2e rusticl/kernel: rework unsafe block inside clSetKernelArg 
No functional change

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35305>
 2025-06-03 11:04:45 +00:00
Karol Herbst f663e3330c rusticl/memory: properly set pipe_image_view::access 
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13294
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35305>
 2025-06-03 11:04:45 +00:00
Karol Herbst 868ae6a262 rusticl/kernel: implement CL_INVALID_ARG_VALUE for image args in clSetKernelArg 
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35305>
 2025-06-03 11:04:45 +00:00
Samuel Pitoiset 94a4ba5b4d radv/ci: bump the timeout for radv-polaris10-vkcts 
Looks like it's actually also affected by the memory explosion caused
by zerovram alloc by default in AMDGPU. Though it's very random,
sometimes the job will finish in 40 minutes, sometimes it needs more
than 1h15m. Let's bump the timeout because it's a post-merge job.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35157>
 2025-06-03 10:18:30 +00:00
Samuel Pitoiset 61ca95fa67 ci: uprev VKCTS main to f66e0ae866117f3d7375763bf5ec194404d88cdb 
RADV is the only driver using VKCTS main.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35157>
 2025-06-03 10:18:30 +00:00
Rhys Perry dd45bf5bce nir/load_store_vectorize: stabilize entry sort 
I think this was unlikely to cause issues, even if the qsort()
implementation is unstable.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35255>
 2025-06-03 09:45:01 +00:00
Rhys Perry 397920c16e nir: fix left shift of negative value in ibfe constant folding 
Fixes "left shift of negative value -128" with parallel_rdp/00f93a9497dfbb3b
and UBSan.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35255>
 2025-06-03 09:45:01 +00:00
Rhys Perry 78aae4b1ba nir: fix signed overflow in pack_half_2x16 constant folding 
Without this cast, the left shift is promoted to 'int'.

Fixes "left shift of 50432 by 16 places cannot be represented in type 'int'"
with horizon_zero_dawn/001064f580f8e3be and UBSan.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35255>
 2025-06-03 09:45:01 +00:00
Rhys Perry 2e82f481ca radv: fix too large shift exponent in radv_remove_color_exports 
"shift exponent 1020 is too large for 32-bit type 'unsigned int'" with
madmax/25b8180e05220b8c and UBSan

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35255>
 2025-06-03 09:45:01 +00:00
Rhys Perry 6852538ba0 nir: fix unpack_unorm_2x16/unpack_snorm_2x16 constant folding 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Backport-to: 25.0
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35255>
 2025-06-03 09:45:01 +00:00
Valentine Burley 817c14cc7c ci/lava: Only deploy kernel-modules when needed 
Not all LAVA jobs appear to require kernel modules, so only apply the
kernel-modules overlay when HWCI_KERNEL_MODULES is explicitly set.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35129>
 2025-06-03 07:27:26 +00:00
Valentine Burley 3a0cc0ee0d ci: Use zstd compressed kernel modules 
Change how we package kernel modules: instead of storing them in
.tar.zst archives with uncompressed .ko files inside, we now compress
each .ko file individually with ZSTD and bundle them into a plain tar
archive.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35129>
 2025-06-03 07:27:26 +00:00
Faith Ekstrand 347e957b44 vulkan/pipeline: Hash null descriptor robustness info 
Fixes: 6ae401aa86 ("vulkan: Add null descriptor bits to vk_pipeline_robustness_state")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34967>
 2025-06-03 07:02:36 +00:00
Georg Lehmann a6675f35b2 aco: clamp exponent of 16bit ldexp 
The hw uses only a 16bit int, but NIR's src is 32bit.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34073>
 2025-06-03 06:34:18 +00:00
Marek Olšák bf2ed20eb9 nir: remove unused nir_io_semantics::invariant 
Acked-by: Alyssa on IRC
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35256>
 2025-06-02 23:08:58 +00:00
Marek Olšák 44fcda9631 nir/opt_clip_cull_const: support GS 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35256>
 2025-06-02 23:08:58 +00:00
Marek Olšák 6677d087c0 nir/xfb_info: add new fields to describe 16-bit XFB better 
for drivers that need this information

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35256>
 2025-06-02 23:08:58 +00:00
Marek Olšák 7b70b419b5 nir: always index SSA defs before printing 
This makes the output more readable.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35256>
 2025-06-02 23:08:58 +00:00
Marek Olšák cf94ae8544 nir: change the type of shader_info::patch_* fields to 32 bits 
Patch outputs only use 32 bits.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35256>
 2025-06-02 23:08:58 +00:00
Ryan Mckeever b69dcd8d33 panvk: Enable VK_EXT_load_store_op_none 
Signed-off-by: Ryan Mckeever <ryan.mckeever@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32915>
 2025-06-02 22:01:11 +00:00
Mike Blumenkrantz a7e61f95b8 zink: delete zink_ctx_surface 
finally the nightmare is over

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35240>
 2025-06-02 20:51:47 +00:00
Mike Blumenkrantz 1d1ca611be zink: don't fixup depth buffer if it's already big enough 
the zs buffer doesn't have to exactly match the size of the framebuffer,
it just has to be "big enough"

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35240>
 2025-06-02 20:51:47 +00:00
Mike Blumenkrantz 3dc8d81332 zink: delete zink_ctx_surface::needs_mutable 
this was some awfulness required because previously pipe_surface objects
could be created from a different thread, but now they are only ever created
by the driver

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35240>
 2025-06-02 20:51:47 +00:00
Mike Blumenkrantz 8ad4b07c38 zink: delete zink_ctx_surface::transient 
this untangles a lot of code and makes surfaces very nearly comprehensible

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35240>
 2025-06-02 20:51:47 +00:00