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Author SHA1 Message Date
Faith Ekstrand
f9e993dfaf nvk: No-op implement VK_KHR_global_priority 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32433>
 2024-12-02 17:22:49 +00:00
Faith Ekstrand
0819e04f21 nvk: Increase push constant space to 256B 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32433>
 2024-12-02 17:22:49 +00:00
Faith Ekstrand
218fff2d5c vulkan: Update XML and headers to 1.4.303 
Also fix vk_cmd_queue generation for dropped KHR suffixes

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32433>
 2024-12-02 17:22:49 +00:00
Faith Ekstrand
2fae75b278 treewide: Stop putting enum in front of Vulkan enum types 
The Vulkan headers add typedefs to fix aliasing issues whenever a type
gets renamed.  However, C doesn't allow "enum typedef" so this doesn't
work if people stick the "enum" keyword in front.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32433>
 2024-12-02 17:22:49 +00:00
Faith Ekstrand
54aeff37ee vulkan: Add Vulkan 1.4 feature aliases 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32433>
 2024-12-02 17:22:49 +00:00
Faith Ekstrand
6fe6c42903 vulkan: Allow the same item to show up twice in core version <requires> 
The way the XML is being organized these days, they're doing one
<requires> section for each promoted thing and if something gets
promoted twice by different extensions.  As long as we grab the lowest
of those core versions, we should be fine.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32433>
 2024-12-02 17:22:49 +00:00
Job Noorman
25eee91016 ir3: add reformatting commits to .git-blame-ignore-revs 
Signed-off-by: Job Noorman <job@noorman.info>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32429>
 2024-12-02 16:44:50 +00:00
Bas Nieuwenhuizen
0702c554de util/perf: Fix some warnings. 
Warnings about long unsigned vs. long long unsigned, so lets use the proper thing.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32019>
 2024-12-02 15:15:52 +00:00
Christian Gmeiner
105fbaab49 v3dv: Switch to use libbroadcom_perfcntr 
Switch to a common library that does all the performance counter
readout. This converts one version-dependend file to a generic one.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Maíra Canal <mcanal@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32277>
 2024-12-02 14:13:24 +00:00
Christian Gmeiner
bb3fc7a44f v3d: Switch to use libbroadcom_perfcntrs 
Switch to a common library that does all the performance counter
readout. This converts one version-dependend file to a generic one.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Maíra Canal <mcanal@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32277>
 2024-12-02 14:13:24 +00:00
Christian Gmeiner
e531e9d616 broadcom: Add perfcount library 
Copy the code from the gallium driver into a small library located
in src/broadcom.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32277>
 2024-12-02 14:13:24 +00:00
Christian Gmeiner
5d186d1386 v3dv: Switch to v3d_X(..) 
Use the common helper.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32277>
 2024-12-02 14:13:24 +00:00
Christian Gmeiner
3b4636c769 v3d: Move v3d_X(..) to src/broadcom/common 
It will be re-used by libbroadcom_perfcntrs

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Maíra Canal <mcanal@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32277>
 2024-12-02 14:13:24 +00:00
Christian Gmeiner
787da655d1 v3dv: Switch to v3d_ioctl(..) 
Use the common helper.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Maíra Canal <mcanal@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32277>
 2024-12-02 14:13:24 +00:00
Christian Gmeiner
0d4313951f v3d: Move v3d_ioctl(..) to src/broadcom/common 
It will be re-used by libbroadcom_perfcntrs.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32277>
 2024-12-02 14:13:23 +00:00
Christian Gmeiner
fadcea80c0 broadcom/common: Make v3d_device_info.h usable for C++ 
We need it for our pps ds.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Maíra Canal <mcanal@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32277>
 2024-12-02 14:13:23 +00:00
David Rosca
4da1756be4 radeonsi/vcn: Create encode DPB surfaces with PIPE_BIND_VIDEO_ENCODE_DPB 
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32303>
 2024-12-02 13:48:22 +00:00
David Rosca
7d27de70af radeonsi/vcn: Create decode DPB surfaces with PIPE_BIND_VIDEO_DECODE_DPB 
Always use surface for DPB now that it is not GFX12 only.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32303>
 2024-12-02 13:48:22 +00:00
David Rosca
1d206ca94c radeonsi: Support PIPE_BIND_VIDEO_DECODE/ENCODE_DPB 
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32303>
 2024-12-02 13:48:22 +00:00
David Rosca
308bae950f ac/surface: Add RADEON_SURF_VIDEO_REFERENCE 
Select supported swizzle mode for VCN DPB surfaces.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32303>
 2024-12-02 13:48:22 +00:00
Kenneth Graunke
92797c6878 nir/algebraic: Reassociate fadd into fmul in DP4-like pattern 
This extends the optimization from commit 09705747d7 ("nir/algebraic:
Reassociate fadd into fmul in DPH-like pattern") to a chain of 4 ffmas
for a DP4-style pattern.

Moving the add to the other end of the sequence allows it to be fused
into an FMA.

fossil-db results from Alchemist:

   Totals:
   Instrs: 158544142 -> 158490516 (-0.03%); split: -0.04%, +0.00%
   Subgroup size: 7808912 -> 7808920 (+0.00%); split: +0.00%, -0.00%
   Cycle count: 17859550672 -> 17859491966 (-0.00%); split: -0.01%, +0.01%
   Spill count: 84652 -> 84494 (-0.19%); split: -0.37%, +0.18%
   Fill count: 160728 -> 160623 (-0.07%); split: -0.29%, +0.23%
   Scratch Memory Size: 4278272 -> 4272128 (-0.14%); split: -0.29%, +0.14%
   Max live registers: 32411695 -> 32409789 (-0.01%); split: -0.01%, +0.00%
   Max dispatch width: 5627856 -> 5627920 (+0.00%); split: +0.00%, -0.00%
   Non SSA regs after NIR: 185359099 -> 185307703 (-0.03%); split: -0.03%, +0.00%

   Totals from 16378 (2.56% of 640872) affected shaders:
   Instrs: 9818723 -> 9765097 (-0.55%); split: -0.58%, +0.04%
   Subgroup size: 194056 -> 194064 (+0.00%); split: +0.01%, -0.01%
   Cycle count: 294967108 -> 294908402 (-0.02%); split: -0.58%, +0.56%
   Spill count: 10088 -> 9930 (-1.57%); split: -3.09%, +1.53%
   Fill count: 24738 -> 24633 (-0.42%); split: -1.90%, +1.48%
   Scratch Memory Size: 439296 -> 433152 (-1.40%); split: -2.80%, +1.40%
   Max live registers: 1297204 -> 1295298 (-0.15%); split: -0.22%, +0.07%
   Max dispatch width: 133232 -> 133296 (+0.05%); split: +0.14%, -0.10%
   Non SSA regs after NIR: 11999084 -> 11947688 (-0.43%); split: -0.43%, +0.00%

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32197>
 2024-12-02 13:15:16 +00:00
Lionel Landwerlin
888f63cf1b anv/iris: leave 4k alignments for clear colors with modifiers 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 17f97a69c1 ("iris: Reduce clear color state alignment to 64B")
Fixes: 063715ed45 ("anv: Reduce clear color state alignment to 64B")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12195
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13057
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32422>
 2024-12-02 12:51:45 +00:00
Collabora's Gfx CI Team
52f13f5603 Uprev Piglit to 468221c722481c470e6a23760b914c33143c2af6 
d04d6fff00...468221c722

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32272>
 2024-12-02 12:13:05 +00:00
Sergi Blanch Torne
a4e3ff0464 Revert "ci: disable Collabora's farm due to maintenance" 
This reverts commit fd14b34923.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32420>
 2024-12-02 11:38:20 +00:00
Michel Dänzer
8197111881 winsys/amdgpu: Always use amdgpu_device_get_fd for aws->fd 
If the caller passed in the same DRM file description, use it for sws->fd
as well. This is simpler than the previously reverted commit and also
fixes https://gitlab.freedesktop.org/mesa/mesa/-/issues/12208.

v2:
* Move fallback sws->fd assignment to proper scope, fixes CI failures.
* Remove close(sws->fd) from amdgpu_winsys_create failure path, it can
  never be a valid file descriptor != aws->fd there.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32377>
 2024-12-02 10:38:22 +00:00
Michel Dänzer
f873ee506f Revert "winsys/amdgpu: fix FD mismatch" 
This reverts commit 9223528059.

Not needed. (The amdgpu_screen_winsys::input_fd reference in the comment
didn't make sense, there was no such thing)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32377>
 2024-12-02 10:38:22 +00:00
Rhys Perry
fd19ff0b9e aco: force linear for event_vmem_sample and event_vmem_bvh 
I don't know if this issue affects GFX12, but workaround it anyway to be
safe.

fossil-db (gfx1200):
Totals from 3463 (4.36% of 79395) affected shaders:
Instrs: 9794280 -> 9833253 (+0.40%); split: -0.00%, +0.40%
CodeSize: 52306040 -> 52457988 (+0.29%); split: -0.01%, +0.30%
Latency: 90549385 -> 93617517 (+3.39%); split: -0.00%, +3.39%
InvThroughput: 13189030 -> 13602942 (+3.14%); split: -0.00%, +3.14%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32373>
 2024-12-02 10:13:39 +00:00
Rhys Perry
86c63b29bc aco/gfx12: insert wait between VMEM WaW 
https://github.com/llvm/llvm-project/pull/105549

fossil-db (gfx1200):
Totals from 1783 (2.25% of 79395) affected shaders:
Instrs: 7398391 -> 7404566 (+0.08%); split: -0.00%, +0.08%
CodeSize: 38862456 -> 38886364 (+0.06%); split: -0.00%, +0.06%
Latency: 83191513 -> 84211504 (+1.23%); split: -0.00%, +1.23%
InvThroughput: 15185936 -> 15345744 (+1.05%); split: -0.01%, +1.06%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32373>
 2024-12-02 10:13:39 +00:00
Rhys Perry
9f3607de76 nir/tests: fix SSA dominance in opt_if_merge tests 
It isn't necessary for these ALU instructions to be used in the next IF.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Fixes: c437f2e79c ("nir/tests: Add tests for opt_if_merge")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12211
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32391>
 2024-12-02 09:38:22 +00:00
Benjamin Cheng
e9d9c67eab radv/video: enable by default on vcn2/3 with latest fw 
The latest FW in the linux-firmware repo provides the required features
to pass all the CTS tests.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32407>
 2024-12-02 08:30:08 +00:00
Sergi Blanch Torne
fd14b34923 ci: disable Collabora's farm due to maintenance 
Planned downtime in the farm:
* Start: 2024-12-02 08:00 UTC
* End: 2024-12-02 14:00 UTC

Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32183>
 2024-12-02 07:07:07 +00:00
David Rosca
76e3004fef radv/video: Always use setup reference slot when valid 
Reviewed-by: Benjamin Cheng <ben@bcheng.me>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10977
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32414>
 2024-12-02 06:26:34 +00:00
David Rosca
ef6facac15 radv/video: Fix IB signature checksum 
Reviewed-by: Benjamin Cheng <ben@bcheng.me>
Fixes: 152b06acd8 ("ac/vcn: allow sq signature package to be skipped")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32414>
 2024-12-02 06:26:34 +00:00
Timothy Arceri
6ca81adffc nir: allow loops with unknown induction var initialiser to unroll 
If the condition of the loop terminator is based on an unsigned value we
can in some cases find the max number of possible loop trips. With the
max loop trips know a complex unroll can unroll the loop.

For example:

   uniform uint x;
   uint i = x;
   while (true) {
      if (i >= 4)
         break;

      i += 6;
   }

The above loop can be unrolled even though we don't know the initial
value of the induction variable because it can have at most 1 iteration.

There were no changes with my shader-db collection. Change was inspired
by MR #31312 where builtin shader code failed to unroll.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31701>
 2024-12-02 11:44:33 +11:00
Dave Airlie
fcaf0f2590 vulkan: update to 302 headers for av1 encode 
Some of the spirv AMDX stuff probably broke things, but it should
still build.

Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32401>
 2024-12-02 06:29:00 +10:00
Connor Abbott
8fe3674df8 vulkan/runtime,radv: Add shared BVH building framework 
This is mostly adapted from radv's BVH building. This defines a common
"IR" for BVH trees, two algorithms for constructing it, and a callback
that the driver implements for encoding. The framework takes care of
parallelizing the different passes, so the driver just has to split the
encoding process into "stages" and implement just one part for each
stage.

The runtime changes are:
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
The radv changes are;

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31433>
 2024-12-01 20:08:35 +01:00
Connor Abbott
f8b584d6a5 vulkan/runtime,radv: Add shared BVH building framework 
This is mostly adapted from radv's BVH building. This defines a common
"IR" for BVH trees, two algorithms for constructing it, and a callback
that the driver implements for encoding. The framework takes care of
parallelizing the different passes, so the driver just has to split the
encoding process into "stages" and implement just one part for each
stage.

The runtime changes are:
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
The radv changes are;

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31433>
 2024-12-01 16:08:06 +00:00
Konstantin
d19af11e49 vulkan/meta: Add a pipeline cache 
RADV has a pipeline cache for meta shaders that can be used. It is also
required to correctly identify the pipelines as meta pipelines.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31433>
 2024-12-01 16:08:06 +00:00
Connor Abbott
c1c39116a7 vulkan/runtime: Add driver callbacks for BVH building 
All of these are functions that could reasonably be incorporated into a
Vulkan extension, but are currently missing. While we could in theory do
BVH building without them, using them simplifies the code significantly
and both radv and turnip can reasonably implement them.

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31433>
 2024-12-01 16:08:06 +00:00
Job Noorman
8ae5b27ee0 ir3: reformat after refactoring in previous commit 
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32088>
 2024-12-01 10:21:26 +00:00
Job Noorman
fda91b49d7 ir3: refactor builders to use ir3_builder API 
All functions that used to take an ir3_block as argument to append
instructions to now take an ir3_builder as argument.

Add an ir3_builder field to ir3_context and replace all uses of
ir3_context::block for creating instructions with ir3_context::build.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32088>
 2024-12-01 10:21:26 +00:00
Job Noorman
6c38402e9a ir3: use generic INSTR0 implementation for ir3_NOP 
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32088>
 2024-12-01 10:21:26 +00:00
Job Noorman
af92e4934e ir3: add ir3_after_instr_and_phis helper 
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32088>
 2024-12-01 10:21:26 +00:00
Job Noorman
62b23f175e ir3: don't update builder cursor for IR3_CURSOR_AFTER_BLOCK 
During instruction selection, instructions are sometimes emitted to
blocks other than the current one. For example, to predecessor blocks
for phi sources or to the first block for inputs. For those cases, a new
builder is created to emit at the end of the target block. However, if
the target block happens to be the same as the current block, the main
builder would not be updated to point past the new instructions.
Therefore, don't update the cursor when it points to the end of a block
to ensure that new instructions will always be added at the end.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32088>
 2024-12-01 10:21:26 +00:00
Arseny Kapoulkine
6a3944a195 radv: On GFX11, use box sorting heuristic based on ray flags 
Use box with largest ray interval for shadow rays (terminate on first
hit) as it maximizes the probability of finding some object in that box;
for reflection (closest hit) rays, use midpoint instead, which defers
processing of larger boxes the ray origin is in in favor of smaller
boxes closer to origin.

Since the sorting mode must be uniform, when terminate_on_first_hit flag
is divergent, we leave it as closest.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32416>
 2024-12-01 05:20:58 +00:00
Robert Mader
379de4cdce freedreno: Support offset query for multi-planar planes 
This allows `gbm_bo_get_offset()` to return the correct offset for e.g.
the second plane of a resource with the NV12 format. Crucially this
fixes direct scanout / hardware plane usage in Mutter and possibly other
clients.

While on it also add support for stride, modifier and n_planes queries.
The later two should not change in behavior and just safe a few CPU
cycles. The stride query support in theory fixes queries for multi-plane
formats, however in practice most/all currently used formats such as NV12,
P010 and YUV420 use the same stride for all planes.

Cc: mesa-stable
Acked-by: Rob Clark <robclark@freedesktop.org>
Signed-off-by: Robert Mader <robert.mader@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32282>
 2024-11-29 18:10:28 +01:00
Job Noorman
1cd09a0177 tu: advertise VK_SUBGROUP_FEATURE_ROTATE_CLUSTERED_BIT_KHR 
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31731>
 2024-11-29 16:22:48 +00:00
Job Noorman
659e033897 ir3: lower clustered rotates to shuffles 
shfl.rdown only works for the non-clustered case.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31731>
 2024-11-29 16:22:48 +00:00
Job Noorman
d5d0628728 nir/lower_subgroups: add option to only lower clustered rotates 
On ir3, we have native support for full rotates but not for clustered
ones.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31731>
 2024-11-29 16:22:48 +00:00
Job Noorman
eba6a70a66 tu: advertise VK_SUBGROUP_FEATURE_CLUSTERED_BIT 
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31731>
 2024-11-29 16:22:48 +00:00