aco/gfx12: insert wait between VMEM WaW
https://github.com/llvm/llvm-project/pull/105549 fossil-db (gfx1200): Totals from 1783 (2.25% of 79395) affected shaders: Instrs: 7398391 -> 7404566 (+0.08%); split: -0.00%, +0.08% CodeSize: 38862456 -> 38886364 (+0.06%); split: -0.00%, +0.06% Latency: 83191513 -> 84211504 (+1.23%); split: -0.00%, +1.23% InvThroughput: 15185936 -> 15345744 (+1.05%); split: -0.01%, +1.06% Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32373>
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@@ -278,9 +278,13 @@ check_instr(wait_ctx& ctx, wait_imm& wait, Instruction* instr)
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wait_imm reg_imm = it->second.imm;
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/* Vector Memory reads and writes return in the order they were issued */
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/* Vector Memory reads and writes decrease the counter in the order they were issued.
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* Before GFX12, they also write VGPRs in order if they're of the same type.
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* TODO: We can do this for GFX12 and different types for GFX11 if we know that the two
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* VMEM loads do not write the same lanes. Since GFX11, we track VMEM operations on the
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* linear CFG, so this is difficult */
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uint8_t vmem_type = get_vmem_type(ctx.gfx_level, instr);
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if (vmem_type) {
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if (vmem_type && ctx.gfx_level < GFX12) {
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wait_event event = get_vmem_event(ctx, instr, vmem_type);
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wait_type type = (wait_type)(ffs(ctx.info->get_counters_for_event(event)) - 1);
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if ((it->second.events & ctx.info->events[type]) == event &&
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@@ -192,6 +192,7 @@ BEGIN_TEST(insert_waitcnt.waw.vmem_types)
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//>> p_unit_test 0
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//! v1: %0:v[4] = buffer_load_dword %0:s[0-3], %0:v[0], 0
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//~gfx12! s_wait_loadcnt imm:0
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//! v1: %0:v[4] = buffer_load_dword %0:s[0-3], %0:v[0], 0
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(0));
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bld.mubuf(aco_opcode::buffer_load_dword, def_v4, desc_s4, op_v0, Operand::zero(), 0, false);
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@@ -220,6 +221,7 @@ BEGIN_TEST(insert_waitcnt.waw.vmem_types)
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//>> p_unit_test 3
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//! v1: %0:v[4] = image_sample %0:s[8-15], %0:s[0-3], v1: undef, %0:v[0] 1d
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//~gfx12! s_wait_samplecnt imm:0
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//! v1: %0:v[4] = image_sample %0:s[8-15], %0:s[0-3], v1: undef, %0:v[0] 1d
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bld.reset(program->create_and_insert_block());
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(3));
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@@ -249,6 +251,7 @@ BEGIN_TEST(insert_waitcnt.waw.vmem_types)
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//>> p_unit_test 6
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//! v1: %0:v[4] = image_bvh64_intersect_ray %0:s[0-3], s4: undef, v1: undef, %0:v[16-26] 1d
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//~gfx12! s_wait_bvhcnt imm:0
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//! v1: %0:v[4] = image_bvh64_intersect_ray %0:s[0-3], s4: undef, v1: undef, %0:v[16-26] 1d
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bld.reset(program->create_and_insert_block());
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(6));
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@@ -300,6 +303,7 @@ BEGIN_TEST(insert_waitcnt.waw.vmem_types)
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//>> BB11
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//! /* logical preds: BB9, BB10, / linear preds: BB9, BB10, / kind: uniform, */
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//! p_unit_test 9
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//~gfx12! s_wait_loadcnt imm:0
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//! v1: %0:v[4] = buffer_load_dword %0:s[0-3], %0:v[0], 0
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(9));
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bld.mubuf(aco_opcode::buffer_load_dword, def_v4, desc_s4, op_v0, Operand::zero(), 0, false);
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@@ -326,6 +330,7 @@ BEGIN_TEST(insert_waitcnt.waw.vmem_types)
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//! /* logical preds: BB12, BB13, / linear preds: BB12, BB13, / kind: uniform, */
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//! p_unit_test 10
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//~gfx11! s_waitcnt vmcnt(0)
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//~gfx12! s_wait_loadcnt imm:0
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//~gfx12! s_wait_samplecnt imm:0
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//! v1: %0:v[4] = buffer_load_dword %0:s[0-3], %0:v[0], 0
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bld.pseudo(aco_opcode::p_unit_test, Operand::c32(10));
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