Commit Graph

9456 Commits

Author SHA1 Message Date
Xiang, Haihao f8830a1bf7 intel: cast a pointer to unsigned long, avoid potential error. 2007-12-21 17:03:55 +08:00
Eric Anholt bea6b5fe5a [965] Enable EXT_framebuffer_object.
To do so, merge the remainnig necessary code from the buffers, blit, span, and
screen code to shared, and replace it with those.
2007-12-20 11:32:55 -08:00
Eric Anholt 106f398220 [965] Actually enable SGIS_generate_mipmap. 2007-12-20 11:28:10 -08:00
Eric Anholt 101abee6c4 [intel] Fix and reenable (software) SGIS_generate_mipmap
The core problem was that _mesa_generate_mipmap was not respecting RowStride
of the source image.  Additionally, the intel private data associated with the
images (level and face) was not being initialized for the
_mesa_generate_mipmap-generated images.
2007-12-20 11:26:34 -08:00
Eric Anholt b2f62609d0 [intel] Allow driver hooks to be NULL in intel_buffers.c and just update flags.
The 965 driver relies on flag checking instead of these hooks, and will be
using this code soon.
2007-12-20 08:24:45 -08:00
Eric Anholt fcd1e9dad6 [i915] Move meta_draw_quad into the vtbl with other meta operations. 2007-12-20 08:19:42 -08:00
Brian 2761cfce46 return correct size from glGetActiveUniform (bug 13751) 2007-12-20 09:06:05 -07:00
Xiang, Haihao e543292335 i915: avoid dead lock in intel_meta_draw_poly. fix #13696 2007-12-20 16:49:25 +08:00
Eric Anholt d2d82f8a29 [915] Set cliprects in the drawbuffer software fallback case as well.
Otherwise, we may violate cliprect asssertions on clearing the buffers, which
isn't affected by the fallback.
2007-12-18 18:56:20 -08:00
Xiang, Haihao 4cca760a9b i965: allocate GRF registers before building subroutines,
it ensures there are sufficient registers for all subroutines.
2007-12-19 10:22:28 +08:00
Xiang, Haihao e3a1ae0fcb i965: restore the flag after building the subroutine of the
GS thread. fix #13240
2007-12-19 09:59:37 +08:00
Brian 256115bd5e simplify update two-side lighting test (follow-on to previous front/back-face changes) 2007-12-18 16:24:19 -07:00
Brian 441bab8f17 fix NEED_SECONDARY_COLOR for vert/frag progs 2007-12-18 16:24:19 -07:00
Eric Anholt 9efa1029e5 Fix mismatched map/unmap of buffers in swrast read/drawpixels error paths. 2007-12-18 14:51:42 -08:00
Eric Anholt 4878f12189 [915] Free dri_bufmgr after mesa context data.
Fixes a crash when buffer objects are left around until context destroy.
2007-12-18 14:17:27 -08:00
Eric Anholt a856da6324 [915] Make polygon stipple use pre-unpacked pixel data.
This fixes a crash when stippling using data from a PBO.
2007-12-18 14:14:44 -08:00
Eric Anholt 0dc2c68ffc [915] Fix clear color when clearing with triangles.
The diffuse color format is always ARGB32, regardless of the destination
surface format.
2007-12-18 10:42:30 -08:00
Keith Packard dd1a868b74 [INTEL] Fix 965 to use new centralized mipmap pitch function 2007-12-18 10:22:16 -08:00
Keith Packard a183efc132 [Intel] Centralize mipmap pitch computations.
mipmap pitches must account for the device alignment requirements, which
used to be fairly simple; just align to a 4-byte boundary. However, to allow
textures to be drawn to under TTM, they now need to be aligned to a 64-byte
boundary. Placing all of the alignment constraints in a single function
allows this new constraint to be applied uniformly.

There was some pitch constraining code in intel_miptree_create, but that was
modifying the pitch long after the miptree had been layed out, so it only
served to wreck the mipmap and cause rendering errors.
2007-12-18 10:22:04 -08:00
Eric Anholt 6f1bfdc4bf [i915] Remove redundant set_draw_region code (like the comment says). 2007-12-17 17:01:07 -08:00
Eric Anholt 33487c15ba [intel] Improve INTEL_DEBUG=blit description of clearing. 2007-12-17 16:57:59 -08:00
Eric Anholt c24300f937 [intel] Fix copy'n'pasteo in decoding of the blit clear packet. 2007-12-17 16:53:51 -08:00
Eric Anholt 9a8819e767 [965] Add decode of 3DSTATE_DRAWING_RECTANGLE. 2007-12-17 16:53:47 -08:00
Eric Anholt 146030aad2 [965] Allow draw or depth regions to be NULL.
With FBOs, we end up wanting to do 3D metaops against one or the other without
having to find the other one to fill in if we're not going to draw to it.
2007-12-17 16:50:09 -08:00
Eric Anholt 447facfcd6 [965] Simplify scissor handling by using DrawBuffer values. 2007-12-17 15:30:04 -08:00
Eric Anholt 8336f3ffb7 [965] fix bad conflict resolution in debug code. 2007-12-17 14:42:31 -08:00
Eric Anholt 2c9e515d86 [965] Replace our own depth constants in intel context with GL context ones. 2007-12-17 14:28:54 -08:00
Eric Anholt 98d4355240 [965] Fix software fallbacks with region-backed textures. 2007-12-17 13:47:52 -08:00
Eric Anholt c1d6b874b3 [intel] Cleanup of */intel_blit.c to bring the two closer. 2007-12-17 13:19:33 -08:00
Eric Anholt b3169a9c35 [965] Output the buffer type in INTEL_DEBUG=bat surface state decode. 2007-12-17 13:02:16 -08:00
Michel Dänzer 1e04132306 i915: Fix issues with glDrawBuffer(GL_NONE).
Don't dereference NULL renderbuffer pointer, and make sure the software
fallback sticks.

Fixes https://bugs.freedesktop.org/show_bug.cgi?id=13694 .
2007-12-17 12:20:56 +01:00
Xiang, Haihao d859a60dc3 i965: check NULL pointer 2007-12-17 14:42:42 +08:00
Eric Anholt d913a15898 [i915] Fix missing symbol from 965 changes. 2007-12-16 13:00:23 -08:00
Eric Anholt 1daf5b3ad6 [965] Fully initialize the texture surface key data (padding around GLboolean) 2007-12-16 12:09:22 -08:00
Eric Anholt cbed2e4add [965] Enable ARB_pixel_buffer_object, and disable broken imaging extension.
While I haven't tested the imaging extension, this matches what 915 does.
2007-12-16 11:46:10 -08:00
Eric Anholt c0b4257aa9 [965] Move to using shared texture management code.
This removes the delayed texture upload optimization from 965, in exchange for
bringing us closer to PBO support.  It also disables SGIS_generate_mipmap,
which didn't seem to be working before anyway, according to the lodbias demo.
2007-12-16 11:26:19 -08:00
Eric Anholt 659baa3f25 [intel] Whitespace and comment changes to bring intel_mipmap_tree.c closer. 2007-12-15 13:09:58 -08:00
Eric Anholt 3fe9d5cbb7 [intel] Merge intel_buffer_objects to shared.
965 gains fixed TTM typing of the buffer object buffers and unused PBO
functions, and 915 gains buffer size == 0 fixes from 965.
2007-12-15 12:47:23 -08:00
Eric Anholt f5b3cd4620 [965] Use shared intel_regions.c.
This adds (so far) unused PBO functions, and holding the lock while writing
to regions (which may be shared static screen regions).
2007-12-15 12:45:52 -08:00
Eric Anholt 5e3ef623ee [intel] Fix uninitialized data in screen-region buffer objects. 2007-12-14 14:56:01 -08:00
Eric Anholt 55539f6b2a [intel] Remove excessive validation debugging. 2007-12-14 14:52:15 -08:00
Eric Anholt b8b49529b3 [intel] Initialize debug flag for dri_bufmgrs 2007-12-14 14:51:55 -08:00
Eric Anholt c5456a6b24 [intel] Remove useless intel_region_idle.
The idling it was trying to ensure was covered by the
intel_miptree_image_map()->intel_region_map() that immediately followed it.
2007-12-14 14:40:03 -08:00
Eric Anholt 84a076079d [intel] warnings cleanup 2007-12-14 14:40:03 -08:00
Brian 507d43f95b fix polygon cull regression 2007-12-14 14:35:18 -07:00
Eric Anholt 6f7d35318d [intel] Remove the relocation buffer lists and just cache one per buffer.
Each buffer object now has a relocation buffer pointer, which contains the
relocations for the buffer if there are any.  At the point where we have to
create a new type of relocation entry, we can change the code over to allowing
multiple relocation lists, but trying to anticipate what that'll look like
now just increases complexity.

This is a 30% performance improvement on 965.
2007-12-14 11:23:43 -08:00
Eric Anholt 38bad7677e [965] Replace the state cache suballocator with direct dri_bufmgr use.
The user-space suballocator that was used avoided relocation computations by
using the general and surface state base registers and allocating those types
of buffers out of pools built on top of single buffer objects.  It also
avoided calls into the buffer manager for these small state allocations, since
only one buffer object was being used.

However, the buffer allocation cost appears to be low, and with relocation
caching, computing relocations for buffers is essentially free.  Additionally,
implementing the suballocator required a don't-fence-subdata flag to disable
waiting on buffer maps so that writing new data didn't block on rendering using
old data, and careful handling when mapping to update old data (which we need
to do for unavoidable relocations with FBOs).  More importantly, when the
suballocator filled, it had no replacement algorithm and just threw out all
of the contents and forced them to be recomputed, which is a significant cost.

This is the first step, which just changes the buffer type, but doesn't yet
improve the hash table to not result in full recompute on overflow.  Because
the buffers are all allocated out of the general buffer allocator, we can
no longer use the general/surface state bases to avoid relocations, and they
are set to 0 instead.
2007-12-14 11:04:26 -08:00
Eric Anholt 0037ad4186 [intel] Remove broken mutex protection from dri_bufmgrs.
Now that the dri_bufmgr is stored in the context rather than the screen, all
access to one is single-threaded anyway.
2007-12-13 23:44:56 -08:00
Eric Anholt dbfe05ca24 [intel] Enable INTEL_DEBUG=bufmgr output in TTM mode as well as classic. 2007-12-13 23:26:43 -08:00
Eric Anholt 9f7d6b7210 [intel] assert that buffers are not mapped at last unreference.
bufmgr_fake doesn't care about it, but with ttm we would end up with the
buffer remaining referenced until application exit.
2007-12-13 23:24:53 -08:00