Commit Graph

15088 Commits

Author SHA1 Message Date
Samuel Pitoiset f62a8f888f radv: only set valid bitfields for CB/DS surfaces address
This isn't a problem in practice but better to mask them out.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29545>
2024-06-06 07:57:59 +02:00
Marek Olšák fbc237037c radeonsi/gfx12: fix GPU deadlocks due to query result incoherency
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510>
2024-06-06 01:01:46 +00:00
Marek Olšák 060d5dacfd ac: add gfx12 DCC shared code
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510>
2024-06-06 01:01:46 +00:00
Marek Olšák 1ea96a47cd ac/nir/lower_ngg: use voffset in global_atomic_add for xfb
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510>
2024-06-06 01:01:46 +00:00
Marek Olšák b002564633 ac/nir/lower_ngg: use global_atomic_amd to fix gfx12 streamout
The intrinsics are lowered before this is called.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510>
2024-06-06 01:01:46 +00:00
Marek Olšák 5db194b1d1 ac/descriptors: fix gfx12 regressions
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510>
2024-06-06 01:01:46 +00:00
Samuel Pitoiset f7e6609390 radv: assert that GDS/GDS OA buffers can't be created on GFX12
No GDS on GFX12 and this will be annoying for some queries that
currently rely on atomic GDS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525>
2024-06-05 14:47:27 +00:00
Samuel Pitoiset 8e9e877eb2 radv: cleanup radv_precompute_registers_hw_{ngg,fs}
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525>
2024-06-05 14:47:27 +00:00
Samuel Pitoiset d5074228ab radv: do not set VGT_PRIMITIVEID_EN.PRIMITIVEID_EN on GFX12
This bitfield doesn't exist.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525>
2024-06-05 14:47:27 +00:00
Samuel Pitoiset 87c1b981d9 radv: fix configuring NGG registers on GFX12
ac_compute_late_alloc() shouldn't be called on GFX12.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525>
2024-06-05 14:47:27 +00:00
Samuel Pitoiset 052655b65d radv: do not emit SPI_SHADER_PGM_RSRC3_GS on GFX12
This register shouldn't be emitted according to RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525>
2024-06-05 14:47:27 +00:00
Samuel Pitoiset e6609fa004 radv: update configuring PA_SC_WINDOW_SCISSOR on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525>
2024-06-05 14:47:27 +00:00
Samuel Pitoiset f6aeb86f35 radv: update configuring depth stencil buffers on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525>
2024-06-05 14:47:27 +00:00
Samuel Pitoiset d9650fef24 radv: update configuring color buffers on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525>
2024-06-05 14:47:27 +00:00
Samuel Pitoiset a06aaef704 radv: update number of input VGPRs for VS on GFX12
InstanceID is in VGPR1.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525>
2024-06-05 14:47:27 +00:00
Samuel Pitoiset b912d2f899 radv: configure PA_SC_SAMPLE_PROPERTIES on GFX12
MAX_SAMPLE_DIST has been moved from PA_SC_AA_CONFIG.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525>
2024-06-05 14:47:27 +00:00
Samuel Pitoiset aa02cd2a1b ac,radeonsi: set COLOR_SW_MODE for mutable CB surfaces on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525>
2024-06-05 14:47:27 +00:00
Konstantin Seurer 8dc364806e radv/ci: Bring back vkcts-navi21-llvm-valve
Most of the issues were fixed. Let's see how long it will last until it
has to be disabled again.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25293>
2024-06-05 13:41:47 +00:00
Konstantin Seurer b100d3f731 ac/llvm: Enable helper invocations for vote_all/any
cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25293>
2024-06-05 13:41:47 +00:00
Konstantin Seurer 2b38d4922e ac/llvm: Fix DENORM_FLUSH_TO_ZERO with exact instructions
cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25293>
2024-06-05 13:41:47 +00:00
Samuel Pitoiset 964f2b8140 radv: fix VRS subpass attachments with mipmaps
On GFX10.3, the driver should use the VRS image view provided by the
rendering state because it sets the base level correctly. On GFX11+,
using the image view dimension is enough.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29531>
2024-06-05 06:14:10 +00:00
Georg Lehmann a3f77e09a1 ac: set has_pack_32_4x8
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28882>
2024-06-04 17:00:29 +00:00
Faith Ekstrand bf9038b3b8 radv: Advertise VK_EXT_shader_replicated_composites
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509>
2024-06-04 16:34:48 +00:00
Georg Lehmann 818ff03865 aco: optimize branching sequence with p_create_vector exec producer
This happens with inverse_ballot and wave64.

Foz-DB Navi21:
Totals from 3 (0.00% of 79395) affected shaders:
Instrs: 2689 -> 2683 (-0.22%)
CodeSize: 14988 -> 14972 (-0.11%)
Latency: 20207 -> 20204 (-0.01%)
Copies: 144 -> 141 (-2.08%)
Branches: 76 -> 73 (-3.95%)
SALU: 241 -> 238 (-1.24%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29502>
2024-06-04 15:40:57 +00:00
David Heidelberg 46dd8b8d89 ci/radv: Document recent flake
Probably same as dfe5e56671 and 1f0f76dbdc .

Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29514>
2024-06-02 06:56:57 +00:00
Turo Lamminen 6796396257 radv: Optimize memcpy in write_image_descriptor
The size parameter can only take certain values. Make this visible to
the compiler to encourage it to inline the memcpy.

This improves descriptor_16combined_sampler from vkoverhead
considerably.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27191>
2024-05-31 11:50:46 +00:00
Eric Engestrom 75849bd428 radv/ci: document angle regressions from !29436 on stoney
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29498>
2024-05-31 11:26:16 +00:00
Georg Lehmann dcab408a6c nir: remove unpack_half_flush_to_zero
It doesn't make sense to have two sets of opcodes for this when all backends
that support the flush_to_zero variant just rely on the global floating point
mode anyway.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29433>
2024-05-31 09:46:35 +00:00
Samuel Pitoiset d4b37eca5f radv: do not set DX10_CLAMP on GFX12
This bit doesn't exist.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482>
2024-05-31 08:02:33 +00:00
Samuel Pitoiset 407cbd8c87 radv: update configuring GS_VGPR_COMP_CNT on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482>
2024-05-31 08:02:33 +00:00
Samuel Pitoiset 671329a934 radv: configure SPI_SHADER_GS_OUT_CONFIG_PS on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482>
2024-05-31 08:02:33 +00:00
Samuel Pitoiset 00361d1ece radv: configure PA_SC_HISZ_CONTROL on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482>
2024-05-31 08:02:33 +00:00
Samuel Pitoiset 1f078f02d1 radv: update configuring SPI_PS_IN_CONTROL on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482>
2024-05-31 08:02:33 +00:00
Samuel Pitoiset 640613f5a3 radv: update configuring GE_CNTL.PRIM_GRP_SIZE_GFX11 on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482>
2024-05-31 08:02:33 +00:00
Samuel Pitoiset 0412b8c02b radv: update configuring SPI_SHADER_PGM_RSRC4_{HS,GS,PS} on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482>
2024-05-31 08:02:33 +00:00
Samuel Pitoiset 50df855fba radv: update configuring SPI_SHADER_PGM_LO_ES on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482>
2024-05-31 08:02:33 +00:00
Samuel Pitoiset 4f77fde475 radv: update configuring SPI_SHADER_PGM_LO_LS on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482>
2024-05-31 08:02:33 +00:00
Samuel Pitoiset 8dbd353606 radv: mark all images coherent with TC L2 on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482>
2024-05-31 08:02:33 +00:00
Samuel Pitoiset 2786928ce8 radv: do not flush L2 metadata on GFX12
This doesn't seem to exist.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482>
2024-05-31 08:02:33 +00:00
Samuel Pitoiset b795685da2 radv: update configuring the attribute ring on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482>
2024-05-31 08:02:33 +00:00
Samuel Pitoiset e080ce9004 radv: do not enable MEM_ORDERED on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482>
2024-05-31 08:02:33 +00:00
Samuel Pitoiset 9a55198186 radv: configure DB_RENDER_CONTROL to zero on GFX12
This register shouldn't have any effects.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482>
2024-05-31 08:02:33 +00:00
Samuel Pitoiset b1abbfb893 radv: configure DB_Z_INFO.NUM_SAMPLES on GFX12
Similar to GFX11.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29482>
2024-05-31 08:02:33 +00:00
Ruijing Dong c1e52baf30 radeonsi/vcn: enable roi feature for vcn5
Compared to vcn4, qp map unit is a 32bit number,
vcn5 uses 16bit integer number, in addition to
that it has 2 unit alignment requirement(32 bit
alignment) and each qp value needs left shift 7 bits.

Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29423>
2024-05-30 20:12:37 +00:00
Ruijing Dong 6d90a1baa5 radeonsi/vcn: add header files for vcn5 av1 tile
Update header files for av1 tile and delta qp.
vcn5 needs driver and applcation to manage that
while in vcn4 they are managed in FW.

Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29423>
2024-05-30 20:12:37 +00:00
Ruijing Dong 80d3e84b81 radeonsi/vcn: add cdef modes for vcn5 encoding
default mode is the cdef id is managed by FW.
explicit mode is using external cdef id.

Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29423>
2024-05-30 20:12:37 +00:00
Mike Blumenkrantz 2aaa6ebba1 build/amd: add amd-use-llvm build option
this allows amd drivers to disable llvm support while still allowing
llvmpipe/lavapipe to be built

by disabling llvm support in amd drivers, the load times for these drivers
decreases by 5-10ms

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Mike Lothian <mike@fireburn.co.uk>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28969>
2024-05-30 19:05:00 +00:00
Samuel Pitoiset 72b1fa2ba3 radv: fix configuring the number of patch control points on GFX6
Fixes: bf936d0291 ("radv: update configuring the number of patch control points on GFX12")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29485>
2024-05-30 17:18:54 +00:00
Timur Kristóf ad033506aa radv: Ignore mediump IO flag.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29435>
2024-05-30 12:57:20 +00:00
Timur Kristóf be49b02f05 radv: Properly link TCS->TES IO again.
This commit makes RADV TCS->TES IO great again.

Fossil DB stats on Navi 21:

Totals from 2634 (3.32% of 79395) affected shaders:
MaxWaves: 56336 -> 56450 (+0.20%)
Instrs: 1670370 -> 1667819 (-0.15%); split: -0.22%, +0.06%
CodeSize: 8675476 -> 8643176 (-0.37%); split: -0.39%, +0.01%
VGPRs: 126776 -> 126608 (-0.13%)
LDS: 10444288 -> 10617856 (+1.66%)
Inputs: 30910 -> 25426 (-17.74%)
Outputs: 27000 -> 21516 (-20.31%)
Latency: 9403584 -> 9391648 (-0.13%); split: -0.25%, +0.12%
InvThroughput: 2127488 -> 2127180 (-0.01%); split: -0.13%, +0.12%
VClause: 33495 -> 34413 (+2.74%); split: -0.32%, +3.06%
SClause: 27905 -> 27879 (-0.09%); split: -0.30%, +0.20%
Copies: 82562 -> 83007 (+0.54%); split: -0.32%, +0.86%
PreSGPRs: 91029 -> 91014 (-0.02%)
PreVGPRs: 108505 -> 108473 (-0.03%); split: -0.06%, +0.03%
VALU: 1088113 -> 1087730 (-0.04%); split: -0.18%, +0.14%
SALU: 182853 -> 179541 (-1.81%); split: -1.82%, +0.01%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29436>
2024-05-30 12:28:51 +00:00