Samuel Pitoiset f62a8f888f radv: only set valid bitfields for CB/DS surfaces address ...

This isn't a problem in practice but better to mask them out.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29545>

2024-06-06 07:57:59 +02:00

..

addrlib

amd: add more gfx11 APUs

2024-05-24 13:48:28 +00:00

ci

radv/ci: Bring back vkcts-navi21-llvm-valve

2024-06-05 13:41:47 +00:00

common

radeonsi/gfx12: fix GPU deadlocks due to query result incoherency

2024-06-06 01:01:46 +00:00

compiler

aco: optimize branching sequence with p_create_vector exec producer

2024-06-04 15:40:57 +00:00

drm-shim

amd: Use align64 instead of ALIGN for 64 bit value parameter

2024-01-03 22:02:17 +00:00

llvm

ac/llvm: Enable helper invocations for vote_all/any

2024-06-05 13:41:47 +00:00

registers

amd: add gfx12 register definitions

2024-05-11 22:14:05 -04:00

vpelib

amd/vpelib: Bypass de/regam on HLG

2024-05-07 20:43:02 +00:00

vulkan

radv: only set valid bitfields for CB/DS surfaces address

2024-06-06 07:57:59 +02:00

meson.build

build/amd: add amd-use-llvm build option

2024-05-30 19:05:00 +00:00