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Marek Olšák eb6c098cd1 radeonsi: remove SI_OP_SYNC_AFTER 
All places that call si_barrier_after_internal_op also set SI_OP_SYNC_AFTER,
so we can do the sync unconditionally.

If we want to skip the "after" sync in the future, we just won't call
si_barrier_after_internal_op.

CP DMA is the only one that will sync even without
si_barrier_after_internal_op, but CP DMA ops are usually small and almost
never used on GFX10+.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31193>
 2024-09-17 20:44:58 +00:00
Marek Olšák d225fb3025 radeonsi: remove SI_OP_SKIP_CACHE_INV_BEFORE 
The only remaining use had no effect because it doesn't call
si_barrier_before_internal_op at all and instead implements its own
barrier.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31193>
 2024-09-17 20:44:58 +00:00
Marek Olšák 67593f0c51 radeonsi: move barriers out of si_compute_shorten_ubyte_buffer 
It turns out the barrier "before" didn't do anything.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31193>
 2024-09-17 20:44:58 +00:00
Marek Olšák e805c35986 radeonsi: move barriers out of si_copy_buffer 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31193>
 2024-09-17 20:44:58 +00:00
Marek Olšák 1ee394c34d radeonsi: move barriers out of si_clear_buffer 
Some places need no barriers, while other places only need the barrier
after.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31193>
 2024-09-17 20:44:57 +00:00
Marek Olšák 80a6f568e2 radeonsi: move barriers out of si_compute_clear_copy_buffer & si_cp_dma_* 
Some places don't need si_barrier_before_simple_buffer_op.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31193>
 2024-09-17 20:44:57 +00:00
Marek Olšák 5d607348a3 radeonsi: add barrier helpers for simple internal buffer ops 
These just take dst and src parameters instead of lists of buffers and
images.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31193>
 2024-09-17 20:44:57 +00:00
Marek Olšák 999b254ca8 radeonsi: remove unnecessary barriers from clear_buffer_rmw and clear_dcc_msaa 
These didn't do anything because the caller implements its own barriers.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31193>
 2024-09-17 20:44:57 +00:00
Marek Olšák 4194774edf radeonsi: move barriers out of si_launch_grid_internal_ssbos 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31193>
 2024-09-17 20:44:57 +00:00
Marek Olšák 7d55f4d6d2 radeonsi: inline si_launch_grid_internal_images without the barriers 
It has only one use. The barriers didn't do anything because the caller
doesn't set any flags and implements its own barrier.

This is part of trying to push the barrier logic outside the functions
that implement internal ops.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31193>
 2024-09-17 20:44:57 +00:00
Marek Olšák 35727d2e9c radeonsi: remove SI_OP_CS_IMAGE 
it's redundant now

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31193>
 2024-09-17 20:44:57 +00:00
Marek Olšák 58d22e41af radeonsi: fix broken tessellation in Unigine Heaven 
Test suites even with AMD_DEBUG=mono didn't catch this.

Fixes: b7136d0890 - radeonsi: pass TCS inputs_read mask to LS output lowering on GFX9 + monolithic

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31193>
 2024-09-17 20:44:57 +00:00
Georg Lehmann a3d6a770c0 nir/instr_set: fix fp_fast_math 
We can't just ignore the flags of the match, we need the union.

Fixes: 666647acae ("nir: track some float controls bits per instruction")

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31195>
 2024-09-17 20:00:03 +00:00
Marek Olšák 0d8fe2d03b ac/nir/meta: tune clear/copy_buffer performance for gfx6-10.3 
Finally, old GPUs have optimal clear/copy_buffer performance, but only
the top dGPU of each generation gets the best behavior.

Other dGPUs might need slightly different conditions.
APUs likely need very different conditions.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31082>
 2024-09-17 15:19:32 -04:00
Marek Olšák 34bd8427f8 radeonsi/gfx12: fix shader uploads via CP DMA 
It was incorrectly assumed that CP DMA is never used.

Fixes: c90d4e0d57 - radeonsi/gfx12: remove CP DMA workarounds because CP DMA is never used on gfx12

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31082>
 2024-09-17 15:19:30 -04:00
Marek Olšák e0f8993336 radeonsi: fix waiting for PS to finish if there are no CB/DB bindings on gfx6-8 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31082>
 2024-09-17 15:19:26 -04:00
Pavel Ondračka 495e88eab5 r300: move HyperZ blacklist to driconf 
Framework mostly copied from radeonsi...

The only change is the firefox override, which was not working anyway,
since firefox seems to no longer load mesa in the main process, so just
remove it.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30860>
 2024-09-17 15:43:08 +00:00
David Rosca 009017c33c radeonsi: Disable EFC on VCN 2.2 
VCN 2.2 doesn't support EFC.

Cc: mesa-stable

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31198>
 2024-09-17 14:51:03 +00:00
Lionel Landwerlin 45377dc5c4 brw: fix vecN rebuilds 
When loading a 64bit address from the push constants, we'll load a
vec2, so we need to allocate 2 GRFs and MOV each component.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11831
Fixes: 339630ab05 ("brw: enable A64 loads source rematerialization")
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31010>
 2024-09-17 14:22:23 +00:00
Lionel Landwerlin c16b27f66f brw: use a builder of the size of the physical register for uniforms 
Should avoid any partial write non-sense on Xe2+.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 339630ab05 ("brw: enable A64 loads source rematerialization")
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31010>
 2024-09-17 14:22:23 +00:00
Mike Blumenkrantz 31168bdbaa va/vl: add kopper support 
requires LIBVA_DRIVER_NAME=zink

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30984>
 2024-09-17 13:45:38 +00:00
Mike Blumenkrantz 55341689c8 vl/winsys: move dri3_get_screen_for_root to common 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30984>
 2024-09-17 13:45:38 +00:00
Mike Blumenkrantz 3d79e51726 va: flush_resource before presentation 
drivers require this to ensure presentation resources are present-able

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30984>
 2024-09-17 13:45:38 +00:00
Boris Brezillon b40ec57e36 panvk: Temporarily disable VK_FORMAT_D32_SFLOAT_S8_UINT on Valhall 
Valhall doesn't support interleaved D32_S8X24 so let's not advertise
this format for now. Ultimately, we want to support it as a
multi-plane D32 + S8 format, and we probably want to switch Bifrost
to this layout too.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Tested-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Tested-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31165>
 2024-09-17 13:13:58 +00:00
Boris Brezillon 7dc350ad76 pan/va: Accept DIM_SUBPASS[_MS] in valhall_tex_dimension() 
We don't merge subpasses, so we can't turn subpass attachment
loads into tile buffer reads yet. Let's just treat those as
regular 2D textures for now (as we do on Bifrost).

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11875
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Tested-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31166>
 2024-09-17 12:51:27 +00:00
Lionel Landwerlin 0f6fa4679d clc: find opencl headers from the installed llvm/clang location 
A number of people report the headers not being found when running
intel-clc. I've run into the same issue but only on the most recent
Ubuntu version.

Signed-off-by: Lionel Landwerlin <llandwerlin@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30711>
 2024-09-17 14:29:19 +03:00
Tapani Pälli 0e02de5a50 iris: fix issues with memory object updates via glBufferSubData 
Disable aysnc mapping in case we are updating a external memobj.

Fixes following Piglit tests:
   spec@ext_external_objects@vk-pix-buf-update-errors
   spec@ext_external_objects@vk-vert-buf-update-errors

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29303>
 2024-09-17 10:06:58 +00:00
Lionel Landwerlin 02b124846f brw: fix TGM messages to use cmask lsc opcodes 
This is a restriction for TGM.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: b55f7716 ("intel/brw: Switch to emitting MEMORY_*_LOGICAL opcodes")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31199>
 2024-09-17 09:28:58 +00:00
Lionel Landwerlin 2159e17da0 brw: remove (load|store)_raw_intel 
Those are Elk specific intrinsics.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: b8f264cfe4 ("intel/brw: Handle load/stores in lsc_op_for_nir_intrinsic()")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31199>
 2024-09-17 09:28:58 +00:00
Pavel Ondračka b3b09db951 r300/ci: update fails list with a recent fix 
Since the atan NIR improvements in 8579375777 we can now fit into
the cruel 64 ALU instruction limit on RV370.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31197>
 2024-09-17 09:03:09 +00:00
Samuel Pitoiset 656d7e887a radv: fix lowering the view index to an input varying for FS 
When multiview is used and the FS is compiled separately with GPL, the
view index still needs to be lowered, otherwise it's crashing later.

The lowering doesn't need to know the previous stage because ViewIndex
is a global thing (ie. it's neither a per-vertex or a per-primitive
varying).

This fixes recent
dEQP-VK.pipeline.pipeline_library.graphics_library.misc.other.view_index_from_device_index_*_pre_rasterization

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31192>
 2024-09-17 06:36:08 +00:00
Samuel Pitoiset fb3b563d1f radv: enable more properties with VK_KHR_maintenance5 
They are all supported by the hw and this matches AMD drivers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31129>
 2024-09-17 06:10:54 +00:00
Jesse Natalie 5b7e4f6ae7 driconf: Disable dzn for bg3.exe 
The app selects dzn over native drivers in some instances and dzn
doesn't handle this app (yet), so disable.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31157>
 2024-09-17 00:12:22 +00:00
Jesse Natalie 28db11d2f3 winsys/d3d12: Implement the latency control option 
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31157>
 2024-09-17 00:12:22 +00:00
Jesse Natalie e9ce526714 wgl: Add driconf options for controlling latency and swap interval 
Latency is hooked up to a new winsys framebuffer interface method. Swap
interval replaces the previous environment variable. This does make the
environment variable lowercase but that seems worth the break to be able
to set it from driconf.

Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31157>
 2024-09-17 00:12:22 +00:00
Jesse Natalie 64885821c2 winsys/d3d12: Use the waitable object to decrease latency 
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31157>
 2024-09-17 00:12:22 +00:00
Dylan Baker 2b8a980240 util/fossilize_db: don't use check_files_opened_successfully for foz_prepare 
The check function will free the db or the file if the other is NULL,
however, in this case db and the file are passed to foz_destroy, which
will also free them. This results in a double free. Instead, check that
either is NULL, and then goto the error case to ensure proper cleanup.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29881>
 2024-09-16 23:32:56 +00:00
Faith Ekstrand 112481d576 nil: Assert array_len == 0 in Extent4D<Bytes>::size_B() 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31191>
 2024-09-16 21:51:29 +00:00
Faith Ekstrand 7527b22fd6 nil: Return a more accurate size in level_size_B 
This gives us the tightest bounds we can while still taking into account
all of the array and other strides.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31191>
 2024-09-16 21:51:29 +00:00
Faith Ekstrand 1a50108e52 nil: Rework calculations of the sizes of miplevels 
What we actually want here is the size of the 1/2/3D part of the level,
not the array part.  This means a little more code duplication but the
result is also way more clear.  This shouldn't be a functional change as
Extent4D<units::Bytes>::size_B() doesn't take array_len into account.

This means we no longer call Image::level_size_B() for layout. Instead,
Image::level_size_B() should mirror this code.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31191>
 2024-09-16 21:51:29 +00:00
Dylan Baker 99f1b7d732 compiler/glsl: explicitly delete copy constructor and copy-assign 
Most of our visitors have custom destructors because they wrap C types,
and need to manually call destructors for those types. Because of this,
the implicitly generated copy constructors and copy-assignment operators
are not safe due copying pointers rather than data. Since we don't need
these features just delete them, so any attempt to use them would be a
compilation error. This doesn't fix any existing issue except stopping
coverity from complaining, but it does prevent new issues in the future.

Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29662>
 2024-09-16 21:08:04 +00:00
Dylan Baker 3f3cb1e2fa intel/elk: delete copy constructor and copy-assignment-operator 
To keep the rule-of-three. This points out that the implicit copy
operations would be dangerous when there is an explicit constructor and
destructor, since the class is holding un-managed memory.

Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29667>
 2024-09-16 20:31:45 +00:00
Dylan Baker 5809209316 anv: enforce state->cmd_buffer is never null in emit_Simpler_shader_init_fragment 
We have a couple of checks where we allow this to be NULL, but later we
unconditionally and unavoidably dereference the pointer, which means
there's no way that it ever could have been NULL. Change the assert at
the top to not allow NULL, and remove checks for it being NULL

CID: 1616544
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31156>
 2024-09-16 19:16:58 +00:00
Dylan Baker 5ebdfc8813 anv: assert we don't write past the end of an array 
Our array has a fixed size of 32, and we know at the start of the block
that our type_count is < 32, but in the loop we grow the block, in
theory up to 31 times. Coverity notes that, and points out we could
write off the end of the array. Add an assert in the loop to ensure we
don't, and to help Coverity out.

CID: 1615171
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31173>
 2024-09-16 17:42:40 +00:00
Dylan Baker 7556521417 intel: replace (uint64_t - uint64_t) > 0 with uint64_t > uint64_t 
As coverity points out, if the second uint64_t was greater than the
first (I don't think it actually can be), then the overflow would result
in the check succeeding when it shouldn't. We could cast this to an
integer type, but since we have uint64_t, we'd need int128_t for that.
Instead, replace the comparison to 0 with a direct comparison, since
that would give the correct result without potential to overflow.

CID: 1604833
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31175>
 2024-09-16 17:12:17 +00:00
David Heidelberg dfc4a68b0a ci/freedreno: re-enable piglit tests for Adreno 530 in nightly runs 
Also, document recent Adreno 530 improvements and failures.

Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31183>
 2024-09-16 16:30:33 +00:00
Rohan Garg 8b272c8d8c docs: update feature matrix for VK_KHR_shader_relaxed_extended_instruction 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30791>
 2024-09-16 15:58:35 +00:00
Rohan Garg 854865a059 lvp: enable VK_KHR_shader_relaxed_extended_instruction 
The extension only affects non semantic instructions that need no
handling in the backend compiler.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30791>
 2024-09-16 15:58:35 +00:00
Rohan Garg 97f41bc819 v3dv: enable VK_KHR_shader_relaxed_extended_instruction 
The extension only affects non semantic instructions that need no
handling in the backend compiler.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30791>
 2024-09-16 15:58:35 +00:00
Rohan Garg a03b307eea tu: enable VK_KHR_shader_relaxed_extended_instruction 
The extension only affects non semantic instructions that need no
handling in the backend compiler.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Connor Abbott <cwabbott0@gmail.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30791>
 2024-09-16 15:58:35 +00:00