Commit Graph

189296 Commits

Author SHA1 Message Date
Job Noorman e7c6037d12 ir3: use opt_shrink_vectors
This is useful to remove unused components from IO loads. This is not
only helpful for reducing the size of memory loads, but also for reducing
register pressure (as we need smaller vector registers).

Totals from 55567 (33.76% of 164575) affected shaders:
MaxWaves: 665780 -> 666690 (+0.14%); split: +0.15%, -0.01%
Instrs: 30850106 -> 30825516 (-0.08%); split: -0.33%, +0.25%
CodeSize: 62502952 -> 62336580 (-0.27%); split: -0.42%, +0.15%
NOPs: 5468972 -> 5463654 (-0.10%); split: -1.39%, +1.30%
MOVs: 1078607 -> 1060627 (-1.67%); split: -3.48%, +1.81%
Full: 807907 -> 805134 (-0.34%); split: -0.49%, +0.15%
(ss): 755846 -> 747963 (-1.04%); split: -2.51%, +1.46%
(sy): 367032 -> 363947 (-0.84%); split: -1.88%, +1.04%
(ss)-stall: 2907874 -> 2900183 (-0.26%); split: -1.97%, +1.71%
(sy)-stall: 10812082 -> 10599944 (-1.96%); split: -3.43%, +1.47%
STPs: 23062 -> 22980 (-0.36%)
LDPs: 35076 -> 32286 (-7.95%)
Preamble Instrs: 6668422 -> 6612037 (-0.85%); split: -1.35%, +0.51%
Early Preamble: 36055 -> 36169 (+0.32%); split: +0.32%, -0.01%
Cat0: 6015654 -> 6009409 (-0.10%); split: -1.29%, +1.18%
Cat1: 1631110 -> 1610537 (-1.26%); split: -2.54%, +1.28%
Cat2: 11783599 -> 11783634 (+0.00%); split: -0.02%, +0.02%
Cat3: 8198147 -> 8198526 (+0.00%); split: -0.00%, +0.01%
Cat5: 968517 -> 967899 (-0.06%); split: -0.06%, +0.00%
Cat6: 349200 -> 351795 (+0.74%); split: -0.01%, +0.75%
Cat7: 1009072 -> 1008909 (-0.02%); split: -0.58%, +0.56%

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34600>
2025-04-18 15:56:02 +00:00
Job Noorman f269c7b3b5 nir/opt_shrink_vectors: enable for load_ubo_vec4
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34600>
2025-04-18 15:56:02 +00:00
Samuel Pitoiset 792c30dd32 radv/meta: remove redundant parameter to blit_surf_for_image_level_layer()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34558>
2025-04-18 17:21:24 +02:00
Samuel Pitoiset a3f2c5f05e radv/meta: remove unnecessary radv_meta_blit2d_buffer::bs
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34558>
2025-04-18 17:21:24 +02:00
Samuel Pitoiset 78c2feed00 radv/meta: rename more buffer->memory for fill/copy/update operations
Recently, I renamed most of the helpers for future work but I forgot
few things like meta keys, etc.

This is for consistency.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34558>
2025-04-18 17:21:24 +02:00
Samuel Pitoiset 43c8cb1ae2 radv/meta: remove unused functions/prototypes
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34558>
2025-04-18 17:21:24 +02:00
Samuel Pitoiset 78f03dcf70 radv/meta: simplify dealing with image layouts for blits/resolves
This doesn't do anything useful.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34558>
2025-04-18 17:21:24 +02:00
Alyssa Rosenzweig 0140b7ba57 agx: remove silly cls argument
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34595>
2025-04-18 13:39:27 +00:00
Alyssa Rosenzweig b1e86b3eae agx: early-kill sources only if it won't shuffle
rather than always early killing and then hitting pathological shuffle
situations, only early-kill when we can prove that we won't need to shuffle. it
turns out that's most of the time.

even with this heuristic, we still get hurt bad in shader-db due to extra moves.
but hopefully, the #s here are small enough that we can move on with our lives
and fix this source of known unsoundness.

this is tagged for backport as it's needed to avoid a perf regression with the
previous patch.

combined stats from this commit and the previous commit:

total instrs in shared programs: 2846065 -> 2852257 (0.22%)
instrs in affected programs: 618734 -> 624926 (1.00%)

total alu in shared programs: 2329477 -> 2335534 (0.26%)
alu in affected programs: 508119 -> 514176 (1.19%)

total gprs in shared programs: 894762 -> 901327 (0.73%)
gprs in affected programs: 36946 -> 43511 (17.77%)

Backport-to: 25.1
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34595>
2025-04-18 13:39:27 +00:00
Alyssa Rosenzweig b88fe9b0c5 agx: late-kill sources
shader-db stats combined with next commit. this is the rip off the bandaid, next
is the optimize. split to enable bisecting.

the code we have to shuffle clobbered killed sources is broken and, after
thinking about that for a Long time, I don't see a reasonable way to fix it. But
if we late-kill sources - or model our calculations as-if we were late-killing
souces - we never have to shuffle onto a killed source and the problem goes away
entirely.

this is similar in spirit to what NAK does. it's not "optimal", but it's sane.

Backport-to: 25.1
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34595>
2025-04-18 13:39:27 +00:00
Alyssa Rosenzweig 7fad96d194 agx: model sources as late-kill in demand calcs
This hurts us in two ways:
* slightly more spilling (not actually a big problem)
* slightly worse occupancy (the shaders that are "helped" here are from trying
  less hard to fit at higher occupancy levels)

However, in exchange we get a LOT more flexibility in the RA.

total instrs in shared programs: 2847015 -> 2846065 (-0.03%)
instrs in affected programs: 84134 -> 83184 (-1.13%)

total alu in shared programs: 2330406 -> 2329477 (-0.04%)
alu in affected programs: 62305 -> 61376 (-1.49%)

total code size in shared programs: 20497326 -> 20491690 (-0.03%)
code size in affected programs: 586664 -> 581028 (-0.96%)

total gprs in shared programs: 894202 -> 894762 (0.06%)
gprs in affected programs: 8900 -> 9460 (6.29%)

total scratch in shared programs: 13292 -> 13304 (0.09%)
scratch in affected programs: 2924 -> 2936 (0.41%)

total threads in shared programs: 27819712 -> 27814272 (-0.02%)
threads in affected programs: 55296 -> 49856 (-9.84%)

total spills in shared programs: 907 -> 914 (0.77%)
spills in affected programs: 419 -> 426 (1.67%)

total fills in shared programs: 857 -> 862 (0.58%)
fills in affected programs: 389 -> 394 (1.29%)

Backport-to: 25.1
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34595>
2025-04-18 13:39:27 +00:00
Danylo Piliaiev cc7aa31b30 ir3,tu,freedreno: Allow more tex coord interpolations for prefetch
FS tex prefetch reads tex coords from r0.x, and it doesn't care
what interpolation they have. Thus we can allow all interpolations
which HLSQ_CONTROL_3_REG/HLSQ_CONTROL_4_REG support. Which would
be: (pixel, centroid, sample) x (nopersp, persp). So all but FLAT
are supported.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34422>
2025-04-18 13:12:03 +00:00
Danylo Piliaiev c4c7482a90 ir3: Move nir_intrinsic_barycentric_sysval to common ir3
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34422>
2025-04-18 13:12:03 +00:00
Eric Engestrom 33caee7dfe glx: drop dead GL_LIB_NAME define
Fixes: 5b89be3545 ("glx: Don't try to dlopen ourselves")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34602>
2025-04-18 12:14:11 +00:00
Rohan Garg a5033c54e7 anv: use the common function for detecting a mesh shader stage
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34604>
2025-04-18 10:08:22 +00:00
Rohan Garg 9b477eea19 intel/compiler: use a immediate when doing the shift
We can pass immediates to SHL and don't need to allocate a separate
register here.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34604>
2025-04-18 10:08:22 +00:00
Yogesh Mohan Marimuthu e63b24bee8 ac,radeonsi: clear_state is not supported in user queue
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34370>
2025-04-18 07:45:33 +00:00
Yogesh Mohan Marimuthu 61fd80a42e ac,winsys/amdgpu: get userq_ip_mask supported from kernel info ioctl
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34370>
2025-04-18 07:45:33 +00:00
Adam Jackson 5b89be3545 glx: Don't try to dlopen ourselves
The intention here, long ago, was to ensure that any symbols the DRI
driver needed from libGL were available. We don't have this problem
anymore, libgallium does not import any symbols from the GLX frontend
(or any other one for that matter).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30417>
2025-04-18 07:14:56 +00:00
Adam Jackson 9a610c5ab9 loader: Use RTLD_LOCAL not RTLD_GLOBAL
The gallium driver does not expose any symbols that anybody else wants
to see. But if we load it with RTLD_GLOBAL that's what happens, along
with all the symbols in the libraries it depends on.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30417>
2025-04-18 07:14:56 +00:00
Samuel Pitoiset bc811a602e radeonsi: fix configuring compute scratch
Missed the two different variables for graphics vs compute.

Fixes: e433a57650 ("ac,radeonsi: rework computing scratch wavesize and tmpring register")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34586>
2025-04-18 06:50:16 +00:00
Juston Li 762b749f9f driconf: enable custom_border_colors_without_format for ANGLE-on-anv
custom_border_colors_without_format was disabled on android for anv to
add support for VK_FORMAT_A4R4G4B4_UNORM_PACK16_EXT.
See https://gitlab.freedesktop.org/mesa/mesa/-/issues/12511#note_2749432

ANGLE's vulkan backend needs custom_border_colors_without_format for
EXT_texture_border_clamp which is required for
GL_ANDROID_extension_pack_es31a so enable it when run under ANGLE which
doesn't utilize VK_FORMAT_A4R4G4B4_UNORM_PACK16_EXT.

Signed-off-by: Juston Li <justonli@google.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34490>
2025-04-17 22:14:57 +00:00
GKraats 995dc61bf5 EGL: legacy-x11=dri2 should support hardware driver
Since MR !33891 EGL only supports a software driver (LLVM).
Routine dri3_x11_connect at
src/egl/drivers/dri2/platform_x11.c fails if DRI3 is not
available. So at that location variable *allow_dri2 should be set.

Looking at the major codition, we see it is not executed
if LIBGL_DRI3_DISABLE is set. In that case the hardware driver
is activated as desired. Previously this was not needed.
Also it is not practical, and not necessary.

I do not understand the major condition, so I did not change it.
This causes some duplicate coding.

Fixes: 323bad6b18 ("egl/x11: split out dri2 init entirely")
Signed-off-by: GKraats <vd.kraats@hccnet.nl>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34530>
2025-04-17 21:37:58 +00:00
Konstantin Seurer 76031ba53d radv: Optimize the gfx12 encode shader
Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34273>
2025-04-17 20:20:40 +00:00
Konstantin Seurer 97f6287827 radv: Use the BVH8 format on GFX12
Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34273>
2025-04-17 20:20:40 +00:00
Konstantin Seurer 95e7343a7d radv/bvh: Add helpers for encoding
The build and update paths can use the same code.

Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34273>
2025-04-17 20:20:40 +00:00
Konstantin Seurer 3af19f336c radv/bvh: Document GFX12 BVH encoding
Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34273>
2025-04-17 20:20:40 +00:00
Konstantin Seurer 2942e3affb radv/rra: Set rra_accel_struct_header::rtip_level
Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34273>
2025-04-17 20:20:40 +00:00
Konstantin Seurer fa99eeb2b4 radv/rra: Move gfx10_3 specific code to a new file
gfx12 needs completely different code and having them in different files
is cleaner.

Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34273>
2025-04-17 20:20:40 +00:00
Konstantin Seurer 9d157173b2 radv: Refactor create_bvh_descriptor
Make it a bit more extendable since GFX12 introduced more fields.

Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34273>
2025-04-17 20:20:40 +00:00
Konstantin Seurer 978e9b670e aco,nir: Add support for new GFX12 ray tracing instructions
Adds image_bvh_dual_intersect_ray and image_bvh8_intersect_ray which can
handle the new BVH format. Both instructions write up to 10 VGPRs so
they need to use a vec16 definition in nir.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34273>
2025-04-17 20:20:40 +00:00
Natalie Vock ee0f784858 aco/ra: Don't consider precolored ops/defs in get_reg_impl
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34273>
2025-04-17 20:20:40 +00:00
Natalie Vock b9e506afd4 aco: Add support for multiple definitions in emit_mimg
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34273>
2025-04-17 20:20:40 +00:00
Natalie Vock f309d76aab aco: Add support for multiple ops fixed to defs
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34273>
2025-04-17 20:20:40 +00:00
Konstantin Seurer fe739a2da2 ac: Add rt_version
rt_version describes which generation of RT capabilities a chip has.
This matches what PAL does.

Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34273>
2025-04-17 20:20:40 +00:00
Konstantin Seurer c33e598f39 vulkan: Add vk_ir_header::dst_leaf_node_offset
Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34273>
2025-04-17 20:20:40 +00:00
Konstantin Seurer 2dee1117b7 vulkan: Add a vk_device parameter to get_encode_key
Useful for selecting different encoding options based on hardware
generation.

Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34273>
2025-04-17 20:20:40 +00:00
Konstantin Seurer 0cc9443e9b util: Add BITSET_EXTRACT
Extracts a <=32 bit range from a bitset.

Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34273>
2025-04-17 20:20:40 +00:00
Jesse Natalie 37e6a8b57f d3d12: Minor fixes to residency algorithm when eviction is needed
Always reset batch_count and batch_memory_size. Proceed to eviction
only if we stopped before filling up the batch.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34562>
2025-04-17 19:51:15 +00:00
Jesse Natalie 565980f3c0 d3d12: Add tc memory throttles
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34562>
2025-04-17 19:51:15 +00:00
Caio Oliveira 43e521f7a5 hk: Don't expect garbage on shared_size
Talking to Alyssa this looks like an artifact of old ways that the
shader was being produced, so get rid of that zeroing.  Add an
assert as a canary for any problems we might be missing.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34139>
2025-04-17 19:13:18 +00:00
Caio Oliveira 33295b2249 spirv, nir: Allow non-Aliased workgroup memory blocks
Allocate space for the aliased region first, then allocate the
non-Aliased blocks in sequence after that.

SPV_KHR_workgroup_memory_explicit_layout extension added support for
having Blocks of workgroup (shared) memory, which include layout
decoration.  For that extension all such blocks must be decorated with
Aliased.

SPV_KHR_untyped_pointers extension lifts that requirement, allowing
blocks that don't alias in workgroup memory.  They are still explicitly
laid out.

The motivation is that untyped pointers provide a different
mechanism to obtain the same effect as the Aliased blocks.  Instead of
having two Aliased variables with different types, have a single
variable and use an untyped pointer with a different type to access it.

This patch is a preparation for supporting untyped pointers.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34139>
2025-04-17 19:13:18 +00:00
Caio Oliveira fd0a7efb5a spirv, nir: Delay calculation of shared_size when using explicit layout
Move the calculation to nir_lower_vars_to_explicit_types().  This
consolidates the check of shader_info::shared_memory_explicit_layout
in a single place instead of in all drivers.

This is motivated by SPV_KHR_untyped_pointers.  Before that extension
we had essentially two modes for shared memory variables

- No layout decorations in the SPIR-V, and both internal layout and
  driver location was _given by the driver_.

- Explicitly laid out, i.e. they are blocks, and decorated with Aliased.
  Because they all alias, we could assign them driver location directly
  to the start of the shared memory.

With the untyped pointers extension, there's a third option, to be added
by a later commit

- Explicitly laid out, i.e. they are blocks, and NOT decorated
  with Aliased.  Driver location is _given by the driver_.  Blocks
  with and without Aliased can be mixed.

The driver location of multiple blocks that don't alias depend on
alignment that is driver-specific, which we can more easily do from
the nir_lower_vars_to_explicit_types() that already has access to
a function to obtain such value.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> (hk)
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> (v3dv)
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (anv/hasvk)
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> (panvk)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (radv)
Reviewed-by: Rob Clark <robdclark@gmail.com> (tu)
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34139>
2025-04-17 19:13:17 +00:00
José Roberto de Souza a96e280dfe intel: Program XY_FAST_COLOR_BLT::Destination Mocs for gfx12
Copy engine is not used in gfx12 platforms on ANV but that is possible
in Iris.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34560>
2025-04-17 18:11:44 +00:00
Alyssa Rosenzweig 8b068ef6c1 hk: handle HIC with twiddled
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34585>
2025-04-17 17:54:06 +00:00
Alyssa Rosenzweig 88bdc27342 asahi: let booleans be your guide
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34585>
2025-04-17 17:54:06 +00:00
Alyssa Rosenzweig 551355d4e5 asahi,hk: factor out zls_control pack helper
makes both drivers a lot more readable, but especially gl

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34585>
2025-04-17 17:54:06 +00:00
Alyssa Rosenzweig 3a560dd32b asahi: identify ZLS compress load/store bits
obvious in retrospect!

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34585>
2025-04-17 17:54:06 +00:00
Alyssa Rosenzweig 9757185153 hk: plumb ZLS tiling
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34585>
2025-04-17 17:54:06 +00:00
Alyssa Rosenzweig 454a90eaa8 asahi: plumb ZLS tiling bits
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34585>
2025-04-17 17:54:06 +00:00