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Author SHA1 Message Date
Sergi Blanch Torne
e504d226ce bin/ci: crnm: format in columns when listing 
When we are printing a long list, and it needs more than one line, it gets
hard to review the content. This is an idea to group the elements to be
printed in columns to make it easier to identify individual elements in
the output.

Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34856>
 2025-05-16 20:34:16 +00:00
Seán de Búrca
611772af45 rusticl: replace unnecessary Vec references with slice refs 
v2: restore static borrow on `core::device::devs()`

Reviewed-by: @LingMan
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34389>
 2025-05-16 19:58:31 +00:00
Seán de Búrca
543b07bee8 rusticl: write CLInfoValues from iterators instead of collecting 
All of the current instances of writing info values from `Vec`s involve
building an iterator and then collecting it specifically for writing.
By using an `ExactSizeIterator`, we can avoid the need for allocating in
these cases.

v2: use existing `CLInfoValue::write_iter()` instead of custom type

Reviewed-by: @LingMan
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34389>
 2025-05-16 19:58:31 +00:00
Seán de Búrca
3a16c9ab43 rusticl: iterate subgroup sizes only as needed 
Making subgroup sizes an iterator avoids collecting (and thus
allocation) in cases where the values are unneeded or only the first is
needed.

v2: fix calculation of `SetBitIndices<u32>` iterator length

Reviewed-by: @LingMan
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34389>
 2025-05-16 19:58:31 +00:00
Seán de Búrca
0980ba8595 rusticl: use simple equality check for contexts instead of HashSet 
v2: use `[T]::split_first()` to consolidate equality check
v3: undo misleading comment split

Reviewed-by: @LingMan
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34389>
 2025-05-16 19:58:31 +00:00
Seán de Búrca
ac44513b9e rusticl: hand-map 3-element arrays for fallible conversion 
Iterating arrays and collecting to a `Vec` requires allocating memory
for the `Vec` and, when the needed result is an array of the same size
as the original, an unnecessary fallible conversion back to an array.

While arrays have a `map()` method for infallible conversions,
`try_map()` is unstable. Fortunately, we only have to worry about one
array size and it's small, so hand-mapping is a viable alternative.

Reviewed-by: @LingMan
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34389>
 2025-05-16 19:58:31 +00:00
Collabora's Gfx CI Team
38efae8964 Uprev Piglit to 1767af745ed96f77b16c0c205015366d1fbbdb22 
1498c397ea...1767af745e

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34936>
 2025-05-16 17:25:05 +00:00
Collabora's Gfx CI Team
749ccf3a9c Uprev ANGLE to db71e8fa7c26d18f76d7b9e9474447b20f1c73b3 
db33baf4eb...db71e8fa7c

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34936>
 2025-05-16 17:25:05 +00:00
Ella Stanforth
be3ce07f58 v3d/compiler: Fix ub when using memcmp for texture comparisons. 
We need to zero out all memory in the struct otherwise memcmp ends up comparing
padding bytes.

Cc: mesa-stable
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34945>
 2025-05-16 16:05:21 +00:00
Olivia Lee
22fb7eaa8c util/u_printf: fix memory leak in u_printf_singleton_add_serialized 
info->arg_sizes and info->strings were leaked because they were
allocated in the global context.

Fixes: 007f60c8b8 ("util/u_printf: add singleton implementation")
Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34987>
 2025-05-16 14:28:50 +00:00
Yiwei Zhang
1895de16a6 venus: filter out venus incapable physical devices 
VK_KHR_external_memory_fd is required by Venus at the bare minimum for
all different ways to support the current venus guest memory mapping.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34830>
 2025-05-16 14:12:36 +00:00
Yiwei Zhang
5abce52a67 venus: misc cleanups post wsi requirement relax 
This avoids an invalid assert hit on debug build since we no longer
require drm format modifiers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34830>
 2025-05-16 14:12:36 +00:00
Yiwei Zhang
92f79d35c4 venus: relax external memory ext requirement 
On Android, both the ANB and AHB extensions support still requires
renderer external memory support along with format modifier and foreign
queue support.

On Linux, however, renderer external memory support alone is sufficient
to expose external memory extensions. This also helps not to force sw
wsi device when renderer has external memory support.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34830>
 2025-05-16 14:12:36 +00:00
Yiwei Zhang
0c345c2c5e venus: clang-format 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34830>
 2025-05-16 14:12:36 +00:00
Loïc Molinari
a35415530d panfrost: Use util_streaming_load_memcpy() to copy AFBC superblocks 
Use the now AArch64 optimized util_streaming_load_memcpy() routine to
copy the AFBC superblocks from non-cacheable to cacheable memory.

Signed-off-by: Loïc Molinari <loic.molinari@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34606>
 2025-05-16 13:35:33 +00:00
Loïc Molinari
293cdbce75 util: Add AArch64 support to util_streaming_load_memcpy() 
AArch64 supports non-temporal (streaming) loads and writes.
util_streaming_load_memcpy() is extended to support AArch64
non-temporal loads using inline assembly.

The mesa_util_sse41 name is updated to mesa_util_simd to reflect
support for non-x86 architectures.

This makes copies from non-cacheable to cacheable memory about 20%
faster on a Rock 5B.

Signed-off-by: Loïc Molinari <loic.molinari@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34606>
 2025-05-16 13:35:33 +00:00
Loïc Molinari
d3544aebd7 panfrost: Optimize AFBC-P offsets computation 
Copy block info from non-cacheable memory to cacheable memory in order
to avoid flushing the write combining buffer at each iteration for
only 4 bytes written.

This makes AFBC-P offsets computation ~13.5 times faster on Rock 5B
for a 2048x2048 RGBA8 texture, taking ~0.2 ms instead of ~2.7 ms.

Signed-off-by: Loïc Molinari <loic.molinari@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34606>
 2025-05-16 13:35:33 +00:00
Daniel Schürmann
64eed6807a aco/isel: move visit_intrinsic() into separate file 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34977>
 2025-05-16 11:01:19 +00:00
Daniel Schürmann
8aae636e38 aco/isel: move visit_alu_instr() into separate file 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34977>
 2025-05-16 11:01:19 +00:00
Daniel Schürmann
5342576789 aco/isel: rename aco_instruction_selection.cpp -> aco_isel_nir.cpp 
Also remove some unused includes and unnecessary static specifiers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34977>
 2025-05-16 11:01:19 +00:00
Daniel Schürmann
b6442669c1 aco/isel: move select_ps_epilog() into separate file 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34977>
 2025-05-16 11:01:19 +00:00
Daniel Schürmann
776384d99d aco/isel: move select_ps_prolog() into separate file 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34977>
 2025-05-16 11:01:19 +00:00
Daniel Schürmann
c3ef927e31 aco/isel: move select_vs_prolog() into separate file 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34977>
 2025-05-16 11:01:19 +00:00
Daniel Schürmann
c4ec430c26 aco/isel: move select_rt_prolog() into separate file 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34977>
 2025-05-16 11:01:19 +00:00
Daniel Schürmann
4d910ca301 aco/isel: move select_trap_handler_shader() into separate file 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34977>
 2025-05-16 11:01:19 +00:00
Daniel Schürmann
146ce57f2d aco/isel: move control-flow helper functions into separate file 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34977>
 2025-05-16 11:01:19 +00:00
Daniel Schürmann
59f314a9a6 aco/isel: move some helper functions into a separate file 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34977>
 2025-05-16 11:01:19 +00:00
Daniel Schürmann
62a92417ef aco: move instruction selection files to /compiler/instruction selection/ subfolder 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34977>
 2025-05-16 11:01:19 +00:00
Daniel Schürmann
85a4ec32e8 aco: rename aco_instruction_selection_setup.cpp -> aco_isel_setup.cpp 
Also remove unused includes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34977>
 2025-05-16 11:01:19 +00:00
David Rosca
bade93c447 radeonsi/vce: Fix output quality and performance in speed preset 
Fixes: 544a180320 ("radeonsi/vce: Support quality presets")
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34894>
 2025-05-16 10:36:44 +00:00
David Rosca
ad96031ec6 radeonsi/vce: Only send one task per IB 
There is no need to use second task for config when creating the
session, also it doesn't work now as we don't set the next task
offset in task info anymore.

Fixes: 9ca1cda2be ("radeonsi/vce: Cleanup")
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34894>
 2025-05-16 10:36:44 +00:00
David Rosca
fd1480c3df radeonsi/vce: Fix bitstream buffer size 
On old VCE this was being rejected by kernel because the size here
was the buffer size, but the bitstream buffer address includes the
offset.

Fixes: 901aafb030 ("radeonsi/vce: Support raw packed headers")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13128
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34894>
 2025-05-16 10:36:44 +00:00
Juan A. Suarez Romero
f27d062abc gallium/util: fix num primitives for line loops 
When computing the number of primitives from the number of vertices, for
the case of line loops we need to include an extra line that closes the
shape.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35007>
 2025-05-16 09:06:17 +00:00
Gert Wollny
58d8dc9543 r600/sfn: dump the lowered shader when translation fails 
So far we printed the variant before the final lowering was done,
this is usually not that helpful. For this the code to dump the
shader has to go into r600_shader_from_nir.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34999>
 2025-05-16 08:45:58 +00:00
Valentine Burley
2ce2c1f835 zink/ci: Skip flaky trace on TGL 
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35016>
 2025-05-16 08:00:11 +00:00
Valentine Burley
4ad8c8752d ci: Run rustfmt and python jobs on aarch64 
The x86_64 shared runners often have long queues.
Move the rustfmt, python-artifacts, and yaml-toml-shell-py-test jobs to
use the aarch64 runners instead.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35000>
 2025-05-16 06:07:20 +00:00
Valentine Burley
3029898a15 ci/container: Include DEBIAN_BUILD_TAG in debian/arm64_build 
Unlike other containers (e.g. debian/x86_64_build-base and
debian/x86_64_build), debian/arm64_build is a single-stage image without
a separate -base variant.

Including DEBIAN_BUILD_TAG in its FDO_DISTRIBUTION_TAG ensures it gets
rebuilt when the build tag changes.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12737
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35000>
 2025-05-16 06:07:20 +00:00
Yiwei Zhang
cc4fd7cc9d vulkan: fix random tabs to spaces 
Only the vk_time_max_deviation tab usage requires a manual fix to make
sense. Others are boring replacements.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35011>
 2025-05-16 03:57:31 +00:00
Kovac, Krunoslav
360d252888 amd/vpelib: Fix CodeQL issues Pt1 
[WHY]
Redundant / inconsisten nullptr checks

Reviewed-by: Jude Shih <Jude.Shih@amd.com>
Reviewed-by: Evan Damphousse <Evan.Damphousse@amd.com>
Acked-by: ChuanYu Tseng <ChuanYu.Tseng@amd.com>
Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35012>
 2025-05-16 11:33:08 +08:00
Chang, Tomson
134b5bede7 amd/vpelib: Update headers 
Update new headers

Reviewed-by: Jude Shih <Jude.Shih@amd.com>
Reviewed-by: Ricky Lin <Ricky.Lin@amd.com>
Acked-by: ChuanYu Tseng <ChuanYu.Tseng@amd.com>
Signed-off-by: Tomson Chang <tomson.chang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35012>
 2025-05-16 11:33:08 +08:00
Chan, Roy
ffa5aadd2f amd/vpelib: fix doxgen warnings 
What does the change do after sanization if any.
Delete this section if not applicable.

Acked-by: ChuanYu Tseng <ChuanYu.Tseng@amd.com>
Signed-off-by: Roy Chan <roy.chan@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35012>
 2025-05-16 11:33:08 +08:00
Nagulendran, Iswara
80af9d4756 amd/vpelib: Fix VPELIB Build Warnings 
Fix build warnings.

Signed-off-by: Iswara Nagulendran <Iswara.Nagulendran@amd.com>
Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Acked-by: ChuanYu Tseng <ChuanYu.Tseng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35012>
 2025-05-16 11:33:08 +08:00
Okenczyc, Andrzej
71b285d091 amd/vpelib: Resolve query, predication and timestamp operations 
[HOW]
Some clients of vpelib requires additional operations to be implemented.
Implemented support for new firmware operations.

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Reviewed-by: Jesse Agate <Jesse.Agate@amd.com>
Acked-by: ChuanYu Tseng <ChuanYu.Tseng@amd.com>
Signed-off-by: Okenczyc, Andrzej <andrzej.okenczyc@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35012>
 2025-05-16 11:33:08 +08:00
Nagulendran, Iswara
f10244d8d9 amd/vpelib: Setup cost profiling support 
Add logs to profile registers writes.

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Reviewed-by: Jesse Agate <Jesse.Agate@amd.com>
Acked-by: ChuanYu Tseng <ChuanYu.Tseng@amd.com>
Signed-off-by: Nagulendran, Iswara <Iswara.Nagulendran@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35012>
 2025-05-16 11:33:08 +08:00
Han, Szu Chih
8bdbd12508 amd/vpelib: add TF_BT709 
[HOW]
Add VPE_SURFACE_PIXEL_FORMAT_VIDEO_420_10bpc_YCrCb -> VPE_TF_BT709 in
vpe_visual_confirm.c

Reviewed-by: Tomson Chang <Tomson.Chang@amd.com>
Reviewed-by: Min-Hsuan You <Min-Hsuan.You@amd.com>
Acked-by: ChuanYu Tseng <ChuanYu.Tseng@amd.com>
Signed-off-by: Han, Szu Chih <SzuChih.Han@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35012>
 2025-05-16 11:33:08 +08:00
Han, Szu Chih
3bd03b3cb0 amd/vpelib: add VPE_TF_SRGB 
[HOW]
Add VPE_SURFACE_PIXEL_FORMAT_VIDEO_420_10bpc_YCrCb -> VPE_TF_SRGB in
vpe_visual_confirm.c

Co-authored-by: Mike Han <szuchhan@amd.com>
Reviewed-by: Tomson Chang <Tomson.Chang@amd.com>
Reviewed-by: Min-Hsuan You <Min-Hsuan.You@amd.com>
Acked-by: ChuanYu Tseng <ChuanYu.Tseng@amd.com>
Signed-off-by: Han, Szu Chih <SzuChih.Han@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35012>
 2025-05-16 11:33:08 +08:00
Shih, Jude
7b68174bf0 amd/vpelib: Alpha Fill add mode 
Add destination and source stream mode

[WHY]
In the new version, we add the two alpha fill mode

[HOW]
Add the two enum first

Reviewed-by: Brendan Steve Leder <BrendanSteve.Leder@amd.com>
Reviewed-by: Tomson Chang <Tomson.Chang@amd.com>
Acked-by: ChuanYu Tseng <ChuanYu.Tseng@amd.com>
Signed-off-by: Jude Shih <shenshih@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35012>
 2025-05-16 11:33:08 +08:00
Shih, Jude
cb0b8d58a0 amd/vpelib: remove sensitive keywords 
[WHY]
    The KWS hit the words in the vpelib as forbidden

[HOW]
    replace it with proper ones

Reviewed-by: Tomson Chang <Tomson.Chang@amd.com>
Reviewed-by: Tiberiu Visan <Tiberiu.Visan@amd.com>
Acked-by: ChuanYu Tseng <ChuanYu.Tseng@amd.com>
Signed-off-by: Jude Shih <shenshih@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35012>
 2025-05-16 11:33:08 +08:00
Shih, Jude
c40ac921aa amd/vpelib: VPE descriptor added 
[WHY]
- Need to implement code for new version
- There are some format changes in new version

[HOW]
- Add plane descriptor
- Add plane descriptor patch
- Add command builder
- Restructure the code base to apply for multiple version

Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: Tomson Chang <Tomson.Chang@amd.com>
Acked-by: ChuanYu Tseng <ChuanYu.Tseng@amd.com>
Signed-off-by: Jude Shih <shenshih@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35012>
 2025-05-16 11:33:08 +08:00
Agate, Jesse
f80a69d756 amd/vpelib: Add macro to perform ceil division 
Add macro to perform ceil division

Reviewed-by: Brendan Steve Leder <BrendanSteve.Leder@amd.com>
Reviewed-by: Navid Assadian <Navid.Assadian@amd.com>
Acked-by: ChuanYu Tseng <ChuanYu.Tseng@amd.com>
Signed-off-by: Agate, Jesse <Jesse.Agate@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35012>
 2025-05-16 11:33:08 +08:00