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amd/vpelib: remove sensitive keywords

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[WHY]
    The KWS hit the words in the vpelib as forbidden

[HOW]
    replace it with proper ones

Reviewed-by: Tomson Chang <Tomson.Chang@amd.com>
Reviewed-by: Tiberiu Visan <Tiberiu.Visan@amd.com>
Acked-by: ChuanYu Tseng <ChuanYu.Tseng@amd.com>
Signed-off-by: Jude Shih <shenshih@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35012>
This commit is contained in:
Shih, Jude
2025-04-14 22:49:15 +08:00
committed by ChuanYu Tseng (Max)
parent c40ac921aa
commit cb0b8d58a0
13 changed files with 22 additions and 22 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/amd/vpelib/README.md
+1 -1
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@@ -164,7 +164,7 @@ struct vpe_build_param {
struct vpe_stream *streams; /**< List of input streams */
struct vpe_surface_info dst_surface; /**< Destination/Output surface */
struct vpe_rect target_rect; /**< rectangle in target surface to be blt'd.
Ranges out of target_rect won't be touched */
Ranges out of target_rect will not be touched */
struct vpe_color bg_color; /**< Background Color */
enum vpe_alpha_mode alpha_mode; /**< Alpha Mode. Output alpha in the output
surface */
src/amd/vpelib/src/chip/vpe10/vpe10_background.c
+1 -1
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@@ -47,7 +47,7 @@ bool vpe10_split_bg_gap(struct vpe_rect *gaps, const struct vpe_rect *target_rec
max_width = (uint16_t)((gap_width + gap_cnt - 1) / gap_cnt);
}
// if gap width, after calculation < VPE_MIN_VIEWPORT_SIZE, don't further split
// if gap width, after calculation < VPE_MIN_VIEWPORT_SIZE, do not further split
// need return true, not false, to prevent go to full BG flow
if ((gap_width < VPE_MIN_VIEWPORT_SIZE) || (max_width < VPE_MIN_VIEWPORT_SIZE))
return true;
src/amd/vpelib/src/chip/vpe10/vpe10_cm_common.c
+1 -1
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@@ -643,7 +643,7 @@ void vpe10_cm_helper_program_pwl(struct config_writer *config_writer,
uint32_t i;
uint32_t lut_data = 0;
// For LUT, we keep write the same address with entire LUT data, so don't set INC bit
// For LUT, we keep write the same address with entire LUT data, so do not set INC bit
config_writer_fill(
config_writer, VPEC_FIELD_VALUE(VPE_DIR_CFG_PKT_DATA_SIZE, num) |
VPEC_FIELD_VALUE(VPE_DIR_CFG_PKT_REGISTER_OFFSET, lut_data_reg_offset));
src/amd/vpelib/src/chip/vpe10/vpe10_dpp.c
+2 -2
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@@ -175,7 +175,7 @@ void vpe10_dscl_calc_lb_num_partitions(const struct scaler_data *scl_data,
*num_part_c = 12;
}
/* Not used as we don't enable prealpha dealpha currently
/* Not used as we do not enable prealpha dealpha currently
* Can skip for optimize performance and use default val
*/
static void vpe10_dpp_program_prealpha_dealpha(struct dpp *dpp)
@@ -191,7 +191,7 @@ static void vpe10_dpp_program_prealpha_dealpha(struct dpp *dpp)
VPCNVC_PRE_REALPHA, 0, PRE_REALPHA_EN, realpha_en, PRE_REALPHA_ABLND_EN, realpha_ablnd_en);
}
/* Not used as we don't have special 2bit LUt currently
/* Not used as we do not have special 2bit LUt currently
* Can skip for optimize performance and use default val
*/
static void vpe10_dpp_program_alpha_2bit_lut(
src/amd/vpelib/src/chip/vpe10/vpe10_mpc.c
+1 -1
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@@ -194,7 +194,7 @@ void vpe10_mpc_power_on_ogam_lut(struct mpc *mpc, bool power_on)
*/
REG_UPDATE(VPMPCC_MEM_PWR_CTRL, VPMPCC_OGAM_MEM_PWR_DIS, power_on ? 1 : 0);
/* Wait for memory to be powered on - we won't be able to write to it otherwise. */
/* Wait for memory to be powered on - we will not be able to write to it otherwise. */
if (power_on) {
// dummy write as delay in power up
REG_UPDATE(VPMPCC_MEM_PWR_CTRL, VPMPCC_OGAM_MEM_PWR_DIS, power_on ? 1 : 0);
src/amd/vpelib/src/chip/vpe10/vpe10_resource.c
+2 -2
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@@ -221,7 +221,7 @@ static bool vpe10_init_scaler_data(struct vpe_priv *vpe_priv, struct stream_ctx
}
if ((stream_ctx->stream.use_external_scaling_coeffs ==
false) || /* don't try to optimize is the scaler is configured externally*/
false) || /* do not try to optimize is the scaler is configured externally*/
(stream_ctx->stream.polyphase_scaling_coeffs.taps.h_taps == 0) ||
(stream_ctx->stream.polyphase_scaling_coeffs.taps.v_taps == 0)) {
scl_data->polyphase_filter_coeffs = 0;
@@ -585,7 +585,7 @@ static uint16_t get_max_gap_num(
*/
if (!is_color_fill) {
// full colorfillOnly case, no need to + 1 as the gap won't be seaprated by stream dst
// full colorfillOnly case, no need to + 1 as the gap will not be seaprated by stream dst
// for non-colorfillOnly case, +1 for worst case the gap is separated by stream dst
max_gaps += 1;
}
src/amd/vpelib/src/core/color.c
+2 -2
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@@ -751,7 +751,7 @@ enum vpe_status vpe_color_update_shaper(const struct vpe_priv *vpe_priv, uint16_
struct vpe_shaper_setup_in shaper_in;
shaper_in.shaper_in_max = 1 << 16;
shaper_in.use_const_hdr_mult = false; // can't be true. Fix is required.
shaper_in.use_const_hdr_mult = false; // can not be true. Fix is required.
ret = vpe_build_shaper(&shaper_in, shaper_func->tf, pq_norm_gain, &shaper_func->pwl);
@@ -933,7 +933,7 @@ void vpe_color_get_color_space_and_tf(
*cs = colorRange == VPE_COLOR_RANGE_FULL ? COLOR_SPACE_2020_RGB_FULLRANGE
: COLOR_SPACE_2020_RGB_LIMITEDRANGE;
break;
/* VPE doesn't support JFIF format of RGB output, but geometric down scaling will change cs
/* VPE does not support JFIF format of RGB output, but geometric down scaling will change cs
* parameters to JFIF. Therefore, we need to add JFIF format in RGB output to avoid output
* color check fail.
*/
src/amd/vpelib/src/core/common.c
+1 -1
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@@ -389,7 +389,7 @@ enum vpe_status vpe_check_output_support(struct vpe *vpe, const struct vpe_build
return VPE_STATUS_PITCH_ALIGNMENT_NOT_SUPPORTED;
}
// target rect shouldn't exceed width/height
// target rect should not exceed width/height
if ((param->target_rect.x < surface_info->plane_size.surface_size.x ||
param->target_rect.x + (int32_t)param->target_rect.width >
surface_info->plane_size.surface_size.x +
src/amd/vpelib/src/core/config_writer.c
+3 -3
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@@ -89,7 +89,7 @@ static inline void config_writer_new(struct config_writer *writer)
writer->base_cpu_va = writer->buf->cpu_va;
writer->base_gpu_va = writer->buf->gpu_va;
// new header. don't need to fill it yet until completion
// new header. do not need to fill it yet until completion
writer->buf->cpu_va += sizeof(uint32_t);
writer->buf->gpu_va += sizeof(uint32_t);
writer->buf->size -= sizeof(uint32_t);
@@ -105,7 +105,7 @@ void config_writer_set_type(struct config_writer *writer, enum config_type type,
if ((writer->type != type) || (writer->pipe_idx != pipe_idx)) {
if (writer->type == CONFIG_TYPE_UNKNOWN) {
// new header or only pipe change. don't need to fill it yet until completion
// new header or only pipe change. do not need to fill it yet until completion
writer->pipe_idx = pipe_idx;
config_writer_new(writer);
} else {
@@ -129,7 +129,7 @@ void config_writer_force_new_with_type(struct config_writer *writer, enum config
uint64_t size = writer->buf->cpu_va - writer->base_cpu_va;
if (writer->type == CONFIG_TYPE_UNKNOWN) {
// new header. don't need to fill it yet until completion
// new header. do not need to fill it yet until completion
config_writer_new(writer);
} else if (size > 0) {
// command not empty, close the previous one
src/amd/vpelib/src/core/inc/config_cache.h
+3 -3
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@@ -74,13 +74,13 @@ struct config_cache {
bool cached;
};
/* A macro that helps cache the config packet, it won't cache if it is in bypass mode
/* A macro that helps cache the config packet, it will not cache if it is in bypass mode
* as bypass mode is not heavy lifting programming.
*
* /param obj_cache an object that has the config cache member
* /param ctx an input/output context that contains the configs vector
* /param disable_cache a flag that controls a caching is needed
* /param is_bypass if it is in bypass, it doesn't cache the bypass config
* /param is_bypass if it is in bypass, it does not cache the bypass config
* /param program_func_call the program call that generate config packet content
* /param inst index to address the config_cache array
*/
@@ -114,7 +114,7 @@ struct config_cache {
\
if (!is_bypass) { \
/* make sure it opens a new config packet so we can cache a complete new config */ \
/* for bypass we don't do caching, so no need to open a new desc */ \
/* for bypass we do not do caching, so no need to open a new desc */ \
config_writer_force_new_with_type(config_writer, CONFIG_TYPE_DIRECT); \
} \
\
src/amd/vpelib/src/core/inc/config_writer.h
+1 -1
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@@ -70,7 +70,7 @@ struct vpep_direct_config_packet {
/* config writer only help initialize the 1st DWORD,
* and 'close' the config (i.e. finalize the size) once it is completed.
* it doesn't help generate the content, which shall be prepared by the caller
* it does not help generate the content, which shall be prepared by the caller
* and then call config_writer_fill()
*/
struct config_writer {
src/amd/vpelib/src/core/resource.c
+1 -1
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@@ -620,7 +620,7 @@ bool should_generate_cmd_info(enum vpe_stream_type stream_type)
case VPE_STREAM_TYPE_BG_GEN:
return true;
default:
/* destination-as-input virtual stream doesn't need a new cmd_info,
/* destination-as-input virtual stream does not need a new cmd_info,
it is used as one of the inputs in blending normal input stream only */
return false;
}
src/amd/vpelib/src/core/vpelib.c
+3 -3
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@@ -297,7 +297,7 @@ static enum vpe_status populate_bg_stream(struct vpe_priv *vpe_priv, const struc
stream = &stream_ctx->stream;
stream_ctx->stream_type = VPE_STREAM_TYPE_BG_GEN;
// if output surface is too small, don't use it as dummy input
// if output surface is too small, do not use it as dummy input
// request 2x2 instead of 1x1 for bpc safety
// as we are to treat output as input for RGB 1x1, need 4bytes at least
// but if output is YUV, bpc will be smaller and need larger dimension
@@ -415,7 +415,7 @@ static enum vpe_status populate_input_streams(struct vpe_priv *vpe_priv, const s
/* if top-bottom blending is not supported,
* the 1st stream still can support blending with background,
* however, the 2nd stream and onward can't enable blending.
* however, the 2nd stream and onward can not enable blending.
*/
if (i && param->streams[i].blend_info.blending &&
!vpe_priv->pub.caps->color_caps.mpc.top_bottom_blending) {
@@ -779,7 +779,7 @@ enum vpe_status vpe_build_commands(
break;
}
// Add next collaborate sync start command when this vpe_cmd isn't the final one.
// Add next collaborate sync start command when this vpe_cmd is not the final one.
if (cmd_idx < (uint32_t)(vpe_priv->vpe_cmd_vector->num_elements - 1)) {
status = builder->build_collaborate_sync_cmd(vpe_priv, &curr_bufs);
if (status != VPE_STATUS_OK) {