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Alyssa Rosenzweig e4791d2bf8 pan/bi: Set branch conditional bit 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig ffe7a61a46 pan/bi: Set back-to-back bit more accurately 
See Connor's ISA notes. Basically set unless it's a branch (explicit or
fallthrough).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig 3aacfaf87e pan/bi: Set branch_conditional if b2b is set 
Match the blob.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig e945d4f79d pan/bi: Pack proper clause offsets 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig 682b63cdc2 pan/bi: Measure distance between blocks 
For branch offset calculation.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig 64c49ab1fc pan/bi: Add bi_foreach_clause_in_block_from{_rev} helpers 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig 64bedbfa67 pan/bi: Link clauses back to their blocks 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig 9c32956750 pan/bi: Preliminary branch packing 
Simple == 0 branch packing. Offset is still to-do.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig cd9a08d4f2 pan/bi: Assign constant port for branch offsets 
By convention.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig cdff3ebc9a pan/bi: Set branch_constant if there is a branch 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig b9967ab6da pan/bi: Pack branch offset constants 
This is not fully generic but for a single constant it will do.
Extensions left for future work.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig 627872ef7f pan/bi: Add branch constant field to IR 
The offsets used for branches need some extra bits twiddled, so add a
field to the clause to indicate this is happening. This is not ambiguous
since a clause can only have a single branch.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig f1298ae336 pan/bi: Passthrough ZERO in branch packing 
There's a special mode for it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig d619ff009b pan/bi: Fix branch condition typesize 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig 1cdd55a81e pan/bi: Fix CONVERT component counting 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig d8c6a71878 pan/bi: Only rewrite COMBINE dest if not SSA 
If it's already a register, there's no point in rewriting and it will
disturb the existing register, i.e. for

   if (..) {
      r0 = vecN ..
   } else {
      r0 = vecN ..
   }

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig e42a5dfd4f pan/bi: Fix emit_if successor assignment 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: 9a00cf3d1e ("pan/bi: Add support for if-else blocks")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig b34eb94d9c pan/bi: Allow printing branches without targets 
Useful for debugging codegen.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig a4fc16a1d4 pan/bi: Remove schedule_barrier 
Legacy from Midgard.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig b3ae088b96 pan/bi: Add helper to measure clause size 
Useful for branching.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig 2a4e4477fc pan/bi: Add bi_layout.c for clause layout helpers 
Figuring out what "shapes" of clauses are kosher happens during
scheduling, not packing, but shouldn't distract the scheduler. So let's
add a new file for these sorts of questions.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig c3de28bb49 pan/bi: Remove more artefacts of 2-pass scheduling 
A clause is, by definition, already scheduled.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig 4096be05af pan/bi: Add MUL.i32 to disasm 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig ec8665615f pan/bi: Disassemble pos=0xe 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig a658a4f7a5 pan/bi: Document constant count invariant 
constants + instructions <= 13

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig ac64bf9b20 pan/bi: Move bi_flip_ports out of port assignment 
It's more of a packing fixup than anything scheduler-y, and port
assignment will soon be the domain of the scheduler.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig 95e3776d3e pan/bi: Add FILE* argument to bi_print_registers 
In case we need it in general IR printing.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig dd96b451f6 pan/bi: Drop struct from bi_registers 
It's a full-fledged part of the IR now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig b042ddef32 pan/bi: Move bi_registers to bi_bundle 
Make it a part of the IR itself.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig 79f30d8a86 pan/bi: Move bi_registers to common IR structures 
Port assignments are critical to scheduling, this can't just live in
bi_pack.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig 59f8f20306 pan/bi: Remove comment about old scheduler design 
I've realized it really has to be 1-pass to be sane.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig 635bf652ed pan/bi: Remove FMA? parameter from get_src 
We can lower away zeroes a bit earlier.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5260>
 2020-05-29 20:34:55 +00:00
Alyssa Rosenzweig 20f6c7a913 panfrost: Preload gl_FragCoord on Bifrost 
It's a precoloured register but we do need to specify in the cmdstream
that we want the preloading to happen.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5267>
 2020-05-29 20:19:46 +00:00
Alyssa Rosenzweig 1d194f8ac4 panfrost: Set reads_frag_coord as a sysval 
In addition to parsing out the varying. This is needed so it works on
Bifrost as well.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5267>
 2020-05-29 20:19:46 +00:00
Alyssa Rosenzweig 52875a34aa panfrost: Don't generate gl_FragCoord varying on Bifrost 
It's treated as a sysval there, so that's silly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5267>
 2020-05-29 20:19:46 +00:00
Rob Clark 11470fcde2 freedreno/a6xx: fix vsc assert 
Fixes a debug build assert seeing with an android app.  Not quite sure
which path was passing us draw_info w/ instance_count==0.  But we should
just treat non-instanced draws as having a single instance.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5091>
 2020-05-29 19:35:08 +00:00
Kristian H. Kristensen f6f7bc2979 freedreno/a6xx: Program VFD_DEST_CNTL from program stateobj 
This only depends on the generated shader.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5140>
 2020-05-29 18:59:56 +00:00
Kristian H. Kristensen 7aa809e31c freedreno/a6xx: Create stateobj for VFD_DECODE 
This now only depends on vertex state and we can create it once
up front in pctx->create_vertex_elements_state().

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5140>
 2020-05-29 18:59:56 +00:00
Kristian H. Kristensen 8952dd6d99 freedreno/a6xx: Decouple VFD_FETCH and VFD_DECODE 
We used to output a VFD_FETCH entry for each VFD_DECODE, but we can
instead output just one VFD_FETCH per VBO and point multiple
VFD_DECODE entries at the same VFD_FETCH entry.  There's typically
fewer VBOs than vertex elements so this is a small win in itselfs, but
more importantly, the VFD_DECODE state now only depends on program
state.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5140>
 2020-05-29 18:59:56 +00:00
Kristian H. Kristensen c15db8928f freedreno/a6xx: Move per element offset to VFD_DECODE 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5140>
 2020-05-29 18:59:56 +00:00
Eric Anholt 601a029e67 ci: Rename x86_cross_arm_test to just arm_test. 
This gets us back to the behavior we used to have for freedreno: clicking
play on arm_test gets you testing of the ARM platforms that aren't under
arm-build (the LAVA runners).

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5247>
 2020-05-29 16:46:44 +00:00
Eric Anholt 9c9ade4685 ci: Don't build an arm_test container now that the last user is gone. 
db410c and cheza used to use it, and now both are on baremetal.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5247>
 2020-05-29 16:46:44 +00:00
Eric Anholt 6f4fc4ff71 ci: Switch cheza (freedreno a630) testing to baremetal. 
Now that we have scripts in place to do baremetal testing of cheza, switch
it over.  As of this writing, we have 5 chezas for baremetal and 4 for the
old docker CI setup (just 2 fewer than we originally had before this work,
since some had had filesystem failures and I switched those first), and
once we are sure of this we can backport to stable branch CI and move the
rest of them to baremetal.

I've run a lot of jobs through the baremetal scripts as I worked on
sorting out vulkan CTS stability, so I feel good about the stability of
the GLES CTS here.

The options job is now split out to separate jobs, as we don't currently
have a way to stack multiple sets deqp runs with different env vars in a
single baremetal run, and just chaining cros_servo.sh invocations runs
into a lack of cleanup of the serial-watching scripts which we rely on
container exit sorting out for us.  This means a little less than 2x the
artifacts downloads we had before for a630 and a few more container
instantiations.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5247>
 2020-05-29 16:46:44 +00:00
Eric Anholt c89a749f66 ci: Add scripts for controlling bare-metal chezas. 
This will let us:

- deploy kernels for testing code depending on new kernel featuers
- Ensure a pristine state in the HW before starting our tests
- Avoid disk rot on the chezas taking them out (we'd lost 3/9 in a few
  months).

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5247>
 2020-05-29 16:46:44 +00:00
Eric Anholt 3a1010e21a ci: Build a cheza kernel. 
This is a set of kernel options I've come up with mostly cribbing from
chrome os's kernel config snippet.  We also build an lzma kernel, as
uncompressed kernel is big but lzma is the only compression supported by
the bootloader.  With that image, we have to pack it into a FIT formatted
image+dtb blob.

CONFIG_SUNRPC_DEBUG is added so that you can set "nfsrootdebug" to figure
out what's going wrong with your nfs mount (mine were "both the tcp and
nfsvers options were required, and don't try to use 'default' as the root
path to defer to DHCP's answer because otherwise you get
/tftpboot/default, just use an empty root path which doesn't prepend
/tftpboot.")

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5247>
 2020-05-29 16:46:44 +00:00
Eric Anholt b678568a5e ci: Disable the firmware loader user helper option in arm64 kernels. 
We won't have a user helper, so don't block for 60 seconds for it to show
up.  Speeds up debug of new kernel builds.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5247>
 2020-05-29 16:46:44 +00:00
Samuel Pitoiset 9d645a19eb radv/aco: enable VK_KHR_subgroup_extended_types on GFX8+ 
Should be working now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5148>
 2020-05-29 11:20:58 +00:00
Samuel Pitoiset e22567089c aco: sign-extend input/indentity for 32-bit reduce ops on GFX10 
Because some 16-bit instructions are already VOP3 on GFX10, we use
the 32-bit variants to remove the temporary VGPR and to use DDP with
the arithmetic instructions.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5148>
 2020-05-29 11:20:58 +00:00
Samuel Pitoiset 83dcd1690b aco: allow gfx10_wave64_bpermute with 8-bit/16-bit input 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5148>
 2020-05-29 11:20:58 +00:00
Samuel Pitoiset 8ece71507d aco: allocate a temp VGPR for some 8-bit/16-bit reduction ops on GFX10 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5148>
 2020-05-29 11:20:58 +00:00