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Author SHA1 Message Date
Eric Engestrom e1b1114bc2 v3d/ci: add nightly job for rusticl testing 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29851>
 2024-06-27 17:49:02 +00:00
Eric Engestrom 959d38099f llvmpipe,rusticl/ci: move rusticl files rule out of llvmpipe 
With the next commit, llvmpipe will no longer be the only driver to test rusticl.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29851>
 2024-06-27 17:49:02 +00:00
Eric Engestrom 70dfe9c6d1 ci: include rusticl in the arm64 build 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29851>
 2024-06-27 17:49:02 +00:00
Eric Engestrom b2a025f9a2 llvmpipe/ci: set rusticl variables in deqp-runner instead of passing them down from the job 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29851>
 2024-06-27 17:49:02 +00:00
Eric Engestrom 5b3782a5ab llvmpipe/ci: fix indentation of list nested in a dict item 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29851>
 2024-06-27 17:49:01 +00:00
Eric Engestrom 3d09f93287 llvmpipe/ci: add comment for later on weird-looking code 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29851>
 2024-06-27 17:49:01 +00:00
Mike Blumenkrantz 332252966b ci: kill filament trace globally 
this one is flaky and pointless

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29937>
 2024-06-27 14:36:13 +00:00
Vinson Lee 7c72580d23 panvk: Remove duplicate variable src_idx 
Fix defect reported by Coverity Scan.

Evaluation order violation (EVALUATION_ORDER)
write_write_typo: In src_idx = src_idx = binding_layout->desc_idx + i * desc_stride + subdesc_idx,
src_idx is written twice with the same value.

Fixes: 7bea6f8612 ("panvk: Overhaul the Bifrost descriptor set implementation")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29865>
 2024-06-27 12:49:30 +00:00
Alexandre Marquet f5b44838a1 panfrost: implement SFBD raw format support on v4 
For v4 GPUs, raw formats support is currently advertised as "not finished for SFBD".
This patch implements it.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10571
Signed-off-by: Alexandre Marquet <tb@a-marquet.fr>
Acked-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29062>
 2024-06-27 12:21:03 +00:00
Collabora's Gfx CI Team 965627bc48 Uprev Piglit to 647d0725024f72bc49bbc91c686c5f61168a1fe8 
https://gitlab.freedesktop.org/mesa/piglit/-/compare/fdf3fc09deb6beecdf212e65a16c645112540b59...647d0725024f72bc49bbc91c686c5f61168a1fe8

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29886>
 2024-06-27 11:26:26 +00:00
Boris Brezillon 0e74b6eda9 panvk: Add support for layered rendering 
This is needed if we want to use vk_meta_blit.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29450>
 2024-06-27 10:57:39 +00:00
Boris Brezillon 743b41a284 panvk: Use IDVS jobs when we can 
This optimizes things by splitting the position and vertex
processing in two, allowing primitives to be discarded before
the varying shader is executed.

This optimization is even more important if we throw
layered rendering into the mix, because layered rendering on
Bifrost is implemented with N IDVS/fragment jobs (N being the
number of layers), with primitives not targetting a given
layer being artificially culled in the vertex shader by
issuing a position outside the render area.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29450>
 2024-06-27 10:57:39 +00:00
Boris Brezillon 8293376f7c pan/blitter: Let pan_preload_fb() callers queue the jobs to the job chain 
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29450>
 2024-06-27 10:57:38 +00:00
Boris Brezillon 629b9258df pan/desc: Prepare things for fragment job chaining 
Right now we assume the fragment job chain contains only one job, but
with multilayer/multiview rendering, we want to submit fragment jobs
for all layers at once.

Turn pan_emit_fragment_job() into pan_emit_fragment_job_payload() and
delegate the job header packing to the caller.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29450>
 2024-06-27 10:57:38 +00:00
Boris Brezillon c694556657 pan/desc: Extend pan_emit_fbd() to support multilayer rendering 
Right now, we always emit a framebuffer descriptor for the first layer
in the RT views. Extend the logic so we can emit one FBD per layer we're
supposed to render to without having to manually modify the RT views.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29450>
 2024-06-27 10:57:38 +00:00
Samuel Pitoiset 037eaa962b radv: add support for executing the DGC ACE IB 
It's disabled for now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814>
 2024-06-27 10:22:50 +00:00
Samuel Pitoiset 1e0c6fab21 radv: add support for preparing the ACE IB in DGC 
This is still missing push constants.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814>
 2024-06-27 10:22:50 +00:00
Samuel Pitoiset 723acbe1e2 radv: add a helper to pad DGC IB 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814>
 2024-06-27 10:22:50 +00:00
Samuel Pitoiset 0a5c6415d1 radv: refactor some DGC helpers in preparation for the ACE IB 
These will be re-used for generating the ACE IB.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814>
 2024-06-27 10:22:49 +00:00
Samuel Pitoiset 12cc97a157 radv: prepare for DISPATCH_TASKMESH_DIRECT_ACE emission in the DGC shader 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814>
 2024-06-27 10:22:49 +00:00
Samuel Pitoiset 8a81a6066d radv: prepare for DISPATCH_TASKMESH_GFX emission in the DGC shader 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814>
 2024-06-27 10:22:49 +00:00
Samuel Pitoiset bdbe3e5886 radv: add support for computing the DGC ACE IB size 
For task shaders, RADV will need to prepare two command buffers in the
DGC prepare shader. The preprocess buffer will be splitted in two
parts, one for GFX and one for ACE.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814>
 2024-06-27 10:22:49 +00:00
Samuel Pitoiset 99cd8b6a54 radv: add a helper to execute a DGC IB 
It will be used to execute DGC IB for task shaders too.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29814>
 2024-06-27 10:22:49 +00:00
Konstantin Seurer e6772654ac venus: Disable sparse binding on lavapipe 
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29408>
 2024-06-27 09:29:34 +00:00
Konstantin Seurer 6f28bf41f2 venus: Refactor hiding sparse features and properties 
Disabling them after querying allows for driver workarounds.

Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29408>
 2024-06-27 09:29:34 +00:00
Konstantin Seurer 6168317b84 lavapipe: Implement shaderResourceResidency 
Adds a bit set to llvmpipe_resurce where each bit stores the residency
of a 64KB tile. The sampling code is adjusted to make use of said table
and return a residency code for sparse texture operations.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29408>
 2024-06-27 09:29:34 +00:00
Konstantin Seurer d747c4a874 lavapipe: Implement sparse buffers and images 
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29408>
 2024-06-27 09:29:34 +00:00
Konstantin Seurer a062544d3d llvmpipe: Use an anonymous file for memory allocations 
Preparation for sparse.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29408>
 2024-06-27 09:29:34 +00:00
Konstantin Seurer fcc0fd2fc1 gallium: Add a memory range parameter to resource_bind_backing 
Needed to bind regions of the resource.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29408>
 2024-06-27 09:29:34 +00:00
Konstantin Seurer 56028a888e lavapipe: Do not allocate 0 sized buffers for descriptor sets 
This will crash the new llvmpipe allocation mechanism.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29408>
 2024-06-27 09:29:34 +00:00
Dave Airlie 3d159c02f6 llvmpipe: Introduce llvmpipe_memory_allocation 
Will be useful for adding sparse info to pipe_memory_allocation.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29408>
 2024-06-27 09:29:34 +00:00
Konstantin Seurer eb64ce4386 util: Add a helper for querying sparse tile sizes 
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29408>
 2024-06-27 09:29:33 +00:00
Tapani Pälli a603cc0633 anv: move some pc was to batch_emit_pipe_control_write 
These were only applied in emit_apply_pipe_flushes but in theory could
be required for some other individually shot pipe controls.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29897>
 2024-06-27 09:02:03 +00:00
Georg Lehmann 3bfba9c565 iris/ci: update trace checksums 
There is a small difference, but it looks like a minor precision change to me.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467>
 2024-06-27 08:12:30 +00:00
Georg Lehmann 7fc8ad2ddd aco/ir: remove unused vopc helpers 
And rename get_swapped and get_inverse to show that they should only be used for VOPC.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467>
 2024-06-27 08:12:30 +00:00
Georg Lehmann 2225a32bb0 aco: remove ordered/unordered optimizations 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467>
 2024-06-27 08:12:30 +00:00
Georg Lehmann 3e86d2452f nir/opt_algebraic: add various unordered/ordered patterns from aco 
Foz-DB Navi21:
Totals from 6747 (8.50% of 79395) affected shaders:
MaxWaves: 134646 -> 134642 (-0.00%)
Instrs: 7830299 -> 7828851 (-0.02%); split: -0.03%, +0.01%
CodeSize: 43045532 -> 43010260 (-0.08%); split: -0.09%, +0.00%
VGPRs: 378960 -> 378968 (+0.00%)
SpillSGPRs: 1209 -> 1208 (-0.08%)
Latency: 74667977 -> 74670405 (+0.00%); split: -0.02%, +0.02%
InvThroughput: 20124981 -> 20124768 (-0.00%); split: -0.02%, +0.02%
VClause: 162870 -> 162868 (-0.00%); split: -0.00%, +0.00%
SClause: 277280 -> 277315 (+0.01%); split: -0.00%, +0.02%
Copies: 528627 -> 528667 (+0.01%); split: -0.00%, +0.01%
PreSGPRs: 319526 -> 319508 (-0.01%)
PreVGPRs: 334264 -> 334265 (+0.00%); split: -0.00%, +0.00%
VALU: 5485412 -> 5485408 (-0.00%); split: -0.02%, +0.02%
SALU: 743882 -> 742301 (-0.21%); split: -0.21%, +0.00%

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467>
 2024-06-27 08:12:30 +00:00
Georg Lehmann 434dfb51ca nir/opt_algebraic: optimize cmp(fneg(a), #b) and feq with fabs 
Foz-DB Navi21:
Totals from 2483 (3.13% of 79395) affected shaders:
Instrs: 4067533 -> 4067756 (+0.01%); split: -0.00%, +0.01%
CodeSize: 22525156 -> 22499904 (-0.11%); split: -0.12%, +0.01%
Latency: 51967223 -> 51963654 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 16685020 -> 16683045 (-0.01%); split: -0.01%, +0.00%
SClause: 131890 -> 131907 (+0.01%)
Copies: 402557 -> 402510 (-0.01%); split: -0.01%, +0.00%
Branches: 146962 -> 146958 (-0.00%)
PreSGPRs: 118404 -> 118401 (-0.00%)
PreVGPRs: 123791 -> 123787 (-0.00%)
VALU: 2709846 -> 2710174 (+0.01%); split: -0.00%, +0.01%
SALU: 565883 -> 565786 (-0.02%)

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467>
 2024-06-27 08:12:30 +00:00
Georg Lehmann 98cc57bccb nir/optimize cmp(a, -0.0) 
+0.0 can use an inline constant for AMD hardware,
-0.0 needs a literal.

Foz-DB Navi21:
Totals from 1014 (1.28% of 79395) affected shaders:
Instrs: 3037490 -> 3036849 (-0.02%); split: -0.02%, +0.00%
CodeSize: 17060228 -> 17051276 (-0.05%); split: -0.05%, +0.00%
Latency: 45916788 -> 45916600 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 12982201 -> 12982187 (-0.00%); split: -0.00%, +0.00%
VClause: 79475 -> 79478 (+0.00%)
SClause: 119935 -> 119934 (-0.00%); split: -0.00%, +0.00%
Copies: 301641 -> 300964 (-0.22%); split: -0.23%, +0.00%
PreSGPRs: 59155 -> 59144 (-0.02%)
VALU: 2032016 -> 2032034 (+0.00%)
SALU: 386424 -> 385729 (-0.18%)

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467>
 2024-06-27 08:12:30 +00:00
Georg Lehmann 8e6bf596cb nir/opt_algebraic: look through fabs/fneg when matching fmulz/ffmaz 
Prevents regressions when removing input modifiers from a == 0.0.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467>
 2024-06-27 08:12:30 +00:00
Georg Lehmann 080e03d021 ac/nir: enable ford, funord, fneo, fequ, fltu, fgeu 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467>
 2024-06-27 08:12:30 +00:00
Georg Lehmann 3dfc8b3bcf ac/llvm: implement ford, funord, fneo, fequ, fltu, fgeu 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467>
 2024-06-27 08:12:30 +00:00
Georg Lehmann c5ba17cd25 aco: implement ford, funord, fneo, fequ, fltu, fgeu 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467>
 2024-06-27 08:12:30 +00:00
Georg Lehmann 99372c1ed7 nir: add ford, funord, fneo, fequ, fltu, fgeu 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29467>
 2024-06-27 08:12:29 +00:00
Francisco Jerez 01118a3fbb anv/xe2+: Align push constant ranges to GRF boundaries. 
This fixes corruption of push constants on Xe2 due to a mismatch in
the uniform layout implemented by the compiler and assumed by the
driver.  To fix it we need to align the push constant ranges computed
by the Vulkan driver to a multiple of the GRF size of the platform.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29926>
 2024-06-27 07:39:17 +00:00
Francisco Jerez 039f4fe25e intel/dev: Add GRF size information to the intel_device_info struct. 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29926>
 2024-06-27 07:39:17 +00:00
Yiwei Zhang fea9de3c83 vulkan: properly ignore unsupported feature structs 
This is inspired from below MR but done in the fixed way:
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26767

The requirements used to look up struct extensions are missing the alias
check for those promoted ones. This change fixes it so that the
condition now is correct.

We can land this now as all drivers have migrated to use the common
properties, which has now also been mandated.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29846>
 2024-06-27 07:04:39 +00:00
Iago Toral Quiroga 4e6b675974 broadcom/compiler: drop multop if we dce umul24 
We always emit multop+umul24 to implement integer multiply and
this is the only scenario in which we use multop, so if we decide
to DCE umul24 we should also DCE the previous multop.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29909>
 2024-06-27 06:43:09 +00:00
Iago Toral Quiroga 0a7a36372f broadcom/compiler: validate rtop + thrsw hazard 
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29909>
 2024-06-27 06:43:09 +00:00
Iago Toral Quiroga d1f8351f3c broadcom/compiler: fix per-quad spilling 
This is not safe when we have conditional spills since we could be
spilling disabled lanes with undefined values that could overwrite
valid data for those lanes from a previous spill of the same temp
that was unconditional (or that condionally enabled those same
lanes).

Fixes some Piglit OpenCL tests as well as the following OpenCL tests:
integer_divideAssign
integer_moduloAssign
integer_mad_sat
integer_ops integer_divideAssign
integer_ops integer_mad_sat
integer_ops integer_moduloAssign
integer_ops quick_char_math
integer_ops quick_short_math
math_brute_force half_powr
math_brute_force pow
math_brute_force pown
math_brute_force powr
math_brute_force rootn

Fixes: 597560e27c ('broadcom/compiler: always enable per-quad on spill operations')
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29909>
 2024-06-27 06:43:09 +00:00