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Author SHA1 Message Date
Alyssa Rosenzweig dfaa4c51fb pan/mdg: Deduplicate nir_find_variable_with_driver_location 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7446>
 2020-11-04 11:21:28 -05:00
Alyssa Rosenzweig a05921b9f2 nir: Add SRC_TYPE to store_combined_output_pan 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7446>
 2020-11-04 11:21:08 -05:00
Iago Toral Quiroga fa869fb9b4 v3dv: add a v3dv_bo_init helper 
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7440>
 2020-11-04 13:56:51 +01:00
Tony Wasserka 456beb40b8 aco/ra: Fix counting of subdword variables in get_reg_create_vector 
The loop variable "k" shadowed another variable in the outer scope, so
this loop had no actual effect.

Fixes: 52cc1f8237 ("aco: improve p_create_vector RA for sub-dword operands")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7427>
 2020-11-04 12:08:49 +00:00
Rhys Perry 786828131a aco: implement 8/16-bit instructions which can be trivially widened 
When nir_lower_bit_size becomes more capable, we might want to revert some
of this.

fossil-db (parallel-rdp, Navi):
Totals from 217 (31.77% of 683) affected shaders:
SGPRs: 11320 -> 10200 (-9.89%)
VGPRs: 7156 -> 7364 (+2.91%)
CodeSize: 1453948 -> 1430136 (-1.64%); split: -1.66%, +0.02%
Instrs: 258530 -> 254840 (-1.43%); split: -1.44%, +0.01%
Cycles: 37334360 -> 37247936 (-0.23%); split: -0.26%, +0.03%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4791>
 2020-11-04 11:50:37 +00:00
Rhys Perry ef95ba8cdd aco: implement some 16-bit arithmetic instead of lowering 
fossil-db (parallel-rdp, Navi):
Totals from 210 (30.75% of 683) affected shaders:
SGPRs: 9704 -> 10248 (+5.61%)
VGPRs: 5884 -> 5368 (-8.77%)
CodeSize: 1155564 -> 1098752 (-4.92%)
Instrs: 199927 -> 189940 (-5.00%)
Cycles: 20438392 -> 19860124 (-2.83%)

v2: use divergence analysis to determine which instructions to lower.

Co-Authored-by: Daniel Schürmann <daniel@schuermann.dev>
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4791>
 2020-11-04 11:50:37 +00:00
Rhys Perry 8ed7cad75f radv: rework nir_lower_bit_size callback and run DA on GFX8+ 
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4791>
 2020-11-04 11:50:37 +00:00
Rhys Perry b2ce7da149 radv: do nir_lower_bit_size after algebraic optimizations 
There are too many algebraic optimizations to be certain that one of them
couldn't create instructions which need lowering. It also creates better
code for some reason.

fossil-db (parallel-rdp, Navi):
Totals from 217 (31.77% of 683) affected shaders:
VGPRs: 7716 -> 7672 (-0.57%)
CodeSize: 1516152 -> 1510688 (-0.36%); split: -0.38%, +0.02%
MaxWaves: 3964 -> 3982 (+0.45%)
Instrs: 269445 -> 268508 (-0.35%); split: -0.36%, +0.02%
Cycles: 37963416 -> 37912592 (-0.13%); split: -0.15%, +0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4791>
 2020-11-04 11:50:37 +00:00
Rhys Perry c77114967f radv: move a few passes to after load/store vectorization 
load/store vectorization can create 8/16-bit alu to do packing/unpacking,
which would make shader_info::bit_sizes_used out of date.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4791>
 2020-11-04 11:50:37 +00:00
Rhys Perry 475077c790 nir/lower_bit_size: optimize upcast of b2i8/b2i16 
This also seems to be done by nir_opt_algebraic, but RADV will be moving
nir_lower_bit_size() to after that (so it doesn't create unsupported
8/16-bit instructions) and it doesn't seem worth creating a new pass just
for this simple optimization.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4791>
 2020-11-04 11:50:37 +00:00
Rhys Perry 4e5c85526b nir: add shader_info::bit_sizes_used 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4791>
 2020-11-04 11:50:37 +00:00
Pierre-Eric Pelloux-Prayer 7d3df69914 va: support VA_RT_FORMAT_PROTECTED 
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7006>
 2020-11-04 09:22:23 +01:00
Pierre-Eric Pelloux-Prayer 81be8b3c2f va/picture: make sure destination buffer is protected if needed 
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7006>
 2020-11-04 09:22:22 +01:00
Veerabadhran Gopalakrishnan 70191f38e3 frontends/va: Added protected playback support for VP9 
Add VP9 header handling in slice data buffer.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7006>
 2020-11-04 09:22:20 +01:00
Boyuan Zhang f20a20b1e3 radeon/vcn: program drm message buffer 
Add a function to handle drm message buffer using input decryption parameters.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7006>
 2020-11-04 09:22:19 +01:00
Pierre-Eric Pelloux-Prayer ebbf40fa26 radeon/vcn: delay dec->ctx and dec->dpb allocation 
This will allow to allocate them as encrypted if needed.

Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7006>
 2020-11-04 09:22:18 +01:00
Pierre-Eric Pelloux-Prayer cf324df6ea radeon: add si_vid_create_tmz_buffer helper 
Same code as si_vid_create_buffer except that the buffer is using TMZ.

Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7006>
 2020-11-04 09:22:06 +01:00
Boyuan Zhang 024be710a7 radeon/vcn: add defines for drm message buffer 
Add defines and structure for drm message buffer.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7006>
 2020-11-04 09:21:40 +01:00
Boyuan Zhang b9753fdc58 radeon: add decryption params definition header 
Add a header file for decryption parameters.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7006>
 2020-11-04 09:21:39 +01:00
Boyuan Zhang deb7dc82f6 frontends/va: handle protected slice data buffer 
Add a function to handle VaProtectedSliceDataBuffer, which is used for
sending decryption parameters. Also, for protected playback, there is
no need to check start code since data is encrypted.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7006>
 2020-11-04 09:21:36 +01:00
Boyuan Zhang 5f0816eac0 vl: add flag and definition for protected playback 
Add a flag to indicate if playback is protected/encrypted.
Add a pointer to decryption key for later decryption use.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7006>
 2020-11-04 09:21:13 +01:00
Jason Ekstrand 58e7088628 nir/find_array_copies: Don't assume all children exist 
Fixes: 9f3c595dfc "nir/find_array_copies: Handle cast derefs"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7437>
 2020-11-04 05:57:07 +00:00
Vinson Lee e1736c7fdb radesonsi: Remove unnecessary shader->selector NULL check. 
shader->selector->info.stage == MESA_SHADER_COMPUTE at this case statement.

Fix defect reported by Coverity Scan.

Dereference before null check (REVERSE_INULL)
check_after_deref: Null-checking shader->selector suggests that it may
be null, but it has already been dereferenced on all paths leading to
the check.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7266>
 2020-11-03 20:58:46 -08:00
Dave Airlie 5fb77a582a lavapipe: request correct sample mask behaviour 
Fixes:
dEQP-VK.rasterization.frag_side_effect*

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7435>
 2020-11-04 01:53:29 +00:00
Dave Airlie 47701d47e7 llvmpipe: respect the sample mask in non-multisample flag 
This partly revert
50987644 llvmpipe: don't use sample mask with 0 samples

since Vulkan wants this behaviour.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7435>
 2020-11-04 01:53:29 +00:00
Dave Airlie 3dc6da1ac1 gallium: add a non-multisample sample mask out behaviour flag. 
Vulkan/DX want to use output sample mask even when not multisampling
GL wants it ignored.

Add a rasterizer flag to lavapipe can get correct behaviour.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7435>
 2020-11-04 01:53:29 +00:00
Jason Ekstrand 4ff4d4e569 nir/opt_intrinsic: Optimize bcsel(b, shuffle(x, i), shuffle(x, j)) 
The shuffles provided by the SPV_INTEL_subgroups extension generate

    bcsel(b, shuffle(x, i), shuffle(y, j))

In the case where x and y are the same, we can turn this into a shuffle
with the bcsel on the index which lets us drop a whole shuffle.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7366>
 2020-11-03 16:51:26 -06:00
Jason Ekstrand 2f5b56ae23 nir/opt_intrinsics: Refactor a bit 
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7366>
 2020-11-03 16:51:26 -06:00
Jason Ekstrand 3b281861c1 nir/constant_folding: Fold subgroup shuffle intrinsics 
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7366>
 2020-11-03 16:51:26 -06:00
Jason Ekstrand e59d6350d1 nir: Move constant folding of vote to opt_constant_folding 
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7366>
 2020-11-03 16:51:26 -06:00
Jason Ekstrand 9492ab2864 nir/constant_folding: Use the standard variable naming convention 
Typically, if we have one alu instruction, we call it "alu" and if we
have one intrinsic we call it "intrin".

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7366>
 2020-11-03 16:51:26 -06:00
Jason Ekstrand 9d2ccbfc15 nir/constant_folding: Use a switch in try_fold_intrinsic 
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7366>
 2020-11-03 16:51:26 -06:00
Jason Ekstrand d9c0f3627d nir/opt_intrinsics: Report progress for the gl_SampleMask optimization 
Fixes: d3ce8a7f6b "nir: optimize gl_SampleMaskIn to gl_HelperInvocation..."
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7366>
 2020-11-03 16:51:26 -06:00
Rhys Perry b90063201a nir: use nir_alu_src_is_trivial_ssa() in nir_ssa_for_alu_src() 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7426>
 2020-11-03 22:35:57 +00:00
Rhys Perry 233a820f2c nir: skip bcsel with non-trivial swizzle in opt_simplify_bcsel_of_phi() 
Fixes validation error in a Dota 2 shader.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Fixes: b031c64349 ("nir: Convert a bcsel with only phi node sources to a phi node")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7426>
 2020-11-03 22:35:57 +00:00
Rhys Perry 1df2fc9f9c nir: add nir_alu_src_is_trivial_ssa() 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7426>
 2020-11-03 22:35:57 +00:00
Jason Ekstrand b9f9528011 nir/lower_io: Add a new 62bit_generic address format 
Unlike most address formats, this address format is capable of handling
all of the fancy generic pointers stuff like is_global and friends.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00
Jason Ekstrand b84f74f9b7 nir/lower_io: Support generic pointer access 
If the pointer is generic and we haven't yet figured out what kind of
pointer it is yet, we emit an if-ladder based on a mode check.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00
Jason Ekstrand a451f037ff nir/lower_io: Add support for lowering deref_mode_is 
The guts are still missing so it will blow up if it sees any
deref_mode_is intrinsic that it can't constant-fold from the mode.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00
Jason Ekstrand 57943112d9 nir/lower_io: Add support for 32/64bit_global for shared 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00
Jason Ekstrand c50332fbc2 nir/lower_io: Add a mode parameter to addr_format_is_* 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00
Jason Ekstrand 7007d06898 nir/lower_io: Add a mode parameter to build_addr_iadd 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00
Jason Ekstrand ff838abc46 nir/opt_deref: Add an optimization for deref_mode_is 
If opt_restrict_deref_modes makes progress, we may be able to figure out
the mode well enough to turn a deref_mode_is intrinsic into a constant.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00
Jason Ekstrand df51518dc5 nir/opt_deref: Add a deref mode specialization optimization 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00
Jason Ekstrand a8e53a772f spirv: Add generic pointer support 
Most of this is fairly straightforward; we just set all the modes on any
derefs which are generic.  The one tricky bit is OpGenericCastToPtrExplicit.
Instead of adding NIR intrinsics to do the cast, we add NIR intrinsics
to do a storage class check and then bcsel based on that.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00
Jason Ekstrand d6415b5d2b nir: Add support for generic pointers 
The way they're handled is that deref->modes is treated as a bitfield of
possible modes.  Variables are required to have a specific mode and
derefs with deref_type_var are as well.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00
Jason Ekstrand 9d377c01d0 nir: Make nir_deref_instr::mode a bitfield 
We rename it to "modes" to make it clear that it may contain more than
one mode and adjust all the uses of nir_deref_instr::modes to attempt to
handle multiple modes.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00
Jason Ekstrand 7d5f3b5c0e nir/split_*_vars: Prepare for generic pointers 
All three passes check the variables for complex uses and don't split
them if they have any complex uses.  Most of these checks are just early
returns to avoid chasing the deref to the variable and a hash table
lookup if we can quickly determine it has the wrong mode.  In a couple
of cases, we need to re-arrange or add other checks to ensure that it's
safe for generic pointers.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00
Jason Ekstrand d50a4dbc13 nir/find_array_copies: Prepare for generic pointers 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00
Jason Ekstrand ced9b6f0d8 nir: Use nir_deref_mode_may_be in deref optimizations 
All the checks being replaced are fore potential aliasing so we want to
flush stores whenever the mode might be something that aliases.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
 2020-11-03 22:18:28 +00:00