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Author SHA1 Message Date
Tony Wasserka
3b81f53e34 aco/ra: Split print_regs by lines of 64 registers 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10517>
 2021-06-08 17:03:08 +02:00
Tony Wasserka
69584478c9 aco/ra: Clean up print_regs output and support byte-allocated variables 
Example output:
       00 03 06 09 12 15 18 21 24 27 30 33 36 39 42
sgprs: ·▉█▉███▉▉█··████···········▉████············

       00 03 06 09 12 15 18 21 24 27 30 33 36 39 42
vgprs: ▉▉··▉▉▉▉▘▀▉▉▉···▉▘▘▉▉▉▉···▉▉▉▀▀▉············

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10517>
 2021-06-08 17:03:08 +02:00
Tony Wasserka
5bfef2de66 aco/ra: Fix off-by-one-error in print_regs 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 3675aefa84 ("aco/ra: Fix build with print_regs enabled")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10517>
 2021-06-08 17:03:08 +02:00
Boyuan Zhang
a4472e90eb frontends/omx: use pipe buffer map instead of texture map 
Fixes: eb74f9776 ("gallium: split transfer_(un)map into buffer_(un)map and texture_(un)map")

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11233>
 2021-06-08 14:18:11 +00:00
Leo Liu
b8574cdaa8 frontends/va: use the entrypoint from context instead of the hard-coded one 
It could fail the case where this is only encode available.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11201>
 2021-06-08 09:32:48 -04:00
Leo Liu
4c0420d44e frontends/va: include the profile queries for encoder as well 
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11201>
 2021-06-08 09:32:48 -04:00
Leo Liu
b4d185b44b frontends/va: use the correct entrypoint to get config attributes 
PIPE_VIDEO_ENTRYPOINT_ENCODE should be used in this case.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11201>
 2021-06-08 09:32:48 -04:00
Leo Liu
43c04ab2b4 radeonsi: separate video hw info based on HW engine individually 
This removes previous "has_hw_decode" and "uvd_enc_supported" and
makes information more accuate for cases where HW decode, HW encode,
and HW JPEG decode might partially available.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11201>
 2021-06-08 09:32:48 -04:00
Leo Liu
8ddba3b5ea radeonsi: add PIPE_FORMAT_P010 for HEVC Main10 profile to encode param 
The format can be queried through the encode entrypoint

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11201>
 2021-06-08 09:32:48 -04:00
Bas Nieuwenhuizen
6b7ff241f4 nir/lower_returns: Deal with single-arg phis after if. 
if we have

   if ... {
      return;
   } else {
      // block X
   }
   // block Y
   phi(X: ...)

then nir_lower_returns tries to move block Y into the else body,
except nir_cf_extract doesn't move the phi. As the return is removed
in the then-body the phi suddenly has the wrong number of arguments
(and the phi doesn't dominate its uses anymore).

In this case we know that the phi has to be single arg, so we can just
rewrite the users of the phis and drop them.

Hit this in my RT adventures, not sure if this is actually reachable
right now, as single arg phis tend to be kind of exceptional outside
of CSSA and we typically call nir_lower_returns pretty early.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11207>
 2021-06-08 11:29:53 +00:00
Hubert Jasudowicz
9d772a545a docs/egl: Add missing backticks 
Signed-off-by: Hubert Jasudowicz <hubert.jasudowicz@gmail.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11240>
 2021-06-08 10:54:20 +00:00
Juan A. Suarez Romero
abd3421525 broadcom/ci: Report flakes on IRC 
Report flakes in #videocore-ci channel.

v2 (Emma):
 - Add glx@glx_arb_sync_control@timing.* as flakes.

Reviewed-by: Emma Anholt <emma@anholt.net>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11220>
 2021-06-08 09:52:32 +00:00
Juan A. Suarez Romero
1eca809680 ci/v3dv: test v3dv in arm64 environment 
As most of the development is done in arm64, execute the v3dv related
tests in this environment.

Reviewed-by: Emma Anholt <emma@anholt.net>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11220>
 2021-06-08 09:52:32 +00:00
Juan A. Suarez Romero
ef9789f067 ci/broadcom: unset manual jobs 
Make some of the jobs for vc4 and v3d to run automatically, in order to
identify more regressions.

Reviewed-by: Emma Anholt <emma@anholt.net>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11220>
 2021-06-08 09:52:32 +00:00
Samuel Pitoiset
9f7e63e12a ac/debug: fix color printing PKT3 when count in header is too low 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11211>
 2021-06-08 11:19:00 +02:00
Rhys Perry
c768d7d8f2 aco/tests: add SDWA tests 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
 2021-06-08 08:57:43 +00:00
Rhys Perry
24418304b0 aco/tests: add tests for p_extract/p_insert lowering 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
 2021-06-08 08:57:43 +00:00
Rhys Perry
8e0c6e196e aco: disallow literals with some instruction formats 
Because isVOPn() is true for many VOP3, SDWA and DPP instructions, this
would often not complain.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
 2021-06-08 08:57:43 +00:00
Rhys Perry
cf22eabc68 aco: make validate_ir() output usable in tests 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
 2021-06-08 08:57:43 +00:00
Rhys Perry
54292e99c7 aco: optimize 32-bit extracts and inserts using SDWA 
Still need to use dst_u=preserve field to optimize packs

fossil-db (Sienna Cichlid):
Totals from 15974 (10.66% of 149839) affected shaders:
VGPRs: 1009064 -> 1008968 (-0.01%); split: -0.03%, +0.02%
SpillSGPRs: 7959 -> 7964 (+0.06%)
CodeSize: 101716436 -> 101159568 (-0.55%); split: -0.55%, +0.01%
MaxWaves: 284464 -> 284490 (+0.01%); split: +0.02%, -0.01%
Instrs: 19334216 -> 19224241 (-0.57%); split: -0.57%, +0.00%
Latency: 375465295 -> 375230478 (-0.06%); split: -0.14%, +0.08%
InvThroughput: 79006105 -> 78860705 (-0.18%); split: -0.25%, +0.07%

fossil-db (Polaris):
Totals from 11369 (7.51% of 151365) affected shaders:
SGPRs: 787920 -> 787680 (-0.03%); split: -0.04%, +0.01%
VGPRs: 681056 -> 681040 (-0.00%); split: -0.01%, +0.00%
CodeSize: 68127288 -> 67664120 (-0.68%); split: -0.69%, +0.01%
MaxWaves: 54370 -> 54371 (+0.00%)
Instrs: 13294638 -> 13214109 (-0.61%); split: -0.62%, +0.01%
Latency: 373515759 -> 373214571 (-0.08%); split: -0.11%, +0.03%
InvThroughput: 166529524 -> 166275291 (-0.15%); split: -0.20%, +0.05%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
 2021-06-08 08:57:43 +00:00
Rhys Perry
63659fc15c radv: use byte/word extract/insert instructions 
ACO doesn't yet combine extract/insert into instructions, but it seems to
already generate less instructions because NIR optimizes shift+and to
these instructions. Code size is worse in some cases though because we
have to always use a literal when masking.

fossil-db (Sienna Cichlid):
Totals from 14361 (9.58% of 149839) affected shaders:
VGPRs: 850152 -> 850304 (+0.02%); split: -0.02%, +0.04%
SpillSGPRs: 7979 -> 7989 (+0.13%); split: -0.03%, +0.15%
CodeSize: 88031216 -> 88162520 (+0.15%); split: -0.01%, +0.16%
MaxWaves: 269414 -> 269426 (+0.00%)
Instrs: 16695182 -> 16662852 (-0.19%); split: -0.21%, +0.01%
Latency: 375592693 -> 375544364 (-0.01%); split: -0.04%, +0.03%
InvThroughput: 75627700 -> 75607720 (-0.03%); split: -0.07%, +0.04%

fossil-db (Polaris):
Totals from 13816 (9.13% of 151365) affected shaders:
SGPRs: 984896 -> 982512 (-0.24%); split: -0.29%, +0.05%
VGPRs: 809220 -> 809112 (-0.01%); split: -0.02%, +0.01%
SpillSGPRs: 9181 -> 9185 (+0.04%); split: -0.04%, +0.09%
CodeSize: 82017952 -> 82123484 (+0.13%); split: -0.01%, +0.14%
MaxWaves: 65721 -> 65723 (+0.00%)
Instrs: 16008744 -> 15988007 (-0.13%); split: -0.18%, +0.05%
Latency: 439911623 -> 439869622 (-0.01%); split: -0.04%, +0.03%
InvThroughput: 185898770 -> 185841742 (-0.03%); split: -0.08%, +0.05%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
 2021-06-08 08:57:43 +00:00
Rhys Perry
7d76b07d6b ac/llvm: implement byte/word extract/insert instructions 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
 2021-06-08 08:57:43 +00:00
Rhys Perry
daa329f664 aco: use byte/word extract pseudo-instructions 
fossil-db (Sienna Cichild):
Totals from 1890 (1.26% of 149839) affected shaders:
CodeSize: 5104196 -> 5104300 (+0.00%); split: -0.00%, +0.01%
Latency: 11572943 -> 11572880 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 4876941 -> 4876982 (+0.00%); split: -0.00%, +0.00%
SClause: 26774 -> 26775 (+0.00%)
Copies: 125778 -> 125813 (+0.03%)
PreSGPRs: 56452 -> 56451 (-0.00%)

fossil-db (Polaris):
Totals from 1884 (1.24% of 151365) affected shaders:
CodeSize: 3849340 -> 3849312 (-0.00%); split: -0.00%, +0.00%
Instrs: 741391 -> 741382 (-0.00%)
Latency: 13533815 -> 13533439 (-0.00%)
InvThroughput: 12058777 -> 12058500 (-0.00%)
Copies: 120890 -> 120891 (+0.00%)
PreSGPRs: 48940 -> 48939 (-0.00%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
 2021-06-08 08:57:43 +00:00
Rhys Perry
1f2518ef9f aco: implement nir_op_extract/nir_op_insert 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
 2021-06-08 08:57:43 +00:00
Rhys Perry
2f94353735 aco: add p_extract/p_insert 
These will let us make the SDWA optimizer much simpler than if we were to
recognize combinations of shift/and/bfe.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
 2021-06-08 08:57:42 +00:00
Rhys Perry
e9d1643288 aco: disallow SDWA for instructions with 64-bit definitions/operands 
For example, v_cvt_f64_i32. LLVM doesn't seem to allow this either and it
doesn't seem to work correctly.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
 2021-06-08 08:57:42 +00:00
Rhys Perry
1cbcfb8b38 nir, nir/algebraic: add byte/word insertion instructions 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
 2021-06-08 08:57:42 +00:00
Rhys Perry
edae3e5623 nir/algebraic: optimize extract of extract 
Found in some sottr shaders (originally iand(ishr(a, 16), 0xffff))

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3151>
 2021-06-08 08:57:42 +00:00
Samuel Pitoiset
736893060f radv: emit PA_SC_CONSERVATIVE_RASTERIZATION_CNTL only on GFX9+ 
This context register doesn't exist on older generations.

Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11210>
 2021-06-08 05:58:01 +00:00
Dave Airlie
c04f20e7e0 intel/isl: add blend enable flag to gen4/5 
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10655>
 2021-06-08 12:35:52 +10:00
Dave Airlie
c25a5a832a intel/isl: add levels and minimum array element to null fill 
gen4/5 needs these to avoid gpu hangs around matching depth/null
surfaces

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10655>
 2021-06-08 12:35:43 +10:00
Dave Airlie
cb152e79f2 intel/isl: convert null surface fill to a struct. 
Suggested by Jason, pre-convert this to a struct so it can
be expanded for gen4/5 crocus support

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10655>
 2021-06-08 12:35:40 +10:00
Dave Airlie
6989afea58 intel/isl: decrease isl_format_layouts size by 36k 
This drops
-0000000000011e90 R isl_format_layouts
+0000000000008f48 R isl_format_layouts

I think that's about 36k.

Thanks to Jason for suggesting PACKED

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11232>
 2021-06-08 11:52:25 +10:00
Yiwei Zhang
93f67055c4 venus: forward the host renderer hardware info 
Some game engines rely on the real hardware info to adjust default
graphics quality and other attributes.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11175>
 2021-06-07 23:54:52 +00:00
Caio Marcelo de Oliveira Filho
c8a7bd0dc8 nir: Rename WORK_GROUP (and similar) to WORKGROUP 
Be consistent with other usages in Vulkan and SPIR-V, and the recently
added workgroup_size field.

Acked-by: Emma Anholt <emma@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11190>
 2021-06-07 22:34:42 +00:00
Caio Marcelo de Oliveira Filho
a71a780598 nir: Rename nir_intrinsic_load_local_group_size to nir_intrinsic_load_workgroup_size 
Acked-by: Emma Anholt <emma@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11190>
 2021-06-07 22:34:42 +00:00
Caio Marcelo de Oliveira Filho
43a6a2151b compiler: Rename SYSTEM_VALUE_LOCAL_GROUP_SIZE to SYSTEM_VALUE_WORKGROUP_SIZE 
Acked-by: Emma Anholt <emma@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11190>
 2021-06-07 22:34:42 +00:00
Caio Marcelo de Oliveira Filho
430d2206da compiler: Rename local_size to workgroup_size 
Acked-by: Emma Anholt <emma@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11190>
 2021-06-07 22:34:42 +00:00
Emma Anholt
4b9e52e818 i915g: Make sure we don't try to texture from the const file. 
It's an invalid value for the texture coordinate source, and this becomes
more common if we enable nir-to-tgsi.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11227>
 2021-06-07 22:24:11 +00:00
Emma Anholt
1945c1f526 ci/i915g: Fix incorrect expectation. 
I think this was an edit failure on my part when fixing up the
expectations for merge.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11227>
 2021-06-07 22:24:11 +00:00
Timur Kristóf
18d48c01c2 radv: Assert that there is no GS copy shader when the pipeline has NGG. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11092>
 2021-06-07 22:05:42 +00:00
Timur Kristóf
7e664a5383 radv: Don't generate GS copy shader when the pipeline has NGG. 
Previously the code used radv_pipeline_has_ngg but that always
returned false because the pipeline->shaders was all NULL at the
time when the GS copy shader was created.

Fixes: ca783612e7
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11092>
 2021-06-07 22:05:42 +00:00
Timur Kristóf
93b1089d19 radv: Remove duplicate code for getting GS info. 
This was my mistake for forgetting to delete this code.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11092>
 2021-06-07 22:05:42 +00:00
Alejandro Piñeiro
50907105f9 v3d/simulator: get rid of has_gca wrapper 
We can assume that it is always present on 3.3 and below. In fact,
recent updates of the simulator will remove it, so this change would
be needed soon.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11040>
 2021-06-07 21:52:20 +00:00
Alejandro Piñeiro
646a8338b1 v3d/simulator: hw mem is now an v3d_size_t, typedef to uint32_t 
It would be really awesome to be able to write this so it would work
with old and new versions of the simulator, but I was not able to do
that.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11040>
 2021-06-07 21:52:20 +00:00
Jason Ekstrand
c9bbf75195 ttn: Stop manually managing system_values_read 
There's no point in duplicating all the ops here.  The caller should run
nir_gather_info if they want system_values_read.  Hand-rolling it all in
tgsi_to_nir is just asking for bugs.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11222>
 2021-06-07 21:04:35 +00:00
Andres Gomez
996a6564cf ci: update some radv trace checksums 
After 7d23ea20a0 ("radv: don't allocate DCC predicate if the image doesn't use DCC")
some checksums for the radv driver remained to be updated.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11223>
 2021-06-07 20:45:55 +00:00
Rob Clark
da4bd551a3 frontend/dri: Fix fence-fd logic 
We can't ask for a fence fd if we don't pass PIPE_FLUSH_FENCE_FD.  Also
don't leak fences.

Fixes: abec42c9a3 ("gallium/dri: implement EGL_KHR_mutable_render_buffer")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11202>
 2021-06-07 20:14:25 +00:00
Rob Clark
964efdfba9 egl+libsync: Add check for valid fence-fd 
Debugging fd mix-ups (ie. where, possibly via close()ing the original
fd, etc, you end up with something that is a valid fd but not a valid
*fence* fd) can be difficult.  Fortunately we can use the FILE_INFO
ioctl, which will return an error if the fd is not a fence fd.

For android, we instead use the libsync API, which does a similar thing
on modern kernels, but has a fallback path for older android kernels.

Note that the FILE_INFO ioctl has existed upstream since at least prior
to destaging of sync_file.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11202>
 2021-06-07 20:14:25 +00:00
Rob Clark
bfeff2c687 egl: zero is a valid fd 
We shouldn't be using RETURN_EGL_EVAL() for eglDupNativeFenceFDANDROID()
return, as (while perhaps unlikely) zero is a valid fd.  The error case
for EGL_NO_NATIVE_FENCE_FD_ANDROID is already handled in egl_dri2.c
(dri2_dup_native_fence_fd()) so just use RETURN_EGL_SUCCESS() instead.

Also fix ret type.

Fixes: 0201f01dc4 ("egl: add EGL_ANDROID_native_fence_sync")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11202>
 2021-06-07 20:14:25 +00:00