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Author SHA1 Message Date
Detlev Casanova deda1b767e ci/deqp-runner: uprev from 0.20.2 to 0.20.3 
Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Co-authored-by: Sergi Blanch Torne <sergi@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26113>
 2025-01-25 08:48:04 +00:00
Detlev Casanova 8f4efda257 ci/fluster: Add radeonsi-raven-vaapi-fluster jobs 
The CI job runs each supported decoder on 1 LAVA job:
- vp9
- h.264
- h.265

They each run the gstreamer VAAPI fluster decoder tests on a radeonsi
device on LAVA.

Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Co-authored-by: Sergi Blanch Torne <sergi@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26113>
 2025-01-25 08:48:04 +00:00
Detlev Casanova aa11f3d630 ci/fluster/lava: Add fluster in LAVA rootfs 
It will be used in next commits to run fluster vaapi tests on AMD
devices on LAVA.

Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Co-authored-by: Sergi Blanch Torne <sergi@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26113>
 2025-01-25 08:48:04 +00:00
Pavel Ondračka ba860bd914 r300: fix uninitialized use in transform_vertex_ROUND 
==26468== Conditional jump or move depends on uninitialised value(s)
==26468==    at 0x577A190: get_readers_normal_read_callback (radeon_dataflow.c:534)
==26468==    by 0x57795E7: rc_for_all_reads_src (radeon_dataflow.c:162)
==26468==    by 0x577A7BB: get_readers_for_single_write (radeon_dataflow.c:709)
==26468==    by 0x5779763: writes_normal (radeon_dataflow.c:212)
==26468==    by 0x5779870: rc_for_all_writes_mask (radeon_dataflow.c:243)
==26468==    by 0x577A93C: rc_get_readers (radeon_dataflow.c:819)
==26468==    by 0x577E35E: transform_vertex_ROUND (radeon_optimize.c:1332)
==26468==    by 0x577E48B: optimize_A0_loads (radeon_optimize.c:1367)
==26468==    by 0x577E53E: rc_optimize (radeon_optimize.c:1393)
==26468==    by 0x577767F: rc_run_compiler_passes (radeon_compiler.c:475)
==26468==    by 0x57777C2: rc_run_compiler (radeon_compiler.c:498)
==26468==    by 0x57747F3: r3xx_compile_vertex_program (r3xx_vertprog.c:820)

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10562
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33210>
 2025-01-25 07:58:10 +00:00
Lionel Landwerlin 6768eb31e5 intel: rework CL pre-compile 
Stolen from asahi_clc :)

We drop the nasty LLVM17+ workaround code (Thanks Alyssa!)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Dylan Baker <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33014>
 2025-01-25 03:28:07 +00:00
Lionel Landwerlin 5adac011b8 meson: rework mesa-clc=system handling 
In theory you can build a driver using OpenCL kernels with a
-Dmesa-clc=system. That shouldn't require any LLVM/Clang/etc...

But the checks to find the pre-compiled mesa_clc & vtn_bindgen
binaries are in meson files or conditions only triggered if you build
with LLVM (:

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Tested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Dylan Baker <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33014>
 2025-01-25 03:28:07 +00:00
Lionel Landwerlin db11165c07 intel/cl: switch to SPIRV as shader storage 
Effectively making intel-clc not needed.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Dylan Baker <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33014>
 2025-01-25 03:28:07 +00:00
Lionel Landwerlin b3033dc633 meson: build mesa_clc for Anv/Iris 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Tested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Dylan Baker <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33014>
 2025-01-25 03:28:07 +00:00
Lionel Landwerlin bf8a1e1e71 brw/elk: move internal kernel parsing out of intel_clc 
So it can be called internally.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Dylan Baker <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33014>
 2025-01-25 03:28:07 +00:00
Lionel Landwerlin 857236a81d spirv: build vtn_bindgen for Anv/Iris 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Tested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Dylan Baker <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33014>
 2025-01-25 03:28:07 +00:00
Lionel Landwerlin b0a882b3dc libcl_vk: add some vulkan enums/structures for DGC 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Tested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Dylan Baker <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33014>
 2025-01-25 03:28:07 +00:00
Lionel Landwerlin d3d771607d libcl: add MIN2/MAX2 macros 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Dylan Baker <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33014>
 2025-01-25 03:28:07 +00:00
José Roberto de Souza 73f3de12ef iris: Pick scanout PAT entry for scanout buffers 
Scanout PAT was never being picked what could cause render cache to
not be flushed during page flips causing visual corruption on
displays.

Cc: stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33127>
 2025-01-25 02:53:44 +00:00
José Roberto de Souza 572eacec9e iris: Make sure a uncached heap is choosen for scanout and shared buffers when LLC is not available 
Platforms without LLC were in risky to get a heap that is cached
what could cause scanout glitches.

Cc: stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33127>
 2025-01-25 02:53:44 +00:00
Samuel Pitoiset f8e7c037e3 radv: add a new helper to set image BO metadata 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33193>
 2025-01-25 02:10:03 +00:00
Samuel Pitoiset ee4a1021d1 radv: add support for BO metadata on GFX12 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33193>
 2025-01-25 02:10:02 +00:00
Martin Roukala (né Peres) 8fd0eda0cf freedreno/ci: uprev the a750 kernel to msm-next 
This kernel was built using b2c's linux builder without any additional
patches... aside from the usual ones I apply for b2c, so we are almost
to the point where we can run a stable kernel on it!

The next uprev should be made from gfx-ci/linux rather than being
hosted on my server, but I would like to use a released kernel for
that.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33162>
 2025-01-24 23:36:56 +00:00
Martin Roukala (né Peres) 41bf984d0e ci/b2c: allow using another initrd that contains firmware 
This allows DUTs that require firmware to boot reliably to provide them
without needing to include them in the kernel image.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33162>
 2025-01-24 23:36:56 +00:00
Martin Roukala (né Peres) 668cc6dc0c ci/b2c: allow jobs to select a file in the dtb url 
This makes it possible to have a single DTB url serving multiple DUTs,
without paying much of a cost for it.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33162>
 2025-01-24 23:36:56 +00:00
Saroj Kumar 433004dcff ac/surface: fix missing NULL check in gfx12_select_swizle_mode() 
Add null check for surf pointer.
Fixes segfault issue during start of gdm on gfx12.

Signed-off-by: Saroj Kumar <saroj.kumar@amd.com>

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33199>
 2025-01-24 21:51:50 +00:00
Karmjit Mahil 1f9d96ec78 vulkan: Add inital vram-report-limit layer 
This Vulkan layer allows reporting a limited VRAM size to the
application. This layer can be useful for testing applications and
games which query for the memory budget adjusting their behavior
accordingly.

They layer does not set a hard limit on the amount of VRAM thus
applications can still make allocations even though the reported
budget might indicate no memory is left, if the set limit is lower
than of actually available VRAM.

Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30095>
 2025-01-24 19:56:43 +00:00
Karmjit Mahil ad603d300d util/simple_mtx: Add ASSERTED to parameter used only in an assert 
Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30095>
 2025-01-24 19:56:42 +00:00
Rhys Perry 5cc977bee4 radv: set has_image_bvh_intersect_ray for null winsys 
This is needed for fossilize-replay.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: 14e3231b56 ("radv: add a flag to indicate ray tracing support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33201>
 2025-01-24 18:08:12 +00:00
Sergi Blanch Torne 4818bc90d9 Revert "ci: disable Collabora's farm due to unexpected power cut" 
This reverts commit e02539d7b6.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33200>
 2025-01-24 17:21:47 +00:00
Antonio Ospite 7c6a4b65c7 docs/android: bump suggested platform-sdk-version to 34 
Suggesting at least Android 14 for new development.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33188>
 2025-01-24 14:15:22 +00:00
Antonio Ospite 876c4513a5 ci/android: rename variable ANDROID_NDK to ANDROID_NDK_VERSION 
Rename the variable ANDROID_NDK to ANDROID_NDK_VERSION and only use it
to specify the version itself.

This makes it consistent with ANDROID_SDK_VERSION and it is also in
preparation for using the same variable to build ANGLE in the future.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33188>
 2025-01-24 14:15:22 +00:00
Antonio Ospite 30740e3af9 ci/android: use ANDROID_SDK_VERSION for debian-android job too 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33188>
 2025-01-24 14:15:22 +00:00
Antonio Ospite 4b2996e749 ci/android: use ANDROID_SDK_VERSION when building deqp components 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33188>
 2025-01-24 14:15:22 +00:00
Antonio Ospite 26d6607063 ci/android: update ANDROID_NDK and ANDROID_SDK_VERSION 
Update ANDROID_NDK to the latest stable release 27c and bump
ANDROID_SDK_VERSION to API version 34 which matches the Android 14
release we are using for the cuttlefish images.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33188>
 2025-01-24 14:15:22 +00:00
David Rosca 6ebc25bc14 frontends/va: Stop using extra context for deinterlacing 
Acked-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33126>
 2025-01-24 13:40:28 +00:00
David Rosca ea73d1b47c gallium/vl: Add compute shader deinterlace filter 
Acked-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33126>
 2025-01-24 13:40:27 +00:00
David Rosca 604fb68876 radeonsi: Report surface alignment for AV1 encode 
This is also useful for AV1 to allow applications to use container crop.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33083>
 2025-01-24 13:04:47 +00:00
David Rosca ad0f197c6c radeonsi/vcn: Fix AV1 coded size for VCN 5.0 
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33083>
 2025-01-24 13:04:47 +00:00
Job Noorman b4c95124ab freedreno: add missing entries to ForEachMacros 
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32107>
 2025-01-24 12:15:31 +00:00
Job Noorman bbd164e2e3 freedreno: remove unused entries from ForEachMacros 
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32107>
 2025-01-24 12:15:31 +00:00
Job Noorman bc6152c1c3 freedreno: move ForEachMacros into freedreno 
This change moves freedreno specific ForEachMacros from the top level
.clang-format to the freedreno specific .clang-format.

This is done to avoid triggering CI for all drivers when making changes
to this list.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32107>
 2025-01-24 12:15:31 +00:00
Job Noorman dd74ef36a5 ir3: account for inserted nops in delay calculation 
Whenever we insert a (nopN) on the previous instruction to add nops, we
initially add them to the current cycle count. However, existing (nopN)
fields are not accounted for. This means the if a (nopN) gets inserted
and the block is processed again, the cycle count will be too low and we
might insert more nops than necessary.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33178>
 2025-01-24 11:39:44 +00:00
Samuel Pitoiset d41a3bb744 radv: program COMPUTE_DISPATCH_INTERLEAVE on GFX12 
To the same value as GFX11.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33185>
 2025-01-24 11:08:59 +00:00
Samuel Pitoiset c039caeb53 ac/cmdbuf: program SPI_SHADER_GS_MESHLET_CTRL to 0 in the GFX12 preamble 
Otherwise, it's derivative group quads by default.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33185>
 2025-01-24 11:08:59 +00:00
Lionel Landwerlin 7ddb49653d anv/brw: rework primitive count writing 
Instead the complicated logic we currently have, do this :

We start with this shader :

int main() {
   ...
   if (...) {
      SetMeshOutputsEXT(0, 0);
      return;
   } else {
      SetMeshOutputsEXT(...);
   }
   ...
}

We turn it into this :

int main() {
   uint __temp_prim_count = 0;
   ...
   if (...) {
      __temp_prim_count = 0;
      return;
   } else {
      __temp_prim_count = ...;
   }
   ...

   if (is_first_group_lane()) {
      SetMeshOutputsEXT(..., __temp_prim_count);
   }
}

This works because the SPIRV spec says this :

   "The arguments are taken from the first invocation in each
    workgroup. Any invocation must execute this instruction no more
    than once and under uniform control flow."

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12388
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33038>
 2025-01-24 10:19:28 +00:00
Lionel Landwerlin 4cc847cfd4 anv/Wa_18019110168: copy the primitive count writes 
That way we don't have to lower the set_vertex_and_primitive_count
intrinsic before applying this WA.

Cc stable for the next patches that are fixing something.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33038>
 2025-01-24 10:19:28 +00:00
Lionel Landwerlin 1067d95987 compiler: add VARYING_BIT_PRIMITIVE_COUNT 
Cc stable for the next patches that are fixing something.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33038>
 2025-01-24 10:19:28 +00:00
Sergi Blanch Torne e02539d7b6 ci: disable Collabora's farm due to unexpected power cut 
Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33198>
 2025-01-24 11:06:00 +01:00
Timothy Arceri 09f73024a5 glsl: fix num_views linker error 
The declaration must be the same across shaders but not all shaders
must make the declaration.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33149>
 2025-01-24 01:47:55 +00:00
Timothy Arceri 914697c4ac glsl: fix num_views validation message 
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33149>
 2025-01-24 01:47:55 +00:00
Caio Oliveira ee625f44d5 intel/elk: Fix wrong destination to memset 
Conversion to use rzalloc_array missed these.

Fixes: c9e667b7ad ("intel/elk: Remove uses of VLAs")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12513
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33192>
 2025-01-24 01:09:26 +00:00
Valentine Burley c670bbc093 freedreno/ci: Update expectations again 
This started passing in the last 24 hours on a306.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33187>
 2025-01-24 00:29:11 +00:00
Rhys Perry 0eb5f66660 nir/validate: validate ssa dominance by default 
This no longer modifies dominance metadata, so enable it by default.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32005>
 2025-01-23 23:35:44 +00:00
Rhys Perry b145045112 nir/validate: preserve dominance during SSA validation 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32005>
 2025-01-23 23:35:44 +00:00
Rhys Perry b1945fd21a nir/validate: validate metadata 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9572
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32005>
 2025-01-23 23:35:44 +00:00