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Author SHA1 Message Date
Yonggang Luo
de36fed555 util: Add new function os_get_option_internal to improve os_get_option* 
This is for take care of GetEnvironmentVariableA/getenv/secure_getenv/os_get_android_option
consistently across windows/posix/android

And also secure_getenv should not directly used in mesa, remove it from u_debug.h

os_get_option_secure is using getenv for windows before, that also pull the drawback of getenv, so convert it also
using GetEnvironmentVariableA on windows instead.

This is done the same as commit bed69133cd for os_get_option_secure

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Acked-by: Antonio Ospite <antonio.ospite@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38128>
 2025-11-06 04:36:12 +00:00
Yonggang Luo
95faaa4553 treewide: Use os_get_option_secure instead secure_getenv 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Acked-by: Antonio Ospite <antonio.ospite@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38128>
 2025-11-06 04:36:11 +00:00
Timothy Arceri
34db720660 mesa: skip redundant uniform update optimisation if unsafe 
If multiple contexts are updating uniform values we can't assume
a uniform update can skip flushing.

Fixes: b32e20e630 ("mesa: skip redundant uniform updates for glUniformHandle")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14129

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38101>
 2025-11-06 01:45:11 +00:00
Juston Li
cf5c294df4 anv/android: query and use explicit layout for ahb resolve 
When available, query and use explicit layout info otherwise fallback to
implicit layout with tiling query.

This fixes aligned layouts of multi-planar formats that were getting
misaligned when adding surfaces with implicit layouts.

Signed-off-by: Juston Li <justonli@google.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38039>
 2025-11-05 22:51:44 +00:00
Juston Li
c36f0e73ba anv/android: align AHardwareBuffer naming to ahb 
/s/ahw/ahb/ to match common vulkan

Signed-off-by: Juston Li <justonli@google.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38039>
 2025-11-05 22:51:44 +00:00
Lionel Landwerlin
1f1022d161 anv: avoid unnecessary stalling on secondaries 
When EXT_descriptor_buffer is not enabled, we can assume we're in
legacy descriptor mode and not do any switching for secondaries.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Casey Bowman <casey.g.bowman@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38256>
 2025-11-05 22:27:06 +00:00
Lionel Landwerlin
9c494dbd42 anv: don't use IndirectStatePointersDisable at the end of secondaries 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Casey Bowman <casey.g.bowman@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38256>
 2025-11-05 22:27:06 +00:00
Lionel Landwerlin
cff047280a anv: avoid invalid timestamp generation due to skipped commands 
We skip the stall emission for STATE_BASE_ADDRESS since this one can
be skipped on Gfx12.5+ and instead add a new sba tracepoint that has
valid timestamps.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 0147908a89 ("anv: predicate emission of STATE_BASE_ADDRESS")
Reviewed-by: Casey Bowman <casey.g.bowman@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38256>
 2025-11-05 22:27:06 +00:00
Aitor Camacho
bea21177f2 kk: Ignore depth clear value if load op is not clear 
This is required otherwise Metal validation will report an error.

Acked-By: Arcady Goldmints-Orlov <arcady@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38233>
 2025-11-05 21:41:57 +00:00
Lionel Landwerlin
9c5b0c28ee anv: enable accelerationStructureCaptureReplay 
This should work just like any other buffer capture/replay.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38255>
 2025-11-05 21:03:45 +00:00
Emma Anholt
bb532a7a39 v3dv: Fix assertion failure for not-found primary_fd during enumeration. 
Found when I had v3dv built in my aarch64 turnip setup.

Fixes: 451a0bd490 ("v3dv: use v3d primary node for VK_EXT_physical_device_drm")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38147>
 2025-11-05 20:06:47 +00:00
Yiwei Zhang
a3c8740c2e llvmpipe: add missing util/os_file.h header 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14248
Fixes: 125b93595e ("llvmpipe: support sparse resource with LLVMPIPE_MEMORY_FD_TYPE_OPAQUE")
Tested-by: Vinson Lee <vlee@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38267>
 2025-11-05 19:45:51 +00:00
Emma Anholt
4c603b7e5f pps: Remove the cpu.cfg file. 
It doesn't look like it would be useful for anything related to Mesa
performance debugging.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37826>
 2025-11-05 19:19:03 +00:00
Emma Anholt
80cdb1641f docs/perfetto: Put V3D at the same level of heading as other drivers. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37826>
 2025-11-05 19:19:03 +00:00
Emma Anholt
09793f02bc docs/perfetto: Be more clear about the role of MESA_GPU_TRACES=perfetto 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37826>
 2025-11-05 19:19:02 +00:00
Emma Anholt
ed40f0e22a docs/perfetto: Explain using tracebox, and put commands in the list. 
This binary that perfetto builds automatically launches traced and
traced_probes, doesn't need tmux installed, doesn't need you to know tmux
ui, and doesn't need the tmux helper script hacked to not call the wrong
arch's ninja if you cross compiled.

Also, it's silly to send people into an explanation and links to docs,
when we have the instructions they actually want below.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37826>
 2025-11-05 19:19:02 +00:00
Emma Anholt
5ca03e1137 docs/perfetto: Give a hint on how to cross compile the tools. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37826>
 2025-11-05 19:19:01 +00:00
Emma Anholt
09e496d6c0 docs/perfetto: Be helpful and opinionated about config selection. 
system.cfg should be your go-to, regardless of driver.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37826>
 2025-11-05 19:19:01 +00:00
Emma Anholt
2d739be159 docs/perfetto: Add row for panvk support. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37826>
 2025-11-05 19:18:59 +00:00
Alyssa Rosenzweig
a72ebeac6d asahi: clang-format 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38245>
 2025-11-05 18:44:23 +00:00
Alyssa Rosenzweig
9c2a2deee6 treewide: use BITSET_BYTES, BITSET_RZALLOC 
Via Coccinelle patches:

    @@
    expression bits;
    typedef BITSET_WORD;
    @@

    -BITSET_WORDS(bits) * sizeof(BITSET_WORD)
    +BITSET_BYTES(bits)

    @@
    expression memctx, bits;
    typedef BITSET_WORD;
    @@

    -rzalloc_array(memctx, BITSET_WORD, BITSET_WORDS(bits))
    +BITSET_RZALLOC(memctx, bits)

     @@
     expression memctx, bits;
     @@

     -rzalloc_size(memctx, BITSET_BYTES(bits))
     +BITSET_RZALLOC(memctx, bits)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38245>
 2025-11-05 18:44:23 +00:00
Alyssa Rosenzweig
ab4cff4f5c util: add BITSET_RZALLOC 
to complement BITSET_CALLOC for when you want a memctx in there.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38245>
 2025-11-05 18:44:23 +00:00
Alyssa Rosenzweig
18eacdda3e util: add BITSET_BYTES helper 
this comes up a lot.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38245>
 2025-11-05 18:44:23 +00:00
Yiwei Zhang
53482178ef glcpp/meson: fix libglcpp generated header dependency 
Explicitly declare glcpp-parse.h as a file dependency to ensure
glcpp_parse custom target completes before compiling glcpp-lex.c.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38254>
 2025-11-05 18:13:47 +00:00
Valentine Burley
f9bfb3265d freedreno/ci: Move a660-gl-cl job back to pre-merge 
The sm8350-hdk devices have been fixed in the lab with help from
Qualcomm.

Also adjust the parallelism of the job, as we're still within the time
limit with just 2 devices instead of 3.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38239>
 2025-11-05 17:44:51 +00:00
Valentine Burley
74d3bd58d9 turnip/ci: Increase coverage of a660-vk job 
Use 5 devices instead of 3, skip redundant tests, increase
tests_per_group value, and decrease the fraction used.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38239>
 2025-11-05 17:44:51 +00:00
Lionel Landwerlin
ff57c31696 brw: avoid invalid URB messages 
Some new CTS tests have geometry shader looking like this :

   void main()
   {
      gl_Position = gl_in[0].gl_Position;
      EmitVertex();
      EndPrimitive();
      // <-- some storage buffer write
   }

The generate shader has :
   - a message to write the position
   - a message to write to the storage buffer
   - a final message to end the thread

This generates an empty EOT URB messages which is apparently not legal
(simulation complains, HW hangs) :

send(8)         nullUD          g126UD          nullUD          0x04088007                0x00000000
                urb MsgDesc: offset 0 SIMD8 write masked  mlen 2 ex_mlen 0 rlen 0 { align1 1Q A@1 EOT };

Instead emit a write with actual data and the mask set at 0 to discard
the effect :

mov(8)          g127<1>UD       0x00000000UD                    { align1 WE_all 1Q };
mov(8)          g125<1>UD       0x00000000UD                    { align1 1Q };
send(8)         nullUD          g126UD          g125UD          0x04088007                0x00000040
                urb MsgDesc: offset 0 SIMD8 write masked  mlen 2 ex_mlen 1 rlen 0 { align1 1Q A@1 EOT };

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38243>
 2025-11-05 17:18:09 +00:00
Ian Romanick
34fe598b39 brw: Correctly generate conditional modifier for BFN 
Fixes: 4193895145 ("brw/cmod: Enable limited cmod propagation for BFN")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38251>
 2025-11-05 16:52:56 +00:00
Christoph Pillmayer
904ba2878f pan: Make W_entry loop aware 
This commit changes SSA based spilling of values in loops.

As described in the paper by Hack, W_entry should consider which values
are used inside of the loop since we would really like to avoid spilling
those because we need to do so every loop iteration.

Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38181>
 2025-11-05 16:15:11 +00:00
Christoph Pillmayer
bb7b0b6b1b pan: Add spill cost metric 
Our SSA spilling logic should avoid inserting spill code inside loops.
Add a metric that reflects this goal.

Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38181>
 2025-11-05 16:15:11 +00:00
Christoph Pillmayer
47f4b00cb2 pan: Pull out normal block logic from compute_w_entry 
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38181>
 2025-11-05 16:15:10 +00:00
Samuel Pitoiset
c6d9b9b4e0 radv: support more tessellation parameters with TCS for ESO unlinked shaders 
The Vulkan spec change hasn't been released yet but the VKCTS test
is public, so let's merge the fix to make VKCTS green again locally.

Fixes dEQP-VK.shader_object.tessellation.*.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38209>
 2025-11-05 15:49:25 +00:00
Samuel Pitoiset
373faab109 radv: use GFX11 packed context regs 
This is supposed to be optimal for the CP. Only for dGPUs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38187>
 2025-11-05 15:15:00 +00:00
Samuel Pitoiset
db3a79a10a radv: add separate functions for emitting framebuffer on GFX11-11.5 
To use packed context registers on dGPUs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38187>
 2025-11-05 15:15:00 +00:00
Samuel Pitoiset
58a5f5eb6b radv: add GFX11 packed context registers helpers 
Tracked registers aren't in common code yet.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38187>
 2025-11-05 15:14:58 +00:00
Samuel Pitoiset
3c5ec268ec amd,radeonsi: add GFX11 packed context registers helpers to common code 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38187>
 2025-11-05 15:14:58 +00:00
Alessio Belle
a6ca6bcabf pvr: add device info for GE8300 (22.67.54.30) 
Requested by the community [1].

[1] https://gitlab.freedesktop.org/imagination/linux-firmware/-/issues/13

Signed-off-by: Alessio Belle <alessio.belle@imgtec.com>
Reviewed-by: Simon Perretta <simon.perretta@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38211>
 2025-11-05 14:47:27 +00:00
Alessio Belle
b83bd94d69 pvr: add device info for GE7800 (15.5.1.64) 
Requested by the community [1].

[1] https://gitlab.freedesktop.org/imagination/linux-firmware/-/issues/13

Signed-off-by: Alessio Belle <alessio.belle@imgtec.com>
Reviewed-by: Simon Perretta <simon.perretta@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38211>
 2025-11-05 14:47:26 +00:00
Saroj Kumar
8005bf631c radeonsi: Move binary upload, dump code to new file 
Moved helper functions for binary upload and dump
code from si_shader.c to new file si_shader_binary.c

Signed-off-by: Saroj Kumar <saroj.kumar@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38166>
 2025-11-05 14:30:02 +00:00
Juan A. Suarez Romero
973a950932 v3dv/ci: add timeout in expected list 
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38259>
 2025-11-05 13:49:00 +00:00
Collabora's Gfx CI Team
fcecfe54e8 Uprev Piglit to 5309e3401d6b03e8a0bb7bfdc1e0f5bc1ad754af 
ec76cc7a31...5309e3401d

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38253>
 2025-11-05 12:49:28 +00:00
Kenneth Graunke
183d57aa9e ci: Run intel shader-db on Haswell, Broadwell, and Meteorlake 
This would have caught recent regressions.

Haswell covers crocus.
Broadwell covers iris's oldest platform.
Skylake and derivatives are widely deployed.
Meteorlake is reasonably representative of recent Intel hardware.

Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38231>
 2025-11-05 10:58:00 +00:00
Kenneth Graunke
96b739b449 elk: Disable IO semantic validation when remapping patch offsets 
Marek disabled this for brw in 2f6b4803ab
but elk also needs the fix.  Fixes issues in shader-db/open-subdiv/7 on
crocus targeting Haswell.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38231>
 2025-11-05 10:58:00 +00:00
Kenneth Graunke
10e2631e79 iris, crocus: Disable new IO slot validation for FB fetch load_output 
This is a framebuffer fetch for blend equation advanced lowering.  We're
using a binding table index as the offset, which is not a slot.

Also, validate the shader after setup_binding_table so that we catch
errors here at the right place, rather than deeper in the compiler.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38231>
 2025-11-05 10:58:00 +00:00
Georg Lehmann
b2172467d1 aco/gfx10_3: work around NSA hazard 
4+ dword NSA can hang if exec becomes non-zero again directly before
the instruction.

Foz-DB Navi21:
Totals from 608 (0.74% of 82161) affected shaders:
Instrs: 945138 -> 946431 (+0.14%)
CodeSize: 5171580 -> 5176864 (+0.10%)
Latency: 13356895 -> 13357113 (+0.00%)
InvThroughput: 3043234 -> 3043236 (+0.00%); split: -0.00%, +0.00%

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9852
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13981
Cc: mesa-stable

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38215>
 2025-11-05 10:06:04 +00:00
David Rosca
bcb6e6b6e6 radv/video: Fix AV1 bidir compound encode with order_hint disabled 
Cc: mesa-stable
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37911>
 2025-11-05 09:44:04 +00:00
David Rosca
96db490318 radv/video: Don't require encode FW version >= interface version 
Otherwise this breaks backwards compatibility when bumping interface
version for new features.

Cc: mesa-stable
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37911>
 2025-11-05 09:44:04 +00:00
David Rosca
1a8a8db8c5 radeonsi/vcn: Fix AV1 bidir compound encode with order_hint disabled 
Cc: mesa-stable
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37911>
 2025-11-05 09:44:04 +00:00
Yiwei Zhang
4201613de1 venus: enable sparse resource support on lavapipe 
Now that lavapipe sparse resource support on external memory has been
fixed, expose sparse resource support from venus on lavapipe. Meanwhile,
make remaining failures explicit (failed in lavapipe as well).

This CL also drops an obsolete comment and updates expectations from
full nightly runs.

Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38074>
 2025-11-05 08:26:40 +00:00
Yiwei Zhang
125b93595e llvmpipe: support sparse resource with LLVMPIPE_MEMORY_FD_TYPE_OPAQUE 
Store a dup fd for OPAQUE type as required by sparse binding. Use
os_map_memory_fd_placed to handle binding for opaque fd backed memory,
while the unbind will still correctly share the same code path with
other cases. This adds sparse resource support with OPAQUE type in
addition to DMA_BUF, and venus no longer has to hide sparse resource on
lavapipe.

Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38074>
 2025-11-05 08:26:40 +00:00