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297 Commits

Author SHA1 Message Date
Friedrich Vock d6d68ceda1 radv: Enable compute dispatch tunneling 
Compute tunneling can considerably lower the latency of high-priority
compute work. Enabling it is beneficial in cases where high-priority
work is dispatched while the GPU is already busy with other work (e.g.
rendering on GFX). This is the case in VR compositors that dispatch
latency-sensitive compositing work to ACE while GFX is busy rendering
the next frame.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26462>
 2023-12-04 12:32:47 +00:00
Timur Kristóf d09ad16fd4 ac: Remove CIK prefix from SDMA opcodes. 
The vast majority of AMD GPUs (except the very first GCN) have
the same SDMA packet format, so let's just call it SDMA instead
of CIK_SDMA.

(And leave the oldest GPUs with SI_SDMA as they are now.)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26110>
 2023-11-18 17:11:00 +01:00
Samuel Pitoiset 17daa08dff radv: emit COMPUTE_PIPELINESTAT_ENABLE for CS invocations on ACE 
This register seems needed to enable compute shader shader invocations
on GFX7. On GFX8+ it's working fine without emitting this register but
I think it doesn't hurt.

This fixes dEQP-VK.query_pool.statistics_query.*_cq on GFX7.

Fixes: a9945216ba ("radv: fix COMPUTE_SHADER_INVOCATIONS query on compute queue")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25957>
 2023-11-01 12:46:17 +00:00
Timur Kristóf 9a79c5f1e5 radv: Support SDMA in si_cs_emit_write_event_eop. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25833>
 2023-10-24 23:12:45 +00:00
Samuel Pitoiset 50845f6fa4 radv: set ENABLE_PING_PONG_BIN_ORDER for GFX11.5 
Ported from RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25304>
 2023-10-24 08:20:47 +02:00
Timur Kristóf ff6c585121 radv: Add queue family argument to some functions. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25770>
 2023-10-19 14:35:00 +00:00
Timur Kristóf 107473162e radv: Refactor WRITE_DATA helper function. 
Create a version of this function that takes a CS and queue family.
move it to radv_cs.h so it can be called from multiple other files.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25770>
 2023-10-19 14:35:00 +00:00
Timur Kristóf 1b988af0ad radv: Move radv_cp_wait_mem to radv_cs.h and add queue family argument. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25770>
 2023-10-19 14:35:00 +00:00
Samuel Pitoiset 7397502a1f radv: disable primitive restart for non-indexed draws on GFX11 
Primitive restart is also applied to non-indexed draws on AMD GPUs. On
GFX11, DISABLE_FOR_AUTO_INDEX can be set but we will need a different
solution for older GPUs.

This fixes all line related flakes in CI (at least).

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25639>
 2023-10-12 06:33:40 +00:00
Samuel Pitoiset 83cad95358 radv: emit missing PA_{SC,SU}_LINE_STIPPLE_xxx regs in gfx preamble 
Ported from RadeonSI and PAL.
This might fix the line stipple flakes in CI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25428>
 2023-09-29 07:50:46 +00:00
Samuel Pitoiset b544a6d6c3 radv: emit PA_SC_SCREEN_SCISSOR_BR with the actual fb extent 
For some reasons, this register is needed for RGP to report actual
render/depth targets size instead of 0 for both width/height. It
doesn't seem to have any other effects.

Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9169
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23921>
 2023-06-30 06:38:53 +00:00
Vitaliy Triang3l Kuzmin 5449a2c988 radv: Remove unconditional POPS_DRAIN_PS_ON_OVERLAP setting 
This hardware hang workaround (PAL waMiscPopsMissedOverlap) is needed only
on some Vega chips, and only for 8 or more samples per pixel. It has a
significant performance cost (around 1.5x-2x in
nvpro-samples/vk_order_independent_transparency), so it should be precisely
configured when setting up Primitive Ordered Pixel Shading.

It was added in 47b780be21, when POPS was not
used in Mesa, with the change being described as "this may not be needed
yet, but let's set it now".

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
 2023-06-26 15:58:04 +00:00
Samuel Pitoiset a5cdc4840d radv: use IB for the GFX preamble on GFX6 
GFX6 supports IBs without any issues.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23670>
 2023-06-19 06:48:21 +00:00
Marek Olšák c33622d931 amd: don't set PA_RATE_CNTL because it has no effect 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:20 +00:00
Eric Engestrom 8b319c6db8 radv: reformat according to its .clang-format 
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23253>
 2023-06-16 19:59:52 +00:00
Timur Kristóf d3d55f7747 radv: Leave primitive reset index at max on GFX8+. 
GFX8+ only compares the bits according to the index type by default
(GFX9 can be changed by VGT_MULTI_PRIM_IB_RESET_EN.MATCH_ALL_BITS),
so we can always leave the programmed value at the maximum.

This reduces context rolls on GFX8+ when primitive restart is used.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23459>
 2023-06-13 15:26:47 +00:00
Bas Nieuwenhuizen 7893040f80 radv: Add stricter space checks. 
The check for max_dw means that none of checks triggered reliably
when we had an issue. Use a stricter reserved dw measure to increase
the probability of catching issues.

Adds a radeon_check_space to some places after cs_create as they
previously relied on the min. cs size, but that would still trigger
the checks.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20152>
 2023-04-30 22:33:52 +02:00
Samuel Pitoiset fbab8df43f radv: emit PIXEL_PIPE_STAT_CONTROL in the gfx preamble for GFX11 
This is more optimal than emitting for every BeginOcclusionQuery().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22556>
 2023-04-20 16:25:09 +00:00
Bas Nieuwenhuizen 771c0f0e65 radv: Reserve space in si_cs_emit_cache_flush. 
Fixes: 4c6f83006d ("radv: Synchronization for task shaders.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>
 2023-04-12 20:31:47 +00:00
Bas Nieuwenhuizen 1de978b873 radv: Reserve space in conditional rendering functions. 
Fixes: e45ba51ea4 ("radv: add support for VK_EXT_conditional_rendering")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22392>
 2023-04-12 20:31:47 +00:00
Timur Kristóf 0c1d4130ca radv/amdgpu: Add bool is_secondary argument to cs_create function. 
Also save is_secondary to the CS object.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22354>
 2023-04-11 17:05:03 +00:00
Samuel Pitoiset 15f1d5cc8f radv: copy ia_multi_vgt_param to the cmdbuf state 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22194>
 2023-03-30 11:43:06 +00:00
Samuel Pitoiset d109362a3d radv: copy bound shaders to the cmdbuf state 
To stop relying on the pipeline everywhere.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22128>
 2023-03-29 10:18:24 +00:00
Timur Kristóf 05e6d945ad radv: Emulate VGT_ESGS_ITEMSIZE in shaders on GFX9+. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21434>
 2023-03-03 20:15:10 +00:00
Marek Olšák ccaaf8fe04 amd: massively simplify how info->spi_cu_en is applied 
Instead of having ac_set_reg_cu_en that sets the register, replace it with
ac_apply_cu_en that only returns the modified register value,
which allows a large simplification in both drivers because a lot of code
becomes duplicated after it's switched to ac_apply_cu_en.

RADV also didn't apply it to a few registers. Fixed.

This removes 82 lines of code in total.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
 2023-03-03 00:41:48 +00:00
Marek Olšák 6e2e89e6d8 amd,radeonsi: change enabled_rb_mask to 64 bits 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21641>
 2023-03-03 00:41:48 +00:00
Tatsuyuki Ishi bab235106e radv: Replace radv_trap_handler_shader with radv_shader. 
Now that the upload memory is tied to the shader itself, the trap handler
shader no longer needs an additional wrapper.

This is a cleanup to ease introduction of a new shader uploading code path.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21541>
 2023-03-01 05:12:10 +00:00
Marek Olšák e0c8b24e22 amd/registers: unify VRS combiner definition names between gfx103 and gfx11 
use gfx11 names

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Samuel Pitoiset 685f08f91d radv: add support for rectangularLines 
dEQP-VK.*rectangular_line* pass on NAVI21.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21287>
 2023-02-17 07:38:10 +00:00
Marek Olšák 35fa57dfae amd: sort and re-indent packet definitions 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
 2023-02-03 00:18:02 +00:00
Samuel Pitoiset 56158bd0c0 radv: adjust ACCUM tessellation fields on GFX11+ 
Based on RadeonSI/PAL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20982>
 2023-01-31 11:43:10 +00:00
Turo Lamminen b5de1ee1f7 radv: Clean up variables in si_get_ia_multi_vgt_param 
8% gain in drawcall throughput on i5-2500. This can significantly change
how compiler allocates registers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20877>
 2023-01-27 15:05:03 +00:00
Yogesh Mohan Marimuthu 97b9b2cf40 radv: add support for register shadowing 
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>
 2023-01-25 04:53:34 +00:00
Samuel Pitoiset 12f26b5e6d radv: fix guardband if the polygon mode is points or lines 
If points or lines are drawn using the polygon mode, the guardband
should be adjusted for large points/lines.

Cc: 22.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20185>
 2022-12-06 19:30:51 +00:00
Samuel Pitoiset 96332b3433 radv: stop emitting R_00B8A0_COMPUTE_PGM_RSRC3 from the CS preamble 
It will be always emitted as part of the compute pipeline.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20054>
 2022-11-30 09:05:13 +00:00
Samuel Pitoiset 62715a6d03 radv: set missing SPI_SHADER_PGM_xxx registers on GFX11 
Found by inspection.

Cc: 22.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20054>
 2022-11-30 09:05:13 +00:00
Samuel Pitoiset cd2e2021a0 radv: emit PA_SU_PRIM_FILTER_CNTL in the graphics preamble 
This register doesn't change.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19654>
 2022-11-16 13:02:14 +00:00
Samuel Pitoiset 25e311e9d3 radv: implement transform feedback queries with NGG streamout 
The control bit is written to the upper bits because GDS counters
are 32-bits only, this allows to re-use the existing query shader.

Tested on GFX10.3.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19325>
 2022-10-31 08:22:29 +00:00
Samuel Pitoiset bc19ffef27 radv: do not use memory for waiting for cache flushes on GFX11 
There is a different mechanism with an internal counter.
Ported from RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19155>
 2022-10-20 08:55:04 +00:00
Samuel Pitoiset 39bdf17d19 radv: use correct VGT_TESS_DISTRIBUTION settings on GFX11 
Ported from RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19155>
 2022-10-20 08:55:04 +00:00
Samuel Pitoiset 578e30f3e6 radv: make sure to initialize wd_switch_on_eop before checking its value 
This is technically not a bug because it might just trigger
SWITCH_ON_EOI when streamout is used and I think it was fine.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7303
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18700>
 2022-09-21 18:20:58 +00:00
Samuel Pitoiset 0bf822144f radv: move emitting PRIMGROUP_SIZE for <= GFX9 from the cmdbuf 
The number of tessellation patches that is computed from the number
of patch control points might change dynamically too.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18344>
 2022-09-13 08:24:14 +00:00
Samuel Pitoiset 556b297977 radv: pass the number of patch control points to si_get_ia_multi_vgt_param() 
To prepare for dynamic patch control points.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18344>
 2022-09-13 08:24:14 +00:00
Samuel Pitoiset 5bbb7de514 radv: split emitting guardband into a separate helper 
This will be used to emit guardband separately from scissor.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18247>
 2022-08-29 19:40:36 +00:00
Samuel Pitoiset fbbae5c0b9 radv: remove useless parameter in si_write_scissors() 
It always starts from 0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18247>
 2022-08-29 19:40:36 +00:00
Timur Kristóf aadb3d69d1 radv: Refactor some CP DMA functions to work with radeon_cmdbuf. 
Allow emitting these packets without a radv_cmd_buffer object.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16531>
 2022-07-20 19:00:30 +00:00
Samuel Pitoiset e9b2fa6527 radv: fix wide points/lines by configuring the guardband correctly 
Fixes all remaining wide points/lines failures with Zink.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6121
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17392>
 2022-07-12 09:11:40 +02:00
Samuel Pitoiset d88c859b4e radv: do not emit more non-existent registers on GFX11 
Found these by diffing the list of registers between GFX10_3 and GFX11.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16557>
 2022-05-26 07:43:38 +00:00
Samuel Pitoiset 98f3727d56 radv: unify radv_pipeline_has_XXX() helpers 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16688>
 2022-05-25 11:39:20 +00:00
Samuel Pitoiset 6fe6570e76 radv: rename radv_cmd_state::pipeline to graphics_pipeline 
To be consistent with compute pipelines.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16688>
 2022-05-25 11:39:20 +00:00