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Author SHA1 Message Date
Eric Engestrom
d60b8fd3cb util/atomic: fix return type of p_atomic_add_return() fallback 
Fixes: 385d13f26d ("util/atomic: Add a _return variant of p_atomic_add")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3012>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3012>
 2020-01-22 21:42:52 +00:00
James Xiong
ac0219cc5b gallium: dmabuf support for yuv formats that are not natively supported 
V2 (Kenneth Graunke):
   added a helper function to check if every format is supported

Signed-off-by: James Xiong <james.xiong@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2846>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2846>
 2020-01-22 21:18:49 +00:00
Emmanuel Gil Peyrot
5f78524d9b intel/compiler: Return early if read() failed 
This was the only warning I could see while compiling Iris.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2821>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2821>
 2020-01-22 20:52:47 +00:00
Alan Coopersmith
8490b7d917 intel/perf: adapt to platforms like Solaris without d_type in struct dirent 
Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>
[Eric: factor out the is_dir_or_link() check and fix a bug in v1]
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
v3: include directory path when lstat'ing files
v4: fix inverted check in enumerate_sysfs_metrics()

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2258>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2258>
 2020-01-22 20:23:51 +00:00
Eric Engestrom
8f140422ed llvmpipe: drop LLVM < 3.4 support 
We don't support < 3.9 anymore, so this code is dead.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2760>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2760>
 2020-01-22 11:21:13 -08:00
Eric Engestrom
7d7d1da1ac egl: drop confusing mincore() error message 
A user came to me asking how to fix this error, but it's entirely
expected that `get_wl_surface_proxy()` on recent enough wayland
compositors will always print it.
Let's just remove the message altogether, it is basically never useful.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3219>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3219>
 2020-01-22 17:55:26 +00:00
Rhys Perry
15a1cc00d3 aco: fix off-by-one error when initializing sgpr_live_in 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2394
Fixes: 93c8ebfa78 ('aco: Initial commit of independent AMD compiler')
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3511>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3511>
 2020-01-22 17:23:30 +00:00
Samuel Pitoiset
bd51538d28 radv: fix double free corruption in radv_alloc_memory() 
If the driver fails to allocate memory for some reasons, it shouldn't
free the 'mem' object twice.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2302
Fixes: 825ddfee59 ("radv: Handle device memory alloc failure with normal free.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3508>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3508>
 2020-01-22 17:01:16 +00:00
Michel Dänzer
5a6a88f58c gitlab-ci: Use single if for manual job rules entry 
I thought multiple ifs would all need to match, but looks like only the
last one (or either one?) does.

This should prevent a manual pipeline from getting created after merging
changes which can't affect the pipeline.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3474>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3474>
 2020-01-22 16:42:11 +00:00
Michel Dänzer
2dd0cc60f1 gitlab-ci: Set GIT_STRATEGY to none for the dummy job 
It doesn't need anything from the Git repository.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3474>
 2020-01-22 16:42:11 +00:00
X512
eb40c0adfc util/u_thread: Fix build under Haiku 2020-01-22 16:21:54 +00:00
Alexander von Gluck IV
49d2a066c2 haiku/hgl: Fix build via header reordering 2020-01-22 16:21:54 +00:00
Rhys Perry
3f96a1ed86 aco: fix operand kill flags when a temporary is used more than once 
Helps create v_mac_f32 from v_mad_f32(b, a, b)

Totals from affected shaders:
SGPRS: 35824 -> 35824 (0.00 %)
VGPRS: 33460 -> 33456 (-0.01 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 2187264 -> 2180976 (-0.29 %) bytes
LDS: 127 -> 127 (0.00 %) blocks
Max Waves: 3802 -> 3802 (0.00 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3486>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3486>
 2020-01-22 15:55:00 +00:00
Boris Brezillon
5b810c7de3 panfrost/midgard: Add missing lowering passes for type/size conversion ops 
Replace the manual type/size conversion lowering description by one
that's automatically generated and covers all type/size conversions.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
 2020-01-22 15:31:28 +00:00
Boris Brezillon
fcceeaffae panfrost/midgard: Add 64 bits float <-> int converters 
The 64 bit converter cases were missing, add them now.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
 2020-01-22 15:31:28 +00:00
Boris Brezillon
fe5fbadd46 panfrost/midgard: Fix mir_print_instruction() for branch instructions 
Branch instructions should not be treated as regular ALUs.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
 2020-01-22 15:31:28 +00:00
Boris Brezillon
e1f9e8d60b panfrost/midgard: Add f2f64 support 
So we can convert floats into doubles.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
 2020-01-22 15:31:28 +00:00
Boris Brezillon
f53a0799c7 panfrost/midgard: Factorize f2f and u2u handling 
Those size conversion operations work the same way apart from f2f
using an fmov op code and u2u using an imov. Let's handle them in the
same case block to avoid code duplication.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
 2020-01-22 15:31:28 +00:00
Boris Brezillon
6548d01b3d panfrost/midgard: Make sure promote_fmov() only promotes 32-bit imovs 
mir_constant_float() assumes we're dealing with 32-bit integers/floats,
which is only the case if reg_mode is equal to midgard_reg_mode_32.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
 2020-01-22 15:31:28 +00:00
Boris Brezillon
9566f26ed4 panfrost/midgard: Rework mir_adjust_constants() to make it type/size agnostic 
Right now, constant combining is not supported in 16 bit mode, and 64
bit mode is simply ignored. Let's rework the function to make it
type/bit-size agnostic.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
 2020-01-22 15:31:28 +00:00
Boris Brezillon
15c92d158c panfrost/midgard: Use a union to manipulate embedded constants 
Each instruction bundle can contain up to 16 constant bytes. The meaning
of those byte is instruction dependent: it depends on the instruction
native type (int, uint or float) and the instruction reg_mode (8, 16, 32
or 64 bit). Those different layouts can be exposed as a union to
facilitate constants manipulation.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
 2020-01-22 15:31:28 +00:00
Lionel Landwerlin
63461cb7e1 anv: ensure prog params are initialized with 0s 
As a result of 9baa33cef0 our backend compiler leaves params pretty
much untouched. So in order to avoid storing uninitialized values in
the shader cache blobs, just 0 out this array.

I've considered not even allocating this array which works on gen8+
but the vec4 backend still makes a copy of this array and so it
crashes on memcpy on HSW.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 9baa33cef0 ("anv: Rework push constant handling")
Reported-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3516>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3516>
 2020-01-22 16:47:55 +02:00
Alyssa Rosenzweig
4936120230 panfrost: Fix crash in compute variant allocation 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: d8a3501f1b ("panfrost: Dynamically allocate shader variants")
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3515>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3515>
 2020-01-22 13:48:24 +00:00
Guido Günther
d817f2c696 etnaviv: drm: Don't miscalculate timeout 
The current code overflows (s * 1000000000) for s >= 5 but that is
e.g. used in etna_bo_cpu_prep.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3509>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3509>
 2020-01-22 13:22:47 +00:00
Alexander van der Grinten
047162d99c egl: Fix _eglPointerIsDereferencable w/o mincore() 
On platforms without mincore(), _eglPointerIsDereferencable()
currently just checks whether p != NULL. This is not sufficient:
In the Wayland platform code (i.e., in get_wl_surface_proxy()),
_eglPointerIsDereferencable() is called on the version field
of `struct wl_egl_window` which is 3 on current versions of
Wayland. This causes a segfault when trying to dereference p.

Fix this behavior by assuming that the first page of the
process is never dereferencable.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3103>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3103>
 2020-01-22 12:55:05 +00:00
Tapani Pälli
39e7492d33 egl/android: fix buffer_count for applications setting max count 
Problem with previous solution was that it did not take account that
some applications may set a max count for buffers. Therefore we need to
query both min and max and clamp our setting based on that.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2373
Fixes: be08e6a449 ("egl/android: Restrict minimum triple buffering for android color_buffers")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3480>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3480>
 2020-01-22 10:37:04 +00:00
Timur Kristóf
1c9ecb2123 aco: Fix signedness compare warning. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3483>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3483>
 2020-01-22 11:09:17 +01:00
Timur Kristóf
533a20dbd5 aco: Fix maybe-uninitialized warnings. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3483>
 2020-01-22 11:09:14 +01:00
Timur Kristóf
6fb3df2786 aco: Fix -Wstringop-overflow warnings in aco_span. 
GCC does not understand how aco_span works.
This patch fixes it by casting the aco_span's this pointer
to uintptr_t rather than to a char pointer, effectively
telling GCC not to try to figure it out.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3483>
 2020-01-22 11:09:10 +01:00
Timur Kristóf
75e5720e1a radeon: Fix multiple definition error with radeon_debug 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3488>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3488>
 2020-01-22 09:36:28 +01:00
Timur Kristóf
8e22df3aec gallium: Fix a couple of multiple definition warnings. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3488>
 2020-01-22 09:36:25 +01:00
Timur Kristóf
a134ac5ee9 r600: Move get_pic_param to radeon_vce.c 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3488>
 2020-01-22 09:36:23 +01:00
Timur Kristóf
b7f9759809 radeon: Move si_get_pic_param to radeon_vce.c 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3488>
 2020-01-22 09:36:16 +01:00
Timur Kristóf
e45ea781f8 intel/compiler: Fix array bounds warning on GCC 10. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
 2020-01-22 08:35:18 +01:00
Eric Anholt
3abfde13be turnip: Add support for non-zero (still constant) UBO buffer indices. 
This was actually all ready to go at this point, and just needed to
increment by the value.

Fixes dEQP-VK.binding_model.shader_access.primary_cmd_buf.uniform_buffer.*

Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3504>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3504>
 2020-01-22 02:13:38 +00:00
Jonathan Marek
5f791df0d0 turnip: fix array/matrix varyings 
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3109>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3109>
 2020-01-21 20:36:08 -05:00
Jonathan Marek
c171765223 turnip: remove tu_sort_variables_by_location 
nir_assign_io_var_locations already does sorting.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3109>
 2020-01-21 20:36:08 -05:00
Jonathan Marek
1736447f27 freedreno/ir3: allow inputs with the same location 
turnip can have multiple inputs with the same location, and different
location_frac.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3109>
 2020-01-21 20:36:08 -05:00
Matt Turner
17c9ec94f5 gitlab-ci: Skip ext_timer_query/time-elapsed 
This test's result is unpredictable, so it may occasionally pass when we
expect it to fail, thus causing the CI pipeline to fail.

Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3498>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3498>
 2020-01-22 00:53:48 +00:00
Matt Turner
68cfc65ccb intel/compiler: Test compaction on Gen <= 12 
With the previous commits we can now enable the unit test on Gen <= 12.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2635>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2635>
 2020-01-22 00:19:21 +00:00
Matt Turner
22462ba242 intel/compiler: Validate fuzzed instructions 
... before giving them to the instruction compactor.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2635>
 2020-01-22 00:19:21 +00:00
Matt Turner
72cf63cfc6 intel/compiler: Add unit tests for new EU validation checks 
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2635>
 2020-01-22 00:19:21 +00:00
Matt Turner
5f4eacaeda intel/compiler: Validate some instruction word encodings 
Specifically, execution size, register file, and register type. I did
not add validation for vertical stride and width because I don't believe
it's possible to have an otherwise valid instruction with an invalid
vertical stride or width, due to all of the other regioning
restrictions.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2635>
 2020-01-22 00:19:21 +00:00
Matt Turner
0fc490cdee intel/compiler: Factor out brw_validate_instruction() 
In order to fuzz test instructions, we first need to do some sanity
checking first. Factoring out this function allows us an easy way to
validate a single instruction.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2635>
 2020-01-22 00:19:21 +00:00
Matt Turner
40f0ade68e intel/compiler: Handle invalid compacted immediates 
16-bit immediates need to be replicated through the 32-bit immediate
field, so we should never see one that isn't.

This does happen however in the fuzzer unit test, so returning false
allows the fuzzer to reject this case.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2635>
 2020-01-22 00:19:21 +00:00
Matt Turner
205cb8a139 intel/compiler: Handle invalid inputs to brw_reg_type_to_*() 
Necessary to handle these cases when we test fuzzed instructions.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2635>
 2020-01-22 00:19:21 +00:00
Matt Turner
741cf9a104 intel/compiler: Split hw_type tables 
Previously we were sharing tables between generations that were nearly
identical (i.e., Gen8 3-src adds HF support) and used a small bit of
code to handle the differences. This is kind of a mess if you want to
reject 64-bit types on platforms that don't support 64-bit types, so
split the tables, allowing each generation's table to list exactly what
it supports.

Acked-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2635>
 2020-01-22 00:19:21 +00:00
Matt Turner
0b70d46f7a intel/compiler: Add a INVALID_{,HW_}REG_TYPE macros 
Since the enum brw_reg_type is packed, comparisons with -1 don't work
directly, necessitating the cast. Add a macro to avoid this confusion.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2635>
 2020-01-22 00:19:20 +00:00
Matt Turner
ab7c25b9aa intel/compiler: Add NF some more places 
Necessary to handle these cases when we test fuzzed instructions.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2635>
 2020-01-22 00:19:20 +00:00
Matt Turner
8634286c5d intel/compiler: Limit compaction unit tests to specific gens 
Two of the tests emit instructions with MRF destinations, and MRFs
aren't present on Gen7+. I think we were just lucky that this didn't
cause a problem earlier since we were running the tests on Gen7-9.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2635>
 2020-01-22 00:19:20 +00:00