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Author SHA1 Message Date
Constantine Shablya c7300a6a3b vulkan: add hepler for vkGetPhysicalDeviceFeatures2 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21754>
 2023-03-16 08:23:28 +00:00
Constantine Shablya efaf3fd5fc vulkan: delete trailing namespace 
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21754>
 2023-03-16 08:23:28 +00:00
Constantine Shablya cd35ab9570 vulkan: tidy up vk_physical_device_features 
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21754>
 2023-03-16 08:23:28 +00:00
Constantine Shablya b0b3b9e8b1 vulkan: relocate rmv to its correct home 
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21754>
 2023-03-16 08:23:28 +00:00
Qiang Yu 51e725df29 radeonsi: monolithic TCS emit tessfactor in nir directly 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21437>
 2023-03-16 04:33:31 +00:00
Qiang Yu 3f5d42a28a radeonsi: lower nir_load_ring_tess_factors_offset_amd 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21437>
 2023-03-16 04:33:30 +00:00
Qiang Yu 719366c2b2 ac/llvm,radeonsi: lower nir_load_ring_tess_factors_amd 
No one implement this intrinsic in llvm, so remove the
llvm entry too.

This will be used in TCS nir tess factor write.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21437>
 2023-03-16 04:33:30 +00:00
Qiang Yu 99828e0390 ac/nir: handle tess factor output missing case 
tcs_tess_lvl_(in|out)_loc may be not set if user miss tess
factor output.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21437>
 2023-03-16 04:33:30 +00:00
Qiang Yu 700e24941c ac/nir: init tess factor location with IO remap 
Radeonsi is going to use nir tess factor write, so need to
remap tess factor location.

RADV set tess factor driver location to be 0 and 1 in
get_linked_variable_location(). While radeonsi also set them
to be 0 and 1 in st->map_io aka. si_shader_io_get_unique_index_patch().

We could just set them to be 0 and 1 at the beginning of
ac_nir_lower_hs_outputs_to_mem(), but in order to keep the
location map at the same place, we still do this in
lower_hs_output_store().

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21437>
 2023-03-16 04:33:30 +00:00
Qiang Yu c06329eb3f ac/nir: tcs write tess factor support pass by reg 
For radeonsi usage.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21437>
 2023-03-16 04:33:30 +00:00
Qiang Yu e070a9e8d0 ac/nir: move store_var_components to common place 
It will be shared by other nir lowering too.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21437>
 2023-03-16 04:33:30 +00:00
Alyssa Rosenzweig f2617944bf panfrost: Don't round up Midgard polygon list BOs 
Rounding up the polygon list BO can waste large amounts of memory. In a common
case I observed, it rounded up 11MB to 16MB, wasting 5MB. That adds up quickly
across processes, especially on the 2GB machines.

This only applies to Midgard. On Bifrost and newer, the driver does not
explicitly allocate this data structure. Cc stable because this rounding is
incorrect and the increase in RAM usage can cause real problems (especially
given how slow the shrinker is).

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21831>
 2023-03-16 04:13:46 +00:00
Timothy Arceri 174d6e6a54 glsl: allow 64-bit integer on RHS of shift 
Fixes: 9ba9a7f854 ("glsl: Add 64-bit integer support to some operations.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6862

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21919>
 2023-03-16 02:26:30 +00:00
Daniel Schürmann 39c828cb9f aco: remove aco::rt_stack variable 
Since we initialize scratch in the RT proglog,
there is no need for this variable anymore.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21780>
 2023-03-16 01:40:30 +00:00
Daniel Schürmann f123d65e9f radv/rt: use prolog for raytracing shaders 
Co-authored-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21780>
 2023-03-16 01:40:30 +00:00
Friedrich Vock bea022d1f6 radv/rt: Add shader config combination/postprocessing utils 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21780>
 2023-03-16 01:40:30 +00:00
Friedrich Vock 0569b350ed radv: Emit RT shader VA user SGPR 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21780>
 2023-03-16 01:40:30 +00:00
Daniel Schürmann a16df842a6 radv: compile rt_prolog 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21780>
 2023-03-16 01:40:30 +00:00
Daniel Schürmann 4b92a53285 radv: add radv_create_rt_prolog() 
Co-authored-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21780>
 2023-03-16 01:40:30 +00:00
Daniel Schürmann 6446b79168 aco: implement select_rt_prolog() 
Co-authored-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21780>
 2023-03-16 01:40:30 +00:00
Daniel Schürmann 7d35bf24f6 aco: create hw_init_scratch() function for p_init_scratch lowering 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21780>
 2023-03-16 01:40:30 +00:00
Daniel Schürmann 2fee99a36c aco: implement load_ray_launch_{id|size} 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21780>
 2023-03-16 01:40:30 +00:00
Daniel Schürmann c7c68e1193 aco: move rt_dynamic_callable_stack_base_amd to VGPR 
In future, we will use a VGPR arg for that between RT stages.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21780>
 2023-03-16 01:40:30 +00:00
Daniel Schürmann 1f01a86b36 aco: don't set private_segment_buffer/scratch_offset on GFX9+ 
It is unused. Also don't initialize scratch in raytracing stages as it gets
initialized in the prolog shader.

Co-authored-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21780>
 2023-03-16 01:40:30 +00:00
Daniel Schürmann a33b9d43d8 aco: add RT stage enums 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21780>
 2023-03-16 01:40:29 +00:00
Daniel Schürmann c38b8678c9 radv: add RT shader handling to radv_postprocess_config 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21780>
 2023-03-16 01:40:29 +00:00
Daniel Schürmann 3f03eebf04 radv: add RT stages to radv_get_shader_name() 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21780>
 2023-03-16 01:40:29 +00:00
Daniel Schürmann 650f386bdd radv: handle RT stages in radv_nir_shader_info_pass() 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21780>
 2023-03-16 01:40:29 +00:00
Daniel Schürmann d5de56bf59 radv: add RT shader args 
Co-authored-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21780>
 2023-03-16 01:40:29 +00:00
Daniel Schürmann 5ede3b1c6b mesa: add gl_shader_stage_is_rt() 
to indicate raytracing shader stages.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21780>
 2023-03-16 01:40:29 +00:00
Rob Clark b78fc0ae48 driconf: Work around incorrect GI discard/invalidate 
Genshin Impact does a depth+stencil invalidate (or discard, not sure
which entrypoint they are using) and then proceeds to do draws with
depth test enabled.  For IMRs (or freedreno in sysmem mode) this is no
problem.  But for tilers that use this as a hint that they can skip the
z/s tile load, it is.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Mike Blumenkrantz <michael.blumenkrantz@gmail.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21916>
 2023-03-16 00:56:37 +00:00
Rob Clark a66c62420e driconf: Add ignore_discard_framebuffer option 
Some apps use glDiscardFramebuffer()/glInvalidateFramebuffer() when they
only kidding.  Add a knob to disable that.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Mike Blumenkrantz <michael.blumenkrantz@gmail.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21916>
 2023-03-16 00:56:37 +00:00
Rob Clark 976d964a35 mesa: Rework discard_framebuffer() 
Decouple the logic turning API attachment enums into gl_buffer_index.
This will make it easier to re-use discard_attachments() internally (See
!21910)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Mike Blumenkrantz <michael.blumenkrantz@gmail.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21916>
 2023-03-16 00:56:37 +00:00
Lynne f5e5ec180c aco_validate: allow for wave32 in p_dual_src_export_gfx11 
Fixes RADV_PERFTEST=pswave32

Fixes: bb90d29660 ("aco: add p_dual_src_export_gfx11 for dual source blending on GFX11")
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21934>
 2023-03-15 23:55:41 +00:00
Mark Janes a2e5e7daa0 intel: use generated helpers for Wa_1409433168/Wa_16011107343 
HSD 1306463417 is a hardware defect.  The originating software
workaround for the issue is Wa_1409433168.  Convert all references to
the software workaround number, and use generated helpers instead of
GFX comparisons.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21914>
 2023-03-15 23:31:08 +00:00
Emma Anholt 4466098324 ci/turnip: Move some more of the 1.3.5 new xfails under links. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21915>
 2023-03-15 23:07:21 +00:00
Emma Anholt 5e3d36199f ci/turnip: Disable dEQP-VK.image.queue_transfer.* for now. 
We're waiting on the upstream CTS fix to land.  Until then, quiet the spam
in #freedreno-ci to see if we have any other flakes we need to be managing
right now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21915>
 2023-03-15 23:07:21 +00:00
Emma Anholt 45dc05d455 ci/turnip: Clear out stale xfails. 
These were all fixed in the CTS, but missed from removal due to fractional runs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21915>
 2023-03-15 23:07:21 +00:00
Emma Anholt 78d4a82d30 turnip: Don't push inline uniform buffer contents outside constlen. 
This would apparently lead to trying to load from this inline uniform
buffer in later submits.

Fixes: 37cde2c634 ("tu: Rewrite inline uniform implementation")
Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8219
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21915>
 2023-03-15 23:07:21 +00:00
Mike Blumenkrantz f99eab23ad aux/trace: delete GALLIUM_TRACE_NIR log message 
this is not only annoying, it breaks trace xml output

cc: mesa-stable

Acked-by: Simon Zeni <simon@bl4ckb0ne.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21609>
 2023-03-15 20:43:52 +00:00
José Roberto de Souza eec5ddd0ed anv: Handle external objects allocation in Xe 
External(imported or exported) objects needs to have vm_id set to 0.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21885>
 2023-03-15 18:17:11 +00:00
José Roberto de Souza b2d82c25fb anv: Properly alloc buffers that will be promoted to framebuffer in Xe KMD 
Xe KMD does a special caching handling for buffers that will be
scanout to display, so that is why it needs a flag set during
allocation.

Checking if VK_STRUCTURE_TYPE_WSI_MEMORY_ALLOCATE_INFO_MESA
is available in AllocateMemory() and marking the buffer as scanout.

All WSI code paths but one sets
VK_STRUCTURE_TYPE_WSI_MEMORY_ALLOCATE_INFO_MESA.
The only one that doesn't requires that WSI is initialize with
wsi_device_options.sw_device = true to be executed, what is not the
case for ANV.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21885>
 2023-03-15 18:17:11 +00:00
José Roberto de Souza a311c031f6 anv: Implement Xe version of anv_physical_device_get_parameters() 
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21885>
 2023-03-15 18:17:11 +00:00
antonino 1538a28803 zink: fix final_hash update in zink_gfx_program_update 
The logic that updates `ctx->gfx_pipeline_state.final_hash` assumed that
the program is replaced. It is supposed to xor `final_hash` with the
hash first and then with the new hash however when the program is
updated it end up xor-ing the new hash twice so it does nothing.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Fixes: 15450d2c2e ("zink: incrementally hash all pipeline component hashes")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21925>
 2023-03-15 18:00:20 +00:00
SoroushIMG 78198d634d zink: Add driver name and API version to renderer name 
Having driver name in the renderer will be useful to differentiate
between open source and proprietary drivers as they can have different
feature sets/quirks.

Vulkan API version is also added to the name to match up with ANGLE.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21922>
 2023-03-15 17:40:16 +00:00
Mike Blumenkrantz 81a4163375 zink: fix copy box merging adjacency 
these cases need to increase the box size, not just adjust the offset

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21921>
 2023-03-15 16:42:19 +00:00
Mike Blumenkrantz 32f74c4db5 zink: fix copy box iteration when adding 
need to use the iterator, not the base pointer

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21921>
 2023-03-15 16:42:19 +00:00
Timur Kristóf 6185e4f2ff aco, radv: Remove VS IO information from ACO. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16805>
 2023-03-15 14:54:28 +00:00
Timur Kristóf 819ba6f7ae ac/llvm: Remove unused function ac_build_struct_tbuffer_load. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16805>
 2023-03-15 14:54:28 +00:00
Timur Kristóf 2f78700f89 radv: Remove VS inputs code from LLVM backend. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16805>
 2023-03-15 14:54:28 +00:00