Commit Graph

81585 Commits

Author SHA1 Message Date
Eric Anholt c93ffd661a vc4: Mark our shaders as single-threaded.
I had my understanding of this bit flipped.  We're using the full register
space, so we need to say so.
2015-07-30 15:46:28 -07:00
Eric Anholt df3005de18 vc4: Avoid leaking indirect array access UBOs. 2015-07-30 15:46:28 -07:00
Eric Anholt 86541cf8ce vc4: Avoid overflowing various static tables. 2015-07-30 15:46:27 -07:00
Eric Anholt d0173bce37 vc4: Fix return values from recent validation changes. 2015-07-30 15:46:27 -07:00
Jason Ekstrand 26ba0ad54d vk: Re-name command buffer implementation files
Previously, the command buffer implementation was split between
anv_cmd_buffer.c and anv_cmd_emit.c.  However, this naming convention was
confusing because none of the Vulkan entrypoints for anv_cmd_buffer were
actually in anv_cmd_buffer.c.  This changes it so that anv_cmd_buffer.c is
what you think it is and the internals are in anv_batch_chain.c.
2015-07-30 15:00:42 -07:00
Jason Ekstrand e379cd9a0e vk/cmd_buffer: Add a simple command pool implementation 2015-07-30 14:55:49 -07:00
Kai Wasserbäch a5b3b24958 docs: trivial cleanup of GL3.txt, remove redundant radeonsi entries.
Follow-up to 1b2b0e42ce

Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-31 07:28:17 +10:00
Dave Airlie 518abd0bbe st/mesa: don't draw instead of asserting in transform feedback
if we get a request to take the count from feedback, but there
is no buffer to take it from, just draw as if we got 0 vertices
so nothing.

This fixes this assert killing the ogl conform, and a piglit
test I've sent.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-31 07:27:29 +10:00
Jason Ekstrand 4c2a182a36 vk/cmd_buffer: Add support for zero-copy batch chaining 2015-07-30 14:22:17 -07:00
Jason Ekstrand 21004f23bf vk: Add initial support for secondary command buffers 2015-07-30 11:36:48 -07:00
Jason Ekstrand 5aee803b97 vk/cmd_buffer: Split batch chaining into a helper function 2015-07-30 11:34:58 -07:00
Jason Ekstrand 0c4a2dab7e vk/device: Make BATCH_SIZE a global #define 2015-07-30 11:34:09 -07:00
Jason Ekstrand ace093031d vk/cmd_buffer: Add functions for cloning a list of anv_batch_bo's
We'll need this to implement secondary command buffers.
2015-07-30 11:32:27 -07:00
Jason Ekstrand 7af67e085f vk/reloc_list: Actually set the new length in reloc_list_grow 2015-07-30 11:29:55 -07:00
Jason Ekstrand f15be18c92 util/list: Add list splicing functions
This adds functions for splicing one list into another.  These have
more-or-less the same API as the kernel list splicing functions.
2015-07-30 11:28:22 -07:00
Jason Ekstrand e39d0b635c CLONE 2015-07-30 08:24:02 -07:00
Jason Ekstrand 82548a3aca vk/cmd_buffer: Invalidate texture cache in emit_state_base_address
Previously, the caller of emit_state_base_address was doing this.  However,
putting it directly in emit_state_base_address means that we'll never
forget the flush at the cost of one PIPE_CONTROL at the top every batch
(that should do nothing since the kernel just flushed for us).
2015-07-30 08:24:02 -07:00
Jason Ekstrand 56ce896d73 vk/cmd_buffer: Rename emit_batch_buffer_end to end_batch_buffer
This is more generic and doesn't imply that it emits MI_BATCH_BUFFER_END.
While we're at it, we'll move NOOP adding from bo_finish to
end_batch_buffer.
2015-07-30 08:24:02 -07:00
Timothy Arceri fdb8487613 mesa: remove now unused _mesa_get_uniform_location
Cc: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-07-30 22:00:56 +10:00
Timothy Arceri 7f5f7d15fb mesa: remove now unused subscript validations
Cc: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-07-30 22:00:50 +10:00
Timothy Arceri 8cd2f88845 mesa: fix and simplify resource query for arrays
This removes the need for multiple functions designed to validate an array
subscript and replaces them with a call to a single function.

The change also means that validation is now only done once and the index
is retrived at the same time, as a result the getUniformLocation code can
be simplified saving an extra hash table lookup (and yet another
validation call).

This chage also fixes some tests in:
ES31-CTS.program_interface_query.uniform

V3: rebase on subroutines, and move the resource index array == 0
check into _mesa_GetProgramResourceIndex() to simplify things further

V2: Fix bounds checks for program input/output, split unrelated comment fix
and _mesa_get_uniform_location() removal into their own patch.

Cc: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-07-30 22:00:45 +10:00
Neil Roberts 3a21e4bd26 i965/bxt: Don't use brw_device_info_skl_early on BXT
Previously it could end up using the “SKL early” device on BXT
depending on the revision number. This would probably break things
because for example has_llc would be wrong.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-30 11:45:27 +01:00
Timothy Arceri 75a96cedf7 glsl: set stage flag for structs and arrays in resource list
This fixes the remaining failing tests in:
ES31-CTS.program_interface_query.uniform-types

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-07-30 19:33:33 +10:00
Dave Airlie 1b2b0e42ce docs: consolidate radeonsi in GL3.txt
move into DONE for GL4.0 and GL4.1

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-30 09:00:42 +01:00
Dave Airlie af1e6aa75b radeonsi: enable GL4.1 and update documentation (v2)
This enables GL4.1 for radeonsi, and updates the
docs in the correct places.

v2: enable only for llvm 3.7 which has fixes in place.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-30 09:00:25 +01:00
Dave Airlie 3c73c41871 radeonsi: add GS multiple streams support (v2)
This is the final piece for ARB_gpu_shader5,

The code is based on the r600 code from Glenn Kennard,
and myself.

While developing this, I'm not 100% sure of all the calculations
made in the GS registers, this is why the max_stream is worked
out there and used to limit the changes in registers. Otherwise
my initial attempts either regressed GS texelFetch tests
or primitive-id-restart. The current code has no regressions
in piglit.

This commit doesn't enable ARB_gpu_shader5, since that just
bumps the glsl level to 4.00, so I'll just do a separate patch
for 4.10.

v1.1: fix bug introduced in rebase.
v2: Address Marek's review comments,
remove my llvm stream code for simpler C,
move gsvs_ring and gs_next_vertex to arrays.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-07-30 09:00:17 +01:00
Jason Ekstrand 3ed9cea84d vk/cmd_buffer: Use an array to track all know anv_batch_bo objects
Instead of walking the list of batch and surface buffers, we simply keep
track of all known batch and surface buffers as we build the command
buffer.  Then we use this new list to construct the validate list.
2015-07-29 15:30:15 -07:00
Jason Ekstrand 0f31c580bf vk/cmd_buffer: Rework validate list creation
The algorighm we used previously required us to call add_bo in a particular
order in order to guarantee that we get the initial batch buffer as the
last element in the validate list.  The new algorighm does a recursive walk
over the buffers and then re-orders the list.  This should be much more
robust as we start to add circular dependancies in the relocations.
2015-07-29 15:16:54 -07:00
Anuj Phogat c73a13e953 Delete unused functions in format parser
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
2015-07-29 14:46:32 -07:00
Anuj Phogat 92994742d0 i965: Change the type of max_{vs, hs, ...}_threads variables to unsigned
Fixes following compiler warning:
brw_cs.cpp:386:27: warning: comparison between signed and unsigned
integer expressions [-Wsign-compare]

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-07-29 14:46:31 -07:00
Anuj Phogat 2484263fe9 Delete duplicate function is_power_of_two() and use _mesa_is_pow_two()
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2015-07-29 14:46:30 -07:00
Jose Fonseca 8413822c8c gallium/auxiliary: Ensure c99_math.h is included.
As it is needed for exp2.

Trivial.
2015-07-29 21:25:10 +01:00
Roland Scheidegger 2b916c6e47 c99_math: (trivial) implement exp2 for MSVC too
Unsurprisingly doesn't build otherwise with old msvc.
2015-07-29 22:20:04 +02:00
Jason Ekstrand 4fc7510a7c vk/cmd_buffer: Move emit_batch_buffer_end higher in the file 2015-07-29 12:01:08 -07:00
Jason Ekstrand 8208f01a35 vk/cmd_buffer: Store the relocation list in the anv_batch_bo struct
Before, we were doing this thing where we had one big relocation list for
the whole command buffer and each subbuffer took a chunk out of it.  Now,
we store the actual relocation list in the anv_batch_bo.  This comes at the
cost of more small allocations but makes a lot of things simpler.
2015-07-29 12:01:08 -07:00
Jason Ekstrand 7d50734240 vk/batch: Make relocs a pointer to a relocation list
Previously anv_batch.relocs was an actual relocation list.  However, this
is limiting if the implementation of the batch wants to change the
relocation list as the batch progresses.
2015-07-29 12:01:08 -07:00
Ben Widawsky e933d54599 i965/bxt: Support 3src simd16 instructions
This is easily accomplished by moving simd16 3src to GEN9_FEATURES.

v2: small cleanup to make it more similar to GEN8_FEATURES

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-07-29 11:10:02 -07:00
Kristian Høgsberg Kristensen fcea3e2d23 vk/headers: Update to new generated gen headers
This update fixes cases where a 48-bit address field was split into
two parts:

    __gen_address_type                           MemoryAddress;
    uint32_t                                     MemoryAddressHigh;

which cases this pack code to be generated:

   dw[1] =
       __gen_combine_address(data, &dw[1], values->MemoryAddress, dw1);

   dw[2] =
      __gen_field(values->MemoryAddressHigh, 0, 15) |
      0;

which breaks for addresses above 4G.

This update also fixes arrays of structs in commands and structs, for
example, we now have:

   struct GEN8_BLEND_STATE_ENTRY                Entry[8];

and the pack functions now write all dwords in the packet, making
valgrind happy.

Finally, we would try to pack 64 bits of blend state into a uint32_t -
that's also fixed now.
2015-07-29 11:02:33 -07:00
Emil Velikov c0731a1b14 targets/dri: scons: add missing link against libdrm
Otherwise the final dri module will have (additional) unresolved
symbols.

Cc: Brian Paul <brianp@vmware.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviwed-by: Jose Fonseca <jfonseca@vmware.com>
2015-07-29 17:41:43 +01:00
Emil Velikov 4fc86f183e svga: scons: remove unused HAVE_SYS_TYPES_H define
There isn't a single instance in mesa that
mentions HAVE_SYS_TYPES_H, other than this file.

Cc: Jose Fonseca <jfonseca@vmware.com>
Acked-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-29 17:40:47 +01:00
Matt Turner 23bba717e1 glsl: Avoid double promotion. 2015-07-29 09:34:52 -07:00
Matt Turner a562313f37 mesa: Avoid double promotion.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-29 09:34:52 -07:00
Matt Turner 7adc9fa1f1 mesa/math: Avoid double promotion.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-29 09:34:52 -07:00
Matt Turner 076f73edb3 program: Avoid double promotion.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-29 09:34:52 -07:00
Matt Turner 04aa8b58a0 swrast: Avoid double promotion.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-29 09:34:52 -07:00
Matt Turner c92b2a1d7b tnl: Avoid double promotion.
There are a couple of unrelated changes in t_vb_lighttmp.h that I hope
you'll excuse -- there's a block of code that's duplicated modulo a few
trivial differences that I took the liberty of fixing.
2015-07-29 09:34:52 -07:00
Matt Turner 2b47ef715a vbo: Avoid double promotion.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-29 09:34:52 -07:00
Matt Turner b568a5f6a8 util: Avoid double promotion.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-29 09:34:52 -07:00
Matt Turner 29ef7a9f19 gallium/auxiliary: Avoid double promotion.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-07-29 09:34:52 -07:00
Matt Turner 4251ccb47b nir: Avoid double promotion.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2015-07-29 09:34:51 -07:00