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Author SHA1 Message Date
Aitor Camacho
a77e09eaeb util: Introduce HAVE_BUILD_ID for build id utils 
Build utilities to retrieve the build id are now exposed
through the new HAVE_BUILD_ID instead of HAVE_DL_ITERATE_PHDR
since this will allow adding support for platforms that do
not support HAVE_DL_ITERATE_PHDR

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38420>
 2025-11-17 22:50:07 +00:00
Dylan Baker
9d2c8e5b98 bin/gen_release_notes: Remove duplicate bug entires 
A multiple commits may reference the same bug (for example, a commit
is only a partial fix). We don't want that to show up in our fixed bug
log.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38492>
 2025-11-17 22:45:13 +00:00
Dylan Baker
cda114e0e4 bin/gen_release_notes: Remove cast that does nothing 
Without an assignment this cast is dead code.

Cast's in python work like:
```python
from typing import cast
x = ['a', 'b', 'c']
x = cast(list[str | int], x)
x.append(5)
```

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38492>
 2025-11-17 22:45:13 +00:00
Dylan Baker
9b7a676fa6 docs/relnotes/25.3.0: Escape some rst language constructs 
That are from the gitlog, which we don't currently escape.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38454>
 2025-11-17 22:07:43 +00:00
Dylan Baker
4a524a6de6 docs/relnotes/25.3.0: Remove duplicate bug fixes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38454>
 2025-11-17 22:07:43 +00:00
Dylan Baker
b1640d027f docs: update calendar for 25.3.0 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38454>
 2025-11-17 22:07:42 +00:00
Dylan Baker
04e1c46089 docs: Add sha sums for 25.3.0 
(cherry picked from commit 0cb99ef602b77ef7dbccc04f535a570c67cd7b68)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38454>
 2025-11-17 22:07:42 +00:00
Dylan Baker
34c520037a docs: add release notes for 25.3.0 
(cherry picked from commit 523eea18c546b67ce0ed8425f5eb469808fa7523)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38454>
 2025-11-17 22:07:42 +00:00
Aitor Camacho
c49b3c670c kk: Add MESA_KK_DISABLE_WORKAROUNDS to disable workarounds 
MESA_KK_DISABLE_WORKAROUNDS provides a way to disable workarounds
we've had to apply to get Vulkan conformance. In hopes that Metal
bugs get fixed in upcoming macOS releases.

Reviewed-by: Arcady Goldmints-Orlov <arcady@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38426>
 2025-11-17 21:52:10 +00:00
Christian Gmeiner
adf881cd3e etnaviv: Add support for ARB_vertex_type_2_10_10_10_rev 
This extension seems to be supported on GC3000 (HALTI2) and later hardware.
While no explicit feature bit documents this capability, testing
confirms that the required vertex formats work correctly on these GPUs.

This patch adds the missing B10G10R10A2 vertex format variants
(UNORM, SNORM, USCALED, SSCALED), gates support behind the HALTI2
feature check, and updates features.txt to reflect the new capability.

All relevant piglit tests pass.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38446>
 2025-11-17 21:33:31 +00:00
Lionel Landwerlin
401b2066b0 anv: ensure slab allocated memory matches image requirements 
The VMA of VkDeviceMemory has to accomodate all the resources that can
be bound to it. For sparse images it's 64KiB alignment, for other
tiled images it's 4KiB. But we also have a workaround that requires a
64KiB alignment for Tile4 images.

The initial version of the slab allocator missed the 4KiB alignment.
This fix adds the workaround handling too.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: dabb012423 ("anv: Implement anv_slab_bo and enable memory pool")
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38480>
 2025-11-17 20:51:47 +00:00
Lionel Landwerlin
775f8ec105 anv: fixup load_ubo lowering 
Use ult like nir_lower_explicit_io.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38477>
 2025-11-17 20:02:00 +00:00
Olivia Lee
4a2df9127f panvk/csf: add PANLIB_BARRIER_CSF_WAIT, to insert WAIT after precomp 
This is useful for running multiple dependent precomp shaders in a row.
We could do this using PANLIB_BARRIER_CSF_WAIT and then immediately wait
on the syncobj, but it's a little silly to do that on the same subqueue.

Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Acked-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37971>
 2025-11-17 19:31:31 +00:00
Olivia Lee
f5e0d90231 panvk/csf: put precomp syncobj behind PANLIB_BARRIER_CSF_SYNC option 
In some cases, we don't need to signal the syncobj yet because we will
be issuing a second asynchronous instruction afterwards blocking on the
first.

Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Acked-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37971>
 2025-11-17 19:31:31 +00:00
Olivia Lee
ebbf05f9d2 panvk/csf: explicitly set ls_sb_slot in set_fbds_provoking_vertex 
SB_ID(LS) is currently equal to zero, so this is not a behavior change,
but worth setting it explicitly for clarity and in case the sb
assignments change.

Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Fixes: 885805560f ("panvk/csf: fix case where vk_meta is used before PROVOKING_VERTEX_MODE_LAST")
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38458>
 2025-11-17 19:11:05 +00:00
Olivia Lee
e899bc8be8 panvk/csf: fix uninitialized read in draw context 
We check fn_set_fbds_provoking_vertex_stride == 0 to determine whether a
previous function variant has already been allocated, so this value must
be initialized to zero before we start the loop. We could fix this by
explicitly initializing just that field, but I figure it's simpler and
safer to just zero-initialize the whole struct.

Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Fixes: 885805560f ("panvk/csf: fix case where vk_meta is used before PROVOKING_VERTEX_MODE_LAST")
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38458>
 2025-11-17 19:11:05 +00:00
Casey Bowman
bcdc0aae44 anv: Make pipeline mode switches show which mode is being entered 
This helps for debug when wanting to check which pipeline mode the
driver has selected for a given section of a frame.

Signed-off-by: Casey Bowman <casey.g.bowman@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38317>
 2025-11-17 09:38:50 -08:00
Casey Bowman
3f795016d3 anv: Remove vf_flush for start of command buffers 
These vertex fetch flushes aren't required in gen9+ because the display
driver will take care of this invalidation on QueueSubmit. So let's remove it.

Signed-off-by: Casey Bowman <casey.g.bowman@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38317>
 2025-11-17 09:38:50 -08:00
Lionel Landwerlin
4816318887 brw: fix workaround fence rlen field 
send.ugm (1|M0)          r125     r0      null:0  0x0            0x0200651F           {$9} // wr:1+0, rd:0; fence invalid flush type scoped to tile

When destination of Send(s) is not null, the response length must not be 0.

Should only affect DG2 products.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38478>
 2025-11-17 17:08:30 +00:00
David Rosca
17c015c2de radeonsi/vce: Add workaround for unaligned input surface 
VCE requires 16x16 aligned input surface. Blit into an internal
scratch surface when input surface is not 16 aligned.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14270
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38392>
 2025-11-17 16:49:21 +00:00
Georg Lehmann
018f45f981 aco/insert_NOPs: remove redundant VALUReadSGPRHazard waits 
Mostly removes SALU->VALU waits if the VALU writes a sgpr.

Foz-DB GFX1201:
Totals from 18553 (22.51% of 82419) affected shaders:
Instrs: 27388414 -> 27321118 (-0.25%)
CodeSize: 145389276 -> 145118128 (-0.19%); split: -0.19%, +0.00%
Latency: 200288087 -> 200252583 (-0.02%); split: -0.02%, +0.00%
InvThroughput: 36311237 -> 36307369 (-0.01%); split: -0.01%, +0.00%

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38445>
 2025-11-17 16:28:36 +00:00
Georg Lehmann
b1d730982e aco/insert_NOPs: remove redundant VALUMaskWriteHazard waits 
This removes a lot of VALU->SALU waits.

Foz-DB Navi31:
Totals from 8908 (10.84% of 82179) affected shaders:
Instrs: 17118986 -> 17084870 (-0.20%)
CodeSize: 91057212 -> 90919300 (-0.15%); split: -0.15%, +0.00%
Latency: 154044128 -> 154036848 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 26608698 -> 26607933 (-0.00%); split: -0.00%, +0.00%

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38445>
 2025-11-17 16:28:36 +00:00
Erik Faye-Lund
c3170d11ac pvr: limit availability of HW defs 
To be able to support multiple GPU architectures, we need to thread
carefully with HW defs. So let's limit the availability of the HW defs
to where it's needed. We do this by moving the HW def includes and
helpers to query them to end of the source-files.

In the long run, we probably want something a bit more formal to get
access to HW-dependent values based on the hw-info. But there's some
work in progress to change how that works, so let's kick the can down
the road a bit on that part.

Reviewed-by: Ashish Chauhan <ashish.chauhan@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38423>
 2025-11-17 16:04:31 +00:00
Erik Faye-Lund
b8721b7436 pvr: respect has_pbe_stride_align_1pixel 
This makes us either use the rogue-define, or a single pixel. This
feature isn't available in any HW we support yet, but that is going to
change soon.

Reviewed-by: Ashish Chauhan <ashish.chauhan@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38423>
 2025-11-17 16:04:31 +00:00
Erik Faye-Lund
ba47e03908 pvr: store has_pbe_stride_align_1pixel in pvr_device_features 
This doesn't actually need fixing; there's no Rogue HW with this
feature. Instead, let's start populating this when we fill in new
architectures, which does support this.

Reviewed-by: Ashish Chauhan <ashish.chauhan@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38423>
 2025-11-17 16:04:31 +00:00
Erik Faye-Lund
da414f102c pvr: factor out write_immutable_samplers 
This is the only part of pvr_descriptor_set_create() that actually
depends on architecture specific details (in particular, the
write_sampler calls), so let's factor this out to a separate function.

This is going to be helpful when we're doing multi-arch support.

Reviewed-by: Ashish Chauhan <ashish.chauhan@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38423>
 2025-11-17 16:04:31 +00:00
Erik Faye-Lund
afff4be21c pvr: encapsulate clear-state 
Same story as the previous commit; this let's us store an architecture
specific structure inside an architecture agnostic structure.

Reviewed-by: Ashish Chauhan <ashish.chauhan@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38423>
 2025-11-17 16:04:31 +00:00
Erik Faye-Lund
ddd604439f pvr: encapsulate border-table 
The border-table is architecture specific, but it's stored in the device
structure that isn't. We need to store a pointer to it instead, because
the size will vary from architecture to architecture.

Reviewed-by: Ashish Chauhan <ashish.chauhan@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38423>
 2025-11-17 16:04:30 +00:00
Erik Faye-Lund
8233f77caa pvr: split idep_pco_uscgen_programs_h in two 
When we do multiarch, we want to be able to refer to the headers
separately from the sources here, so let's split this dependency in two.

Reviewed-by: Ashish Chauhan <ashish.chauhan@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38423>
 2025-11-17 16:04:30 +00:00
Ashish Chauhan
8df205d520 pvr: store arch in device-info 
Right now all supported devices are Rogue devices. But in the future,
we're going to support multiple architectures. So let's add a way to
query this at run-time.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38423>
 2025-11-17 16:04:30 +00:00
leonperianu
1e548195d2 pvr: feature promotion to core from derived 
RGX_FEATURE_USC_ITR_PARALLEL_INSTANCES is no longer a derived feature
for Volcanic, it is a core feature. This improvement is related to the
introduction of Volcanic device information.

Signed-off-by: leonperianu <leon.perianu@imgtec.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38423>
 2025-11-17 16:04:30 +00:00
leonperianu
bf1d9d1339 pvr: Change has_fbcdc_algorithm to 1-bit bit-field 
This aligns it with the definitions of other device features.

Signed-off-by: leonperianu <leon.perianu@imgtec.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38423>
 2025-11-17 16:04:30 +00:00
Patrick Lerda
f8de09a811 r600: fix rv770 read scratch compatibility 
The flag mega_fetch should be set on rv770 for a
read scratch operation (as written in the r700
documentation p357). Without this flag, read scratch
does not work and a gpu hang could be triggered.

Here are the tests fixed:
shaders/glsl-predication-on-large-array: fail pass
spec/glsl-1.10/execution/temp-array-indexing/glsl-fs-giant-temp-array: fail pass
spec/glsl-1.10/execution/temp-array-indexing/glsl-vs-giant-temp-array: fail pass
spec/glsl-1.30/execution/fs-large-local-array: fail pass
spec/glsl-1.30/execution/fs-large-local-array-vec2: fail pass
spec/glsl-1.30/execution/fs-large-local-array-vec3: fail pass
spec/glsl-1.30/execution/fs-large-local-array-vec4: fail pass
spec/glsl-1.30/execution/fs-multiple-large-local-arrays: fail pass

Fixes: 9c48a139b0 ("r600g: Support emitting scratch ops")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38353>
 2025-11-17 15:48:17 +00:00
Erik Faye-Lund
d77279fa9b panfrost: remove stale code 
This code was no longer needed after switching to os_read_file, but I
accidentally left it around, whoops!

Fixes: 49183bfb79 ("pan/bi: use os_read_file-helper")
CID: 1665295
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37903>
 2025-11-17 15:26:22 +00:00
Erik Faye-Lund
c8e30c7a9f panvk: assert that shader_present isn't zero 
If it is, util_last_bit() will return zero, and the subtraction that
follows will underflow. Make it obvious that this can't happen, by
adding an assert here.

CID: 1665297
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37903>
 2025-11-17 15:26:22 +00:00
Erik Faye-Lund
22d929f265 panvk: do not open-code debug_get_num_option 
Open-coding the size-parsing here is fragile. Let's use a common helper
for this instead.

CID: 1665346
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37903>
 2025-11-17 15:26:22 +00:00
Erik Faye-Lund
37a7a157e8 pan/kmod: fix priority query logic 
The PANFROST_JM_CTX_PRIORITY values aren't bitmasks, but enum values.
But the kernel interface uses the BIT()-macro on them, so we need to do
the same. We don't have the macro, but it's trivial to do this with a
bitshift instead.

Fixes: f04dbf0bc0 ("pan/kmod: query and cache available context priorities from KMD")
CID: 1666511
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37903>
 2025-11-17 15:26:22 +00:00
Erik Faye-Lund
55ef52d009 panfrost: remove needless variable 
We can already tell if we're writing the first variable by looking at
sig_offset. So let's drop the needless variable here.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37903>
 2025-11-17 15:26:22 +00:00
Erik Faye-Lund
9839db709a panfrost: initialize sig before use 
If only invalid surfaces are passed, we end up using an undefined array
as a string. And while this might not be possible, it is hard to reason
about, especially for new readers and tools. So let's initialize the
buffer as an empty string.

CID: 1666581
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37903>
 2025-11-17 15:26:22 +00:00
Lionel Landwerlin
8147108590 anv: optimize pipeline switching with secondaries 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38479>
 2025-11-17 15:06:55 +00:00
Lionel Landwerlin
85a117bc37 anv: track descriptor mode in SBA tracepoint 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38479>
 2025-11-17 15:06:55 +00:00
Gert Wollny
942e6af40b r600/sfn: use PS and PV inline registers when possible 
This reduces register pressure later.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37321>
 2025-11-17 14:46:57 +00:00
Gert Wollny
80887e2590 r600/sfn: Fix test creation and handling of 3-src without dest 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37321>
 2025-11-17 14:46:57 +00:00
Gert Wollny
1f58a36abb r600/sfn: Add method to force-override the dest of an AluInstr 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37321>
 2025-11-17 14:46:57 +00:00
Gert Wollny
6f8841b338 r600/sfn: Make value factory a member of the block scheduler 
No need to pass it around all the time.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37321>
 2025-11-17 14:46:56 +00:00
Gert Wollny
8e0a0ca098 r600/sfn: Add slot access operator to AluGroup 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37321>
 2025-11-17 14:46:56 +00:00
Gert Wollny
12d913fe4f r600/sfn: change register ID of dummy dest register 
Handle it correctly in the assembler, live range evaluation
and RA.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37321>
 2025-11-17 14:46:56 +00:00
Gert Wollny
fc5728950b r600/sfn: don't use dummy register with non-write 64 bit slots 
For trans ops and two source ops we can just clear the write flag

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37321>
 2025-11-17 14:46:56 +00:00
Gert Wollny
603af345be r600/sfn: fix querying number of sources for LDS ops in readport validation 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37321>
 2025-11-17 14:46:55 +00:00
Gert Wollny
0cd0efbbf9 r600/sfn: Don't assign dest registers in non-write interpolation slots 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37321>
 2025-11-17 14:46:55 +00:00