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343 Commits

Author SHA1 Message Date
Mark Janes
2236dc3481 intel/dev: update workaround definitions to latest defect status 
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26898>
 2024-01-05 22:51:46 +00:00
Mark Janes
a6a95591aa intel/dev: poison macros for workarounds fixed at a stepping 
INTEL_NEEDS_WA macros are valid when a workaround applies to all
platforms which have the GFX_VERx10 versions for the workaround.

Some workarounds were fixed at a stepping after the platform release.
If a workaround applies partially to any platform, then GFX_VERx10
cannot be used to correctly apply the workaround.

This change invalidates INTEL_NEEDS_WA_16014538804 and
INTEL_NEEDS_WA_22014412737, which were fixed for MTL platforms at
stepping b0.  The run-time checks were already present for all uses of
these macros.  Updating the poisoned macros to INTEL_WA_{num}_GFX_VER
compiles out the run-time checks on platforms where they cannot apply.

Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26898>
 2024-01-05 22:51:45 +00:00
Mark Janes
7354d3a947 intel/dev: improve descriptions of workaround macros. 
Instructions for INTEL_WA_{num}_GFX_VER macros were confusing and
contradicted itself.

Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26898>
 2024-01-05 22:51:45 +00:00
Ian Romanick
c6d44284aa intel/dev: Enable VK_KHR_cooperative_matrix on all Gfx9+ GPUs 
Gfx12.5 (DG2) will use DPAS instructions to accelerate the
implementation. Earlier platforms will use equivalent discrete
instructions (basically subgroup operations). Gfx12 (Tigerlake) will use
DP4A for 8-bit integer matrix multiplication. Older platforms, which
lack DP4A, will use a suboptimal instruction sequence. There is plenty
of room for improvement here.

On DG2 (Gfx12.5) gets the following results from the CTS:

Test run totals:
  Passed:        1642/13982 (11.7%)
  Failed:        0/13982 (0.0%)
  Not supported: 12340/13982 (88.3%)
  Warnings:      0/13982 (0.0%)
  Waived:        0/13982 (0.0%)

On DG2 (Gfx12.5) with forced lowering, Raptor Lake (Gfx12) and Ice Lake
(Gfx11):

Test run totals:
  Passed:        1662/13982 (11.9%)
  Failed:        0/13982 (0.0%)
  Not supported: 12320/13982 (88.1%)
  Warnings:      0/13982 (0.0%)
  Waived:        0/13982 (0.0%)

The difference in the number of tests run is due to
saturatingAccumulation not being set on DG2 when DPAS is used. There is
a comment in "intel/dev: Advertise integer configs with
saturatingAccumulation too" that explains how this could be added should
the need arise.

v2: Prefix type names with INTEL_CMAT_. Suggested by Lionel.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25994>
 2023-12-29 20:28:54 -08:00
Caio Oliveira
ff16458478 intel/dev: Add cooperative matrix configuration information 
v2: Prefix type names with INTEL_CMAT_. Suggested by Lionel.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25994>
 2023-12-29 20:28:54 -08:00
Francisco Jerez
8cd8d6bccc intel: Add debug flags for enabling Xe2+ multipolygon fragment shader dispatch modes. 
Note that the multipolygon PS disptach modes supported by Xe2 aren't
enabled by default yet, but they can be enabled manually via
INTEL_SIMD_DEBUG=fs2x8,fs4x8,fs2x16.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26606>
 2023-12-28 14:12:59 -08:00
Francisco Jerez
261d07f398 intel: Add debug flag for enabling dual-SIMD8 fragment shader dispatch. 
Note that this option isn't enabled by default yet pending additional
performance evaluation.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26585>
 2023-12-22 18:05:31 +00:00
José Roberto de Souza
1f0a9f853c intel: Sync xe_drm.h take 2 part 3 
Sync xe_drm.h with commit ac7b89571d80 ("drm/xe/uapi: Kill exec_queue_set_property").

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26360>
 2023-12-06 17:35:23 +00:00
Rohan Garg
6e060d99ba intel/dev: Add a bit for when the HW can do a indirect draw/dispatch unroll 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26421>
 2023-11-30 17:01:44 +00:00
José Roberto de Souza
b27ca68143 intel/dev: Adjust prefetch_size values for Xe2 engines 
Xe2 follows MTL and has different prefetch sizes for different
types of engines.

BSpec: 60223
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26396>
 2023-11-30 14:54:04 +00:00
José Roberto de Souza
05b3967ddc intel: Enable has_set_pat_uapi for Xe 
Xe KMD requires that all platforms supported by it set PAT information.
This will be implemented in Iris and ANV in the next patches.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25462>
 2023-11-29 14:57:42 +00:00
José Roberto de Souza
500e037661 intel: Add PAT entries for gfx12 and newer 
Xe KMD requires PAT for all platforms so here adding PAT entries to
all platforms supported by Xe KMD.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25462>
 2023-11-29 14:57:42 +00:00
José Roberto de Souza
7046a9e280 intel: Rename PAT entries 
Here renaming the PAT entries to a name that better express each
entry.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25447>
 2023-11-23 21:19:18 +00:00
José Roberto de Souza
205c5874d4 intel: Sync xe_drm.h 
Sync xe_drm.h with commit 3b8183b7efad ("drm/xe/uapi: Be more specific
about the vm_bind prefetch region").

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26238>
 2023-11-20 17:57:34 +00:00
Eric Engestrom
ce7cda417f intel/dev: use libdrm.h wrapper to support builds without libdrm 
Fixes part of: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10159

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26236>
 2023-11-17 07:38:33 +00:00
José Roberto de Souza
740e596c62 intel: Add a write combining PAT entry 
Iris and ANV will need to switch to this PAT entry for BOs without
special needs.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26099>
 2023-11-08 01:20:42 +00:00
José Roberto de Souza
0d668f50dc intel: Update MTL scanout PAT entry 
Previous integrated platforms had GT and Display caches not coherent
and there is nothing proven that it changed in MTL, so here
changing the PAT entry for scanout bos.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26099>
 2023-11-08 01:20:42 +00:00
José Roberto de Souza
29d4d26406 intel: Add more information about the PAT entry used 
mmap mode information will be used to properly calculate the mmap flags
in the i915 mmap uAPI and also will be used for BO creation when the
PAT uAPI lands in Xe KMD.
Xe KMD will also require the coherency mode during the BO creation.

So to avoid information duplication, adding this information to
intel_device_info platform entries.

No changes in behavior here.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26099>
 2023-11-08 01:20:42 +00:00
Jordan Justen
abf8b47e02 intel/dev: Rename mtl-p to mtl-h 
Ref: bspec 55414
Suggested-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25857>
 2023-11-07 06:37:00 +00:00
Jordan Justen
e04e491cc7 intel/dev: Rename mtl-m to mtl-u 
Ref: bspec 55414
Suggested-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25857>
 2023-11-07 06:37:00 +00:00
Jordan Justen
f81c84f080 intel/dev/wa: Raise error if mesa_defs.json contains unknown platforms 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25857>
 2023-11-07 06:37:00 +00:00
Tapani Pälli
2833d1ade1 intel/dev: fix intel_device_info_is_adln check 
We cannot compare pointer, patch adds is_adl_n to devinfo for detection.

Fixes: 3cf71ddfac ("intel/dev: provide intel_device_info_is_adln helper")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25934>
 2023-10-30 11:20:41 +00:00
Tapani Pälli
3cf71ddfac intel/dev: provide intel_device_info_is_adln helper 
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25671>
 2023-10-26 11:51:47 +00:00
Tapani Pälli
d52c39a6cd intel/dev: expand existing fix for all gfx12 with small EU count 
Commit 7db1b94e07 added a fix for ADL-N but this issue has been
reproduced also on RPL-S and is likely common with all gfx12 variants
with a small EU count.

cc: mesa-stable

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25861>
 2023-10-25 05:15:47 +00:00
José Roberto de Souza
531605accf intel: Sync xe_drm.h 
Sync xe_drm.h with commit xxxxx ("drm/xe/uapi: Fix naming of XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY").

One not so straght forward change is that sync VM binds now don't
require a syncobj anymore, the uAPI will return as soon the VM bind
operations are done.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25300>
 2023-10-23 23:24:26 +00:00
José Roberto de Souza
79ba431d4a intel: Sync xe_drm.h 
Sync xe_drm.h with commit e51e857ffad4 ("drm/xe/uapi: Remove useless max_page_size").
Most relevant changes are the removal of max_page_size from
drm_xe_query_mem_region and the typo fix in XE_QUERY_CONFIG_MIN_ALIGNMENT.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25162>
 2023-09-13 16:38:15 +00:00
Lionel Landwerlin
2c3a51573a intel/anv: batch stats util 
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
 2023-09-06 20:07:01 +00:00
Jordan Justen
5d37359f32 intel/dev/xe: Move placeholder subslice info into XEHP_FEATURES 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24418>
 2023-09-05 23:02:42 -07:00
Sagar Ghuge
e5116e00ca intel: Add env variable to add break point on/before draw 
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24308>
 2023-08-08 17:36:19 +00:00
Felix DeGrood
6e7718dcea anv: debug messaging for sparse texture usage 
Enable sparse debug messages with INTEL_DEBUG=sparse

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24046>
 2023-08-03 19:57:19 +00:00
Jordan Justen
19d0b24927 intel/dev: Support xe2 device init (for intel_device_info_test) 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24419>
 2023-08-03 00:10:35 +00:00
Jordan Justen
b80bcd8327 intel/dev: Add LNL platform enum 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24421>
 2023-08-02 23:38:37 +00:00
José Roberto de Souza
4198a301b3 intel: Move i915_drm.h specific code from common/intel_gem.h to common/i915/intel_gem.h 
This allow us to remove one more i915_drm.h include from code shared
by both backends.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23905>
 2023-07-28 15:36:52 +00:00
José Roberto de Souza
1174e7412e intel/dev: Port intel_dev_info tool to Xe KMD 
Only hwconfig was calling i915 specifc function, so it was only
necessary split the function that fetches it from backends and call it
from intel_get_and_print_hwconfig_table() depending on the KMD loaded.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23905>
 2023-07-28 15:36:52 +00:00
José Roberto de Souza
f9fcd7168a intel/dev/xe: Add support for small-bar setups 
This adds support for discrete GPUs placed in systems with large PCI
bar or resizeble PCI bar not available or disabled.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23781>
 2023-07-25 19:33:15 +00:00
Jordan Justen
7f0ed719aa intel/devinfo/i915: Set has_set_pat_uapi for MTL+ 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22878>
 2023-06-27 22:06:19 +00:00
Jordan Justen
b602c14fc5 intel/devinfo: Define PAT indices used on MTL 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22878>
 2023-06-27 22:06:19 +00:00
Jordan Justen
e896b81322 intel/devinfo: Add has_set_pat_uapi 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22878>
 2023-06-27 22:06:19 +00:00
Mark Janes
8b70754753 intel/dev: update mesa_defs.json from defect database 
These modifications represent:

 * changes to defects made since May 24, 2023
 * changes to handling of defects which were manually cloned

Acked-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23865>
 2023-06-27 21:38:12 +00:00
Lionel Landwerlin
b687cbe36c isl: add surface creation reporting mechanism 
We have a number of users reporting surface creation issues with
modifiers etc...

This makes Anv & Iris printout the reason of the failure with
INTEL_DEBUG=isl Failure example in Iris :

MESA: debug: ISL surface failed: ../src/intel/isl/isl.c:1729: requested row pitch (42B) less than minimum alignment requirement (1024B) extent=160x160x1 dim=2d msaa=1x levels=1 rpitch=42 fmt=B8G8R8X8_UNORM usage=+rt+tex+disp

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14039>
 2023-06-21 13:28:34 +00:00
Tapani Pälli
15433897b2 intel/dev: add parentheses around intel_needs_workaround macro 
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23596>
 2023-06-13 13:27:30 +00:00
Dmitry Osipenko
16cc0c0eda intel/dev: Use intel_ioctl() helper for GEM_SET_TILING 
Replace opencoded ioctl() usage with a common intel_ioctl() helper.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23399>
 2023-06-02 20:09:24 +00:00
Mark Janes
d0669f3ede intel/dev: switch defect identifiers to use lineage numbers 
Update existing workarounds when necessary to match changed
identifiers.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23226>
 2023-05-30 22:13:41 +00:00
Lionel Landwerlin
9c67dde401 intel: reduce minimum memory alignment on Gfx12.5 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23198>
 2023-05-26 12:58:13 +00:00
Tapani Pälli
abcef5a476 intel/dev: provide helper to check if devinfo is ATS-M 
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20784>
 2023-05-24 04:42:59 +00:00
Lionel Landwerlin
ec4619a5e9 intel/devinfo: call intel_device_info_init_was only once 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8958

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22862>
 2023-05-16 19:32:41 +00:00
Lionel Landwerlin
9ebd553fc2 intel/devinfo: allow -p to take a pci-id in hexa 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22862>
 2023-05-16 19:32:41 +00:00
Lionel Landwerlin
fce55ffb7d intel/devinfo: printout on stdout 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22862>
 2023-05-16 19:32:41 +00:00
Lionel Landwerlin
c60e94d61f anv: make internal address space allocation more dynamic 
We're about to manipulate these pools and dealing with the fix address
ranges is painful.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22847>
 2023-05-05 14:48:15 +03:00
Felix DeGrood
015eecde47 intel/debug: Control start/stop frame of batch debug 
When using INTEL_DEBUG=bat, INTEL_DEBUG_BATCH_FRAME_START and
INTEL_DEBUG_BATCH_FRAME_STOP can limit dumping of batches for
particular frame ranges. Batch dumps are huge. Smart filtering
allows debugging of single frames during game play. Initial
commit to debug infrastructure.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22564>
 2023-04-28 04:37:05 +00:00