intel: Add a write combining PAT entry
Iris and ANV will need to switch to this PAT entry for BOs without special needs. Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26099>
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@@ -1138,7 +1138,8 @@ static const struct intel_device_info intel_device_info_atsm_g11 = {
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.has_ray_tracing = true, \
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.pat.coherent = PAT_ENTRY(3, WB, 1WAY), \
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.pat.scanout = PAT_ENTRY(1, WC, NONE), \
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.pat.writeback = PAT_ENTRY(0, WB, NONE)
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.pat.writeback = PAT_ENTRY(0, WB, NONE), \
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.pat.writecombining = PAT_ENTRY(1, WC, NONE)
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static const struct intel_device_info intel_device_info_mtl_u = {
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MTL_FEATURES,
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@@ -490,6 +490,7 @@ struct intel_device_info
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struct intel_device_info_pat_entry coherent;
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struct intel_device_info_pat_entry scanout;
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struct intel_device_info_pat_entry writeback;
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struct intel_device_info_pat_entry writecombining;
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} pat;
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BITSET_DECLARE(workarounds, INTEL_WA_NUM);
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