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2347 Commits

Author SHA1 Message Date
Rhys Perry
d4b211bf1b ac/nir: always round cube array layers 
It seems this is still necessary if conformant_trunc_coord=true.

Fixes various dEQP-VK.texture.shadow.cube_array.* and
dEQP-VK.glsl.texture_functions.texture*samplercubearray* failures with
conformant_trunc_coord.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Cc: 23.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24137>
 2023-07-17 12:17:22 +00:00
Marek Olšák
043dcfad04 Revert "ac/nir/ngg: Follow intrinsic sources when analyzing before culling." 
This reverts commit 411f69b9c5.

It broke tessellation in Unigine Heaven with radeonsi.

Fixes: 411f69b9c5 - ac/nir/ngg: Follow intrinsic sources when analyzing before culling.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24160>
 2023-07-14 12:00:44 -04:00
Timur Kristóf
5825e20dbf ac/nir: Add new pass to lower intrinsics to shader args. 
This is beneficial for intrinsics that do an algebraic
instruction such as bitfield extract on shader arguments,
because it allows NIR to be aware of these instructions and
optimize them together with other algebraic instructions in
the shader.

Currently, just handle subgroup_id and num_subgroups intrinsics.
More will be added here in the future.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24005>
 2023-07-14 12:17:24 +00:00
Timur Kristóf
a7f2d821ec ac/nir: Simplify arg unpacking when shift is zero. 
This is so we can just use the same function when it's zero.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24005>
 2023-07-14 12:17:24 +00:00
Daniel Schürmann
7e4870e8e5 amd: Do shader binary alignment for prefetch at memory allocation time. 
This makes it consistent between drivers and compilers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23799>
 2023-07-11 12:01:45 +00:00
Yonggang Luo
bd27faf083 treewide: remove unused nir_builder 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24038>
 2023-07-10 19:20:17 +00:00
Yonggang Luo
48a25ef700 treewide: Remove all usage of nir_builder_init with nir_builder_create and nir_builder_at 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24038>
 2023-07-10 19:20:17 +00:00
Marek Olšák
146a92dd9f radeonsi/gfx11: only use SET_*_PAIRS* packets on dGPUs 
They are not available on APUs.

This adds a new template parameter HAS_PAIRS. into draw functions.
Other places add back the non-pairs code for gfx11.

Fixes: 22f3bcfb - radeonsi/gfx11: use SET_*_REG_PAIRS_PACKED packets for pm4 states
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9259

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24010>
 2023-07-09 04:18:05 -04:00
Konstantin Seurer
20beebb041 amd: Move ac_hw_stage to its own file 
Otherwise ACO has to include ac_shader_util.h which also includes NIR.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23906>
 2023-07-03 21:12:45 +00:00
Konstantin Seurer
1ea963c00b radv: Use nir_builder_at 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23883>
 2023-07-03 15:21:37 +00:00
Rhys Perry
25c49e491f aco,ac/llvm,ac/nir,vtn: unify cube opcodes 
fossil-db (navi21):
Totals from 17068 (12.79% of 133461) affected shaders:
Instrs: 24743703 -> 24743572 (-0.00%); split: -0.00%, +0.00%
CodeSize: 132579952 -> 132580620 (+0.00%); split: -0.00%, +0.00%
VGPRs: 1227840 -> 1227984 (+0.01%)
Latency: 403180114 -> 403251188 (+0.02%); split: -0.00%, +0.02%
InvThroughput: 75311302 -> 75320892 (+0.01%); split: -0.00%, +0.01%
VClause: 415400 -> 415402 (+0.00%); split: -0.00%, +0.00%
Copies: 1715404 -> 1715258 (-0.01%); split: -0.01%, +0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com> (r600)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23930>
 2023-06-30 15:35:03 +00:00
Timur Kristóf
d63549a642 ac/nir/ngg: Follow tex sources when analyzing before culling. 
Helps find more possible reusable uniforms variables.
Also prepares the code for more improvements to the analysis.

Fossil DB stats on GFX10.3:

Totals from 6745 (5.00% of 134913) affected shaders:
VGPRs: 304824 -> 304632 (-0.06%)
SpillSGPRs: 228 -> 231 (+1.32%)
CodeSize: 24975152 -> 24863684 (-0.45%); split: -0.56%, +0.11%
Instrs: 4774357 -> 4760913 (-0.28%); split: -0.42%, +0.13%
Latency: 22381084 -> 22218421 (-0.73%); split: -0.88%, +0.15%
InvThroughput: 3984765 -> 3981677 (-0.08%); split: -0.10%, +0.02%
VClause: 110036 -> 110265 (+0.21%); split: -0.67%, +0.88%
SClause: 116296 -> 104576 (-10.08%); split: -10.89%, +0.81%
Copies: 366923 -> 377370 (+2.85%); split: -0.78%, +3.63%
Branches: 119882 -> 119891 (+0.01%); split: -0.00%, +0.01%
PreSGPRs: 314591 -> 350697 (+11.48%); split: -0.36%, +11.83%
PreVGPRs: 252279 -> 252267 (-0.00%); split: -0.02%, +0.01%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23946>
 2023-06-30 11:47:03 +00:00
Timur Kristóf
411f69b9c5 ac/nir/ngg: Follow intrinsic sources when analyzing before culling. 
Helps find more possible reusable uniforms variables.
Also prepares the code for more improvements to the analysis.

Fossil DB stats on GFX10.3:

Totals from 54578 (40.45% of 134913) affected shaders:
VGPRs: 1950536 -> 1950328 (-0.01%); split: -0.02%, +0.01%
SpillSGPRs: 483 -> 1324 (+174.12%); split: -8.90%, +183.02%
CodeSize: 148017620 -> 146549576 (-0.99%); split: -1.10%, +0.11%
MaxWaves: 1533710 -> 1533716 (+0.00%); split: +0.00%, -0.00%
Instrs: 28137479 -> 27909113 (-0.81%); split: -0.94%, +0.13%
Latency: 134454624 -> 130909188 (-2.64%); split: -2.72%, +0.09%
InvThroughput: 20664192 -> 20646525 (-0.09%); split: -0.15%, +0.06%
VClause: 540374 -> 540986 (+0.11%); split: -0.76%, +0.88%
SClause: 720823 -> 636209 (-11.74%); split: -12.46%, +0.72%
Copies: 2287330 -> 2326140 (+1.70%); split: -1.71%, +3.41%
Branches: 844769 -> 844848 (+0.01%); split: -0.00%, +0.01%
PreSGPRs: 1987505 -> 2416965 (+21.61%); split: -0.12%, +21.73%
PreVGPRs: 1582704 -> 1581579 (-0.07%); split: -0.07%, +0.00%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23946>
 2023-06-30 11:47:03 +00:00
Timur Kristóf
91b28fc621 ac/nir/ngg: Add upper limit to reusable uniforms. 
This is a heuristic to try to reduce SGPR spilling.

While the stats changes on this commit are not impressive,
this is mainly meant to reduce the regressions from the
next few commits which will find more of these
reusable uniforms.

Fossil DB stats on GFX10.3:

Totals from 567 (0.42% of 134913) affected shaders:
VGPRs: 32528 -> 32608 (+0.25%)
SpillSGPRs: 291 -> 247 (-15.12%); split: -49.14%, +34.02%
CodeSize: 3956896 -> 4006552 (+1.25%); split: -0.07%, +1.33%
MaxWaves: 10508 -> 10486 (-0.21%)
Instrs: 756092 -> 764613 (+1.13%); split: -0.09%, +1.22%
Latency: 2533679 -> 2544752 (+0.44%); split: -0.09%, +0.52%
InvThroughput: 733729 -> 733690 (-0.01%); split: -0.06%, +0.06%
VClause: 4853 -> 4861 (+0.16%); split: -1.36%, +1.52%
SClause: 15627 -> 17485 (+11.89%); split: -0.01%, +11.90%
Copies: 62584 -> 65345 (+4.41%); split: -1.61%, +6.02%
Branches: 17356 -> 17405 (+0.28%); split: -0.10%, +0.39%
PreSGPRs: 46758 -> 43465 (-7.04%); split: -8.37%, +1.33%
PreVGPRs: 28944 -> 28931 (-0.04%); split: -0.08%, +0.04%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23946>
 2023-06-30 11:47:03 +00:00
Timur Kristóf
ddeabcc19b ac/nir/ngg: Call nir_convert_to_lcssa before divergence analysis. 
I've recently learned that this is necessary to get
correct results from divergence analysis.

No Fossil DB stats changes on GFX10.3.

Note, when backporting this patch to stable, make sure
the call to nir_convert_to_lcssa is before nir_divergence_analysis,
which may be located in a different place in the stable branch.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23946>
 2023-06-30 11:47:03 +00:00
Erik Faye-Lund
a6da9d7147 amd: use imm-helpers 
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23855>
 2023-06-29 07:08:19 +00:00
Alyssa Rosenzweig
173b9ee69a treewide: Use nir_builder_create more 
perl -p0e 's/nir_builder_init\(&([^,]*), /\1 = nir_builder_create(/g' -i $(git grep -l nir_builder_init)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23860>
 2023-06-27 18:13:02 +00:00
Alyssa Rosenzweig
815efcdf7e nir: Use nir_builder_create 
perl -p0e 's/nir_builder ([^;]*);\s*nir_builder_init\(&\1, /nir_builder \1 = nir_builder_create(/g' -i $(git grep -l nir_builder_init)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23860>
 2023-06-27 18:13:02 +00:00
Konstantin Seurer
17f3f5fa85 amd: Use nir_ instead of nir_build_ helpers 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23858>
 2023-06-27 17:37:54 +00:00
Vitaliy Triang3l Kuzmin
647952c8e3 ac/gpu_info: Check whether the device has the POPS missed overlap bug 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
 2023-06-26 15:58:04 +00:00
Vitaliy Triang3l Kuzmin
b892f31e4d ac: Define POPS collision wave ID argument SGPR 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
 2023-06-26 15:58:03 +00:00
Vitaliy Triang3l Kuzmin
90c88f5933 ac/nir: Support Primitive Ordered Pixel Shading in lower_ps 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>
 2023-06-26 15:58:03 +00:00
Timur Kristóf
cc2307008a ac: Add ac_hw_stage enum. 
This is going to be shared between RADV, RadeonSI and ACO.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23597>
 2023-06-23 12:49:04 +00:00
Marek Olšák
77f5b1cce0 radeonsi: clean up #includes 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23517>
 2023-06-22 08:35:55 +00:00
Caio Oliveira
59cc77f0fa compiler: Move from nir_scope to mesa_scope 
Just moving the enum and performing renames, no behavior change.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23328>
 2023-06-19 23:29:26 +00:00
Marek Olšák
6349d3f537 amd: update shadowed register tables for gfx11 
The new table format is identical to the source to facilitate backporting.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
c8efd2b2cf amd: add a new helper that prints all non-shadowed regs 
for validating our tables against register definitions

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
f43d68d7ac amd: remove ac_check_shadowed_regs 
not useful anymore

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
6e19b6d97f amd: remove non-shadowed register tables 
not useful

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
93dbdde313 amd: fix GPU cache sizes retrieved from the kernel 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
3e5aa9e717 amd: increase the attribute ring size on gfx1103_r1 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:20 +00:00
Marek Olšák
9316258449 amd: rename mid_command_buffer_preemption_enabled -> register_shadowing_required 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:20 +00:00
Marek Olšák
789a3b24c1 amd: improve the IB parser, parse more packets 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:20 +00:00
Marek Olšák
95a85d1b37 amd: update SET_*_REG_PAIRS* documentation and remove radeon_info options 
All released firmware supports the packets.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:20 +00:00
Dave Airlie
562e890f2c ac/radeonsi: add av1 defaults header file from radeonsi 
This just moves this header file so radv can use it.

Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23640>
 2023-06-16 05:53:44 +00:00
Erik Faye-Lund
a593de7cf3 nir: add missed nir_cmp_imm-helpers 
Seems I missed these in my previous round, let's fix them up now!

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23461>
 2023-06-15 13:34:49 +00:00
Erik Faye-Lund
590e191e77 nir: use nir_imm_{true,false} 
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23461>
 2023-06-15 13:34:48 +00:00
Erik Faye-Lund
9e5cd02fae nir: isub -> iadd_imm 
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23461>
 2023-06-15 13:34:48 +00:00
Erik Faye-Lund
8b03a54bcd nir: use more imm-helpers 
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23461>
 2023-06-15 13:34:48 +00:00
Erik Faye-Lund
2a71e332aa nir: use new immediate comparison helpers 
There's plenty of places we can use these new and shiny helpers, so
let's clean up the code a bit.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23460>
 2023-06-15 13:33:58 +02:00
Rhys Perry
4291cc5255 ac: fix PIPE_FORMAT_R11G11B10_FLOAT DST_SEL_W 
Previously, the W component would be incorrect for attributes using this
format when loaded in RADV's vertex shader prologs.

Fixes dEQP-VK.pipeline.fast_linked_library.vertex_input.*b10g11r11*missing_components*

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: 6a2ada93b4 ("ac: add ac_vtx_format_info")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23645>
 2023-06-15 10:33:03 +00:00
Qiang Yu
c36e0e3f79 ac/nir/ngg: fix ngg_gs_clear_primflags crash 
We get current_clear_primflag_idx_var==NULL when stream 0 output
number is known, so output_compile_time_known==true. But we also
need this variable when stream 1~3 output number is unknown or
vertex number is less than a primitive's needs.

Fixes: 60ac5dda82 ("ac: Add NIR lowering for NGG GS.")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23614>
 2023-06-15 05:27:30 +00:00
Yonggang Luo
19196199a8 ac: Replace the usage of pipe_compare_func with compare_func 
PIPE_FUNC_ -> COMPARE_FUNC_
pipe_compare_func -> compare_func

Now include "pipe/p_state.h" is not needed and remove it in ac_nir.h

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23422>
 2023-06-11 06:27:05 +00:00
Qiang Yu
b44bbe7daa ac/nir,radv: add 1 dword to ES/GS item size 
This reduce LDS bank conflict and align with radeonsi,
so we don't assume LDS access 16 byte aligned for both
driver.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23314>
 2023-06-09 02:05:20 +00:00
Qiang Yu
2e1092095a ac/nir,radv: add 1 dword to LS/HS vertex stride 
This reduce LDS bank conflict and align with radeonsi,
so we don't assume LDS access 16 byte aligned for both
driver.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23314>
 2023-06-09 02:05:20 +00:00
Daniel Schürmann
03c4b5b0cc nir,amd: add nir_intrinsic_store_[scalar|vector]_arg_amd to overwrite inputs 
This intrinsic must only be used at top-level CF in order
to not break SSA properties.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
 2023-06-08 00:37:03 +00:00
Daniel Schürmann
1be3a558f2 radv: add remaining RT shader args for separate compilation 
Also wrap RT args into struct {} rt for improved consistency
and remove some 'ray_' prefixes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22096>
 2023-06-08 00:37:03 +00:00
Yogesh Mohan Marimuthu
7761e93c8c ac/gpu_info: rearrange if checks for dcc config 
rearrange the if checks so that there is less if checks
for newer gpus.

v2: fix block comment coding guideline (Marek Olšák)
    simplify gfx9 if condition (Marek Olšák)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23454>
 2023-06-07 19:28:29 +00:00
Yogesh Mohan Marimuthu
6f968f46fe ac/gpu_info: num_cu = 4 and gfx11 enable dcc with retile 
With num_cu = 4 in gfx11 measured power for idle, video playback and observed
power savings, hence enable dcc with retile for gfx11 with num_cu >= 4.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23454>
 2023-06-07 19:28:29 +00:00
Samuel Pitoiset
958cc87954 radv: add support for nir_intrinsic_load_provoking_vtx_amd 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16742>
 2023-06-07 14:40:35 +00:00