ac: Define POPS collision wave ID argument SGPR

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22250>

src/amd/common/ac_shader_args.h

@@ -117,6 +117,7 @@ struct ac_shader_args {
    struct ac_arg ancillary;
    struct ac_arg sample_coverage;
    struct ac_arg prim_mask;
+   struct ac_arg pops_collision_wave_id;
    struct ac_arg load_provoking_vtx;
    struct ac_arg persp_sample;
    struct ac_arg persp_center;

src/amd/compiler/README-ISA.md

@@ -189,6 +189,20 @@ On GFX9, the A16 field enables both 16 bit addresses and derivatives.
 Since GFX10+ these are fully independent of each other, A16 controls 16 bit addresses
 and G16 opcodes 16 bit derivatives. A16 without G16 uses 32 bit derivatives.
 
+## POPS collision wave ID argument (GFX9-10.3)
+
+The 2020 RDNA and RDNA 2 ISA references contain incorrect offsets and widths of
+the fields of the "POPS collision wave ID" SGPR argument.
+
+According to the code generated for Rasterizer Ordered View usage in Direct3D,
+the correct layout is:
+
+* [31]: Whether overlap has occurred.
+* [29:28] (GFX10+) / [28] (GFX9): ID of the packer the wave should be associated
+  with.
+* [25:16]: Newest overlapped wave ID.
+* [9:0]: Current wave ID.
+
 # Hardware Bugs
 
 ## SMEM corrupts VCCZ on SI/CI