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Karmjit Mahil 8c9217e4d8 pvr: Handle PVR_SUB_COMMAND_FLAG_OCCLUSION_QUERY. 
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19957>
 2022-12-01 14:55:55 +00:00
Karmjit Mahil 904a3c4dd7 pvr: Handle PVR_SUB_COMMAND_FLAG_TRANSFER_SERIALIZE_WITH_FRAG. 
The flag was previously named PVR_SUB_COMMAND_FLAG_WAIT_ON_PREVIOUS_FRAG.
Since the next fragment job is also made to wait for the transfer
job to complete, the previous name might have been a bit misleading.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19957>
 2022-12-01 14:55:55 +00:00
Iago Toral Quiroga 4276ec9f2a v3dv: fix job serialization for single sync path 
The idea in the single sync path is that we serialize any job that
needs to wait, however, our ANY queue syncobj only tracks the last job
submitted to any hardware queue, so in practice when we wait on this
we are only serializing against the queue to which we have submitted
the last job, which is not correct.

Fix that by accumulating the last job sync into the ANY queue synbcobj
to ensure that waiting on this syncobj effectively waits on all
hardware queues.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20078>
 2022-12-01 14:08:56 +00:00
Iago Toral Quiroga 95b9293eeb v3dv: make single-sync paths more explicit 
Instead of having functions that return early in multi-sync mode
let's only call them when we are in single-sync mode. I think this
makes the code more explicit.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20078>
 2022-12-01 14:08:56 +00:00
Boris Brezillon 93c084a99b panfrost: Add NATIVE_FENCE_FD cap 
Add support for NATIVE_FENCE_FD so panfrost can advertise support for
EGL_ANDROID_native_fence_sync.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19774>
 2022-12-01 13:52:05 +00:00
Boris Brezillon 8910533a5a panfrost: Move fence code to pan_fence.{c,h} 
Before adding support for NATIVE_FENCE_FD, let's move the fencing logic
to a dedicated file to avoid spreading the code in different places.

Suggested-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19774>
 2022-12-01 13:52:05 +00:00
Boris Brezillon 3bd0f5c502 panfrost: Destroy panfrost_context::syncobj in the ctx desctruction path 
Destroy panfrost_context::syncobj in the ctx desctruction path so we
don't leak a sync object.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19774>
 2022-12-01 13:52:05 +00:00
Qiang Yu 076a333d40 ac/nir/ngg: rename nogs 16bit output mask and var 
To represent 16bit outputs more clearly.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19697>
 2022-12-01 13:10:35 +00:00
Qiang Yu abe2e99e9e ac/nir/ngg: gs support 16bit outputs 
radeonsi uses 16bit varying slots.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19697>
 2022-12-01 13:10:35 +00:00
Qiang Yu 68519891a7 ac/nir/ngg: gs skip check bit size before nir_u2u 
nir_u2u do for us.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19697>
 2022-12-01 13:10:35 +00:00
Qiang Yu d3e20e8834 ac/nir/ngg: gs store output use src_type index for type info 
More precise type info, can be used for 16bit output streamout
to convert 16bit int/uint/float to 32bit one later.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19697>
 2022-12-01 13:10:35 +00:00
Qiang Yu 0cb5ea512f ac/nir/ngg: gs use u_foreach_bit64 to loop all output slots 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19697>
 2022-12-01 13:10:35 +00:00
Qiang Yu 13b75594d7 ac/nir/ngg: reduce nogs 16bit output gather space 
Max slot number for 16bit output is 16, so no need to use
64 array size for them.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19697>
 2022-12-01 13:10:35 +00:00
Jason Ekstrand b67fdcdfbc util/dynarray: Add an append_array helper 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19685>
 2022-12-01 12:26:27 +00:00
Marcin Ślusarz db0e6f9a07 intel/compiler: user payload starts after TUE header & its padding 
All data written by the user are offset by TUE header size.
Without this patch we copy the correct amount of user data, but both
"from" and "to" offsets are wrong.

Fixes: 37e78803d7 ("intel/compiler: use nir_lower_task_shader pass")

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19409>
 2022-12-01 11:19:47 +00:00
Marcin Ślusarz f6adfd6278 nir/lower_task_shader: allow offsetting of the start of payload 
We need this, because on Intel task payload starts with private header,
followed by user-accessible data.

Fixes: 37e78803d7 ("intel/compiler: use nir_lower_task_shader pass")

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19409>
 2022-12-01 11:19:47 +00:00
Marcin Ślusarz 7aaafaa8ae intel/compiler: adjust [store|load]_task_payload.base too 
Base also needs to be converted from bytes to words.

Fixes: c36ae42e4c ("intel/compiler: Use nir_var_mem_task_payload")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19409>
 2022-12-01 11:19:47 +00:00
David Heidelberg d25fa88c6c ci/zink: add lavapipe flakes 
Listed from: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7613
Bug: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7781

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20093>
 2022-12-01 10:59:15 +00:00
Erik Faye-Lund 66b438dca1 zink: do not complain about missing line-stipple support 
We can lower this now, so let's not complain about it...

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19117>
 2022-12-01 10:21:02 +00:00
Erik Faye-Lund d4a5977b17 zink: lower line stipple 
This lowers line-stippling to a combination of geometry and fragment
shaders:

- The geometry shader computes the length of each line-segment, and
  outputs a varying that produces the stipple position.
- The fragment shader looks up the stipple position in the
  stipple-pattern once per sample, and updates the sample mask
  accordingly.

In case there's no geometry shader in place, we create a new
pass-through shader.

We should probably not declare the the push-constants in the pipeline
layout unless they're actually needed. But we already do this
unconditionally for the vertex shader and tesselation push-constants, so
let's do it unconditionally for these as well for now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19117>
 2022-12-01 10:21:02 +00:00
Erik Faye-Lund ad6eedab00 zink: allow to generate any vertex shader stage 
There's times when it's going to be useful to generate geometry shaders
as well, so let's generalize the infrastructure for generated shader
stages a bit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19117>
 2022-12-01 10:21:02 +00:00
Erik Faye-Lund 09ced773fc zink: process non-optimal-key passes first 
Right now, it's only the vertex-shader that needs special handling for
non-optimal keys. That makes it possible to use fallthrough to always
end up in the last-vertex-stage conditional.

But we're about to add special handling for the geometry stage as well,
so let's prepare by splitting the switch-statement in two; one that only
happens for non-optimal keys, and does all the needed processing there,
and one that deals with the rest.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19117>
 2022-12-01 10:21:02 +00:00
Erik Faye-Lund 81fcbfae74 zink: give gs its own shader-key 
Line-stipple lowering is going to need some geometry-shader specific
lowering, so lets give the GS its own shader-key struct.

The GS variant only needs a non-optimal variant, so let's assert that to
be sure.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19117>
 2022-12-01 10:21:02 +00:00
Erik Faye-Lund 85964945e7 zink: emit vars with nir_var_shader_temp mode 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19117>
 2022-12-01 10:21:02 +00:00
Erik Faye-Lund 4b17c099ca zink: add line-stippling lowering passes 
There's two notable limitations here:
- This will viewport-map to viewport #0 only. This is because we need
  the viewport-scale factors, which we'll be uploading using
  push-constants. And we don't want to waste too many of those...
- It's missing a "global" stipple-counter. It doesn't seem like there's
  a portable way of implementing this, so this is going to require a VK
  extension that can be implemented in a hardware-specific way in the
  long run. For now, let's just ignore the global stipple counter.

These two limitations don't seem viable to overcome for now, so but this
is better than nothing.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19117>
 2022-12-01 10:21:02 +00:00
Erik Faye-Lund 9f67e72e84 zink: setup driver-workaround for missing linestipple 
This is not ideal, but at least it should work. In the long run, we
might want to store a bit per mode we're missing, so we can do this
conditionally. But that's quite a bit more complicated, so let's go with
this for now.

The line-stippling logic needs non-optimal shader-keys. So let's drop
some perf on the floor here.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19117>
 2022-12-01 10:21:02 +00:00
David Heidelberg 4f01973034 ci/alpine: disable the job, still occasionally flakes 
See: https://gitlab.freedesktop.org/mesa/mesa/-/jobs/32689466

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20076>
 2022-12-01 09:48:04 +00:00
Emma Anholt d09848d84d glx: Require __DRI_SWRAST >= 4 for doing swrast. 
The only implementer in tree is v4.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20044>
 2022-12-01 09:17:31 +00:00
Emma Anholt 7d36423032 egl: Refactor common error handling for context creation. 
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20044>
 2022-12-01 09:17:31 +00:00
Emma Anholt d592f56746 egl: Bump minimum version of __DRI_SWRAST to 4. 
The only implementer in tree is v4.  This simplifies some bits now that we
always have CreateContextAttribs.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20044>
 2022-12-01 09:17:31 +00:00
Emma Anholt f4af33a36c glx: Require __DRI_DRI2 v2 for doing X11 DRI2. 
The only implementer in tree is v4.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20044>
 2022-12-01 09:17:31 +00:00
Emma Anholt 9fd2901454 egl: Require __DRI_DRI2 v4 if we're to do DRI2. 
The only in-tree implementers are v4.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20044>
 2022-12-01 09:17:30 +00:00
Emma Anholt 0847140e71 egl: Bump __DRI_CONFIG_OPTIONS min version to 2. 
The only implementer in tree is v2.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20044>
 2022-12-01 09:17:30 +00:00
Emma Anholt d92dd4fb2f egl: Bump minimum version of __DRI_IMAGE to 6 and drop version checks. 
All __DRI_IMAGEs in tree are v6+ (lowest being drisw) and implement
createImageFromTexture.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20044>
 2022-12-01 09:17:30 +00:00
Emma Anholt 12d67aabed egl: Bump required version of optional __DRI2_FENCE to 2. 
The only implementer of it in tree is v2, so no need for checks.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20044>
 2022-12-01 09:17:30 +00:00
Emma Anholt bb28bff583 gbm: Bump required __DRI_IMAGE version to 6. 
That's the minimum implemented in tree (gallium swrast).  Drops a few more
version checks.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20044>
 2022-12-01 09:17:30 +00:00
Emma Anholt 65822a31e2 gbm: Drop support for __DRI_DRI2 < 4 and __DRI_SWRAST < 4. 
We're always loading a gallium driver built from this tree, so it's always
v4.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20044>
 2022-12-01 09:17:30 +00:00
Emma Anholt b695727cd3 dri: Add notes on what part of the loader interface are used by Xorg. 
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20044>
 2022-12-01 09:17:30 +00:00
Connor Abbott ccef6d1f5f freedreno/fdl: Set sRGB bit for storage images 
This probably wasn't noticed earlier because tests using sRGB storage
images didn't exist, and we didn't know whether this works, but this
fixes dEQP-VK.image.store.without_format.2d.*_srgb which also proves
that the bit works.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20060>
 2022-12-01 06:07:30 +00:00
Alyssa Rosenzweig 1555ac6f0b agx: Clamp point sizes 
Fixes vs-point_size-zero.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20017>
 2022-12-01 05:58:30 +00:00
Alyssa Rosenzweig 7108619c0d agx: Handle 32-bit gl_FragCoord.zw 
The coefficient register is 16-bit so our builder will make the iter 16-bit too
(maybe not the best design...), force fp32 to match the NIR intrinsic.

Fixes glsl-fs-fragcoord-zw-ortho

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20017>
 2022-12-01 05:58:30 +00:00
Alyssa Rosenzweig eb4187b02d agx: Handle large varying indices 
Fixes glsl-max-varyings.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20017>
 2022-12-01 05:58:30 +00:00
Alyssa Rosenzweig 21f9a72c77 asahi: Support one-sided polygon modes 
We can implement glPolygonMode(GL_FRONT_AND_BACK, ...) natively. What we can't
implement natively are two-sided polygon modes. For that Apple has a nontrivial
lowering which I don't feel the need to implement unless someone actually hits a
workload other than Piglit that uses it.

Vulkan requires only one-sided polygon modes (so this is sufficient there), and
GLES doesn't have polygon modes at all. If an app hits the unimplemented case,
throw a warning like Zink does.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20017>
 2022-12-01 05:58:30 +00:00
Alyssa Rosenzweig 5e15b3c323 asahi: Handle NULL sampler views 
Fixes fp-fragment-position (crash->pass).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20017>
 2022-12-01 05:58:30 +00:00
Alyssa Rosenzweig 63d4f30aa7 asahi: Unset GL_CLAMP 
Use the Zink lowering for the legacy mode, it's not too many instructions on AGX
anyway. Fixes texwrap tests.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20017>
 2022-12-01 05:58:30 +00:00
Alyssa Rosenzweig 47cb8278be asahi: Set frag coord caps correctly 
Fixes ./glsl-arb-fragment-coord-conventions, c.f. 12facf23b1 ("panfrost: Don't set CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER").

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20017>
 2022-12-01 05:58:30 +00:00
Alyssa Rosenzweig 0bd71f7421 asahi: Set PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION 
Fixes arb-provoking-vertex-render.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20017>
 2022-12-01 05:58:30 +00:00
Alyssa Rosenzweig 1bf7d7139f asahi: Set PIPE_CAP_SUPPORTED_PRIM_MODES 
To lower GL_POLYGONS which we don't do natively. Fixes a pile of crashes in
Piglit.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20017>
 2022-12-01 05:58:30 +00:00
Jason Ekstrand 216e5d6e10 hasvk: Drop anv_nir_add_base_work_group_id() 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20068>
 2022-12-01 04:56:48 +00:00
Jason Ekstrand 2806968af8 anv: Drop anv_nir_add_base_work_group_id() 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20068>
 2022-12-01 04:56:48 +00:00