Samuel Pitoiset
85cbdba355
radv: add support for smooth lines
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21587 >
2023-05-22 07:58:35 +00:00
Samuel Pitoiset
8c5eaf2166
radv: lower nir_intrinsic_load_poly_line_smooth_enabled_amd
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21587 >
2023-05-22 07:58:35 +00:00
Samuel Pitoiset
9b2e59abc5
radv: declare a new user SGPR for the dynamic line rasterization mode
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21587 >
2023-05-22 07:58:35 +00:00
Samuel Pitoiset
fcfdb1bb6c
radv: determine if smooth lines can be used in the pipeline key
...
Really complicated to reduce the scope because everything can be
dynamic and with GPL you can't even know if the pipeline draws lines
when compiling the fragment shader.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21587 >
2023-05-22 07:58:35 +00:00
Samuel Pitoiset
9612603aac
radv: track if the smoothLines features is enabled in the device
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21587 >
2023-05-22 07:58:35 +00:00
Samuel Pitoiset
3626c23e85
nir: lower smooth lines conditionally using the new intrinsic
...
RADV will enable/disable this based on a dynamic state.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21587 >
2023-05-22 07:58:34 +00:00
Samuel Pitoiset
759a57d902
radeonsi: lower nir_intrinsic_load_poly_line_smooth_enabled_amd
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21587 >
2023-05-22 07:58:34 +00:00
Samuel Pitoiset
f023ab01e9
nir: add nir_intrinsic_load_poly_line_smooth_enabled
...
To lower smooth lines conditionally in fragment shaders for RADV
because the line rasterization mode in Vulkan can be dynamic.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21587 >
2023-05-22 07:58:34 +00:00
Samuel Pitoiset
15bb9c4b96
radv: remove useless check about USAGE_STORAGE for TC-compat HTILE
...
This should never happen.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23122 >
2023-05-22 07:37:15 +00:00
Samuel Pitoiset
dda7400c0b
radv: disable IMAGE_USAGE_STORAGE with depth-only and stencil-only formats
...
This shouldn't have been enabled at all. Depth-stencil formats were
accidentally disabled but not depth-only or stencil-only formats.
This doesn't seem allowed by DX12 and both AMD/NVIDIA don't enable it.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23122 >
2023-05-22 07:37:15 +00:00
Samuel Pitoiset
3adc9b6722
radv: bump the global VRS image size to maximum supported FB dimensions
...
Super sampling on a 4K screen could hit this. 16k seems pretty big
but this image is only created on RDNA2 and on-demand if VRS attachments
are used without depth-stencil attachments, which should be rare
enough to care.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23105 >
2023-05-22 06:53:03 +00:00
Timothy Arceri
5be8acc1b5
util: add Pixel Game Maker MV workaround
...
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8918
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23095 >
2023-05-22 00:45:45 +00:00
David Heidelberg
8e53b293f8
ci/v3dv: add often timeouting ssbo.layout.3_level_array.std140.column_major_mat4
...
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23153 >
2023-05-21 01:37:23 +02:00
David Heidelberg
4a49892ba3
ci/radv: add another raven flake dEQP-VK.draw.dynamic_rendering.primary_cmd_buff.linear_interpolation
...
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23152 >
2023-05-21 00:51:03 +02:00
Timur Kristóf
b78cf192f0
radv: Clear query dirty flags when flushing them.
...
This is just to make their code consistent with other similar
functions.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20659 >
2023-05-20 19:33:20 +00:00
Timur Kristóf
59c2711800
radv: Move empty dynamic states check to caller.
...
Improves the CPU overhead of radv_emit_all_graphics_states.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20659 >
2023-05-20 19:33:20 +00:00
Timur Kristóf
0d14f7a304
radv: Move indirect check from index buffer emission to caller.
...
This improves the CPU overhead of radv_emit_all_graphics_states.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20659 >
2023-05-20 19:33:20 +00:00
Timur Kristóf
8436fe5af4
radv: Slight refactor to late_scissor_emission.
...
There is no need to set context_roll_without_scissor_emitted
when pipeline, rbplus state, or binning state changes,
because radv_need_late_scissor_emission already checks
their dirty flags.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20659 >
2023-05-20 19:33:20 +00:00
Timur Kristóf
2249ab1daa
radv: Set last_index_type in radv_before_draw.
...
This function is always inlined so checking info->indexed can be
constant folded by the compiler. So it is better to set this
in before_draw.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20659 >
2023-05-20 19:33:20 +00:00
Timur Kristóf
e5c3479fae
radv: Move ignore forced VRS code to more optimal place.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20659 >
2023-05-20 19:33:20 +00:00
Timur Kristóf
4255bd63a4
radv: Compute tess info when emitting patch control points.
...
Some tess info needs to be calculated in the command buffer when
dynamic patch control points are enabled.
Move this calculation from radv_emit_all_graphics states to where
it actually matters.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20659 >
2023-05-20 19:33:20 +00:00
Timur Kristóf
94465f3073
radv: Emit primitive reset index with primitive restart enable.
...
The VGT_MULTI_PRIM_IB_RESET_INDX register has no effect when
primitive restart is disabled, so we can move this out of the
hot path.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20659 >
2023-05-20 19:33:20 +00:00
Alyssa Rosenzweig
04bd1f2cda
asahi: Drop Asahi-as-a-swrast hack
...
Now that we've dropped macOS support in the driver, this is all dead code and
gets garbage collected.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Adam Jackson <ajax@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23138 >
2023-05-20 16:59:16 +00:00
Alyssa Rosenzweig
c284a200b9
gallium: Drop Asahi-as-a-swrast hack
...
Now that we've dropped macOS support, these paths are deadcode.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Adam Jackson <ajax@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23138 >
2023-05-20 16:59:16 +00:00
David Heidelberg
a0b1aa6f00
docs: update crosvm networking options
...
Reviewed-by: Corentin Noël <corentin.noel@collabora.com >
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22892 >
2023-05-20 10:33:48 +02:00
David Heidelberg
27c775d2f7
ci/crosvm: update cmdline options
...
```
[WARN crosvm::crosvm::cmdline] `--host-ip`, `--netmask`, and `--mac` are deprecated;
```
Reviewed-by: Corentin Noël <corentin.noel@collabora.com >
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22892 >
2023-05-20 10:33:43 +02:00
Kenneth Graunke
462ef200d8
nir: Assert that we don't shrink bit-sizes in nir_lower_bit_size()
...
The idea of this pass is to promote small bit-sizes to larger, supported
bit-sizes for certain operations. It doesn't handle emulating large
bit-size operations on smaller bit-sizes; passes like nir_lower_int64
and nir_lower_doubles handle that.
So, assert that we aren't shrinking the bit-size, as this will almost
certainly produce incorrect results.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23123 >
2023-05-19 22:44:37 +00:00
Kenneth Graunke
a2d384a5c0
intel/compiler: Fix 64-bit ufind_msb, find_lsb, and bit_count
...
We only support 32-bit versions of ufind_msb, find_lsb, and bit_count,
so we need to lower them via nir_lower_int64.
Previously, we were failing to do so on platforms older than Icelake
and let those operations fall through to nir_lower_bit_size, which
used a callback to determine it should lower them for bit_size != 32.
However, that pass only emulates small bit-size operations by promoting
them to supported, larger bit-sizes (i.e. 16-bit using 32-bit). It
doesn't support emulating larger operations (i.e. 64-bit using 32-bit).
So nir_lower_bit_size would just u2u32 the 64-bit source, causing us to
flat ignore half of the bits.
Commit 78a195f252 (intel/compiler: Postpone most int64 lowering to
brw_postprocess_nir) provoked this bug on Icelake and later as well,
by moving the nir_lower_int64 handling for ufind_msb until late in
compilation, allowing it to reach nir_lower_bit_size which broke it.
To fix this, we always set int64 lowering for these opcodes, and also
correct the nir_lower_bit_size callback to ignore 64-bit operations.
Cc: mesa-stable
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23123 >
2023-05-19 22:44:37 +00:00
Kenneth Graunke
9293d8e64b
nir: Add find_lsb lowering to nir_lower_int64.
...
Some GPUs can only handle 32-bit find_lsb.
Cc: mesa-stable
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23123 >
2023-05-19 22:44:37 +00:00
Jesse Natalie
25c7181f1b
microsoft/compiler: Better and simpler bitcast reduction
...
Using nir_gather_ssa_types works much better. There's 2 differences
compared to what I was doing before:
1. Multiple passes to allow data to propagate forward and backward
through the whole shader.
2. Allowing a value to have indeterminate types due to having both
int and float usages.
So this deletes some code and gets better results. Wish I'd known
this existed last week.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23062 >
2023-05-19 22:19:38 +00:00
José Roberto de Souza
50c8836bf0
iris: Fix return of xe_batch_submit() when exec fails
...
When intel_ioctl(DRM_IOCTL_XE_EXEC) fails it returns -1 sets errno
with the fail reason.
This fail reason is than is used to know if engine was banned in
context_or_engine_was_banned().
Not adding a fixes tag because Xe is not enabled by default.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23139 >
2023-05-19 21:58:46 +00:00
José Roberto de Souza
fd99b671ff
anv: Nuke ANV_BO_ALLOC_WRITE_COMBINE
...
In i915 if the device has local memory it can only mmap bo with
I915_MMAP_OFFSET_FIXED, so all this set of ANV_BO_ALLOC_WRITE_COMBINE
were useless.
In Xe KMD there is no way to change mmap mode for all GPUs types.
So we can nuke bo->map_wc, ANV_BO_ALLOC_WRITE_COMBINE and related
dead code.
No changes in behavior expected here.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22483 >
2023-05-19 21:34:35 +00:00
José Roberto de Souza
a6c5746b37
anv: Fix ANV_BO_ALLOC_NO_LOCAL_MEM flag
...
VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT is also set in all memory types of
integrated GPUs.
This flag means that memory will be allocated in the most efficient
place for the GPU to access, which is true in integrated GPUs.
However, this was causing ANV_BO_ALLOC_WRITE_COMBINE to be set in
integrated GPUs in the block right below when allocating in the non-cached memory type.
But the comment only talks about lmem, so to still keep the write
combine behavior for iGPUs it was used VkMemoryPropertyFlags in mmap_calc_flags().
Additionally, this was causing anv_bo.has_implicit_ccs to always be
set, which could change the expected behavior of
anv_BindImageMemory2() in MTL.
Fixes: fbd32a04da ("anv: add a third memory type for LLC configuration") added a new heap
Fixes: 582bf4d9f7 ("anv: flag BO for write combine when CPU visible and potentially in lmem")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22483 >
2023-05-19 21:34:35 +00:00
Guilherme Gallo
a148e91edb
ci/lava: Renable SSH sessions for panfrost jobs
...
The devices' IP dictionary for sun50i and vim3 are fixed now.
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23137 >
2023-05-19 20:48:04 +00:00
Konrad Dybcio
22fb6e3906
freedreno: Add some A6/7xx registers
...
Can be found in recent downstream kernels.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22901 >
2023-05-19 20:05:05 +00:00
Lionel Landwerlin
8a1a49aae4
anv: assume context isolation support
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7265
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23102 >
2023-05-19 18:43:01 +00:00
Lionel Landwerlin
eb2b309328
anv: defer binding table block allocation to when necessary
...
There are cases where we never need a binding table block, for example
compute only command buffers.
This has also the nice effect of not having
dEQP-VK.api.object_management.* tests allocate 1Gb of binding tables
which are staying around forever after you run those tests.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8806
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23079 >
2023-05-19 18:11:10 +00:00
norablackcat
29d324cc75
rusticl/types: fix clippy new() not returning Self
...
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23129 >
2023-05-19 17:33:15 +00:00
norablackcat
3d73bd48c0
rusticl/program: fix clippy cast to the same type
...
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23129 >
2023-05-19 17:33:15 +00:00
Alyssa Rosenzweig
2588aa8912
CODEOWNERS: Update panfrost
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23109 >
2023-05-19 17:31:31 +00:00
Alyssa Rosenzweig
a15604e129
pan/decode: Use common hexdump
...
Deduplicate the one I took from asahi.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23088 >
2023-05-19 16:30:44 +00:00
Alyssa Rosenzweig
e5867b0dca
asahi: Use common hexdump utility
...
We just moved it into common.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23088 >
2023-05-19 16:30:44 +00:00
Alyssa Rosenzweig
016a04fcba
util: Add common hex dump utility
...
Useful for debugging.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23088 >
2023-05-19 16:30:44 +00:00
Guilherme Gallo
2f0677dd52
dzn: Skip a few deqp tests which are prone to timeout
...
Some dozen-deqp tests have timed out in a different pipeline. You can
find more information at
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/42064254 .
It appears that the execution of gstreamer on the same Windows runners
simultaneously is causing those particular tests to exceed their
allotted time and fail.
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22870 >
2023-05-19 14:45:17 +00:00
Guilherme Gallo
ebdf8a95b7
ci/lava: Force LAVA panfrost jobs to use UART
...
To ensure proper SSH functioning, the device IP should be added to the
LAVA device dictionary by setting device_ip. LAVA will then map the
value to lava-target-ip.
meson-g12b-a311d-khadas-vim3-cbg-4 has an IP in the dictionary, while
sun50i-h6-pine-h64-cbg-1 and meson-g12b-a311d-khadas-vim3-cbg-2 do not.
Since some devices are not yet properly configured, and device tag
fixing is not an option here, let's temporarily switch to a job
definition based on UART, until it gets fixed.
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22870 >
2023-05-19 14:45:17 +00:00
Guilherme Gallo
80290bcddd
ci/lava: Raise the post test metadata gathering retry count
...
In some devices, it takes a few dozens of seconds to LAVA post process
the job and give final metadata related to the job.
It is worth to wait a little more (up to 30 sec) to make structured log
data more accurate.
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22870 >
2023-05-19 14:45:17 +00:00
Guilherme Gallo
3f5c9077c5
ci/lava: Tweak http-download timeout in SSH based jobs
...
Found a problem with a radv-raven job [1], which took too long to boot
due to a possibly network problem.
If we set a reasonable timeout in the file download related action and
enable LAVA retries in deploy action, we can retry the job if it times
out without the need of re-queuing it.
[1] https://gitlab.freedesktop.org/gallo/mesa/-/jobs/41942090#L227
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22870 >
2023-05-19 14:45:17 +00:00
Guilherme Gallo
4173e4b18f
ci/lava: Hide JWT block during YAML dump
...
Make hide_sensitive_data work in a block fashion, not only hiding the
JWT line, since these tokens are huge, it may break the line when it
extrapolates the YAML dump width.
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22870 >
2023-05-19 14:45:17 +00:00
Guilherme Gallo
703635f059
ci/lava: Only check for the first section marker
...
Some LAVA signals have similar log outputs and the regex associated with
the log section may conflict. Use the policy of the first regex as the
chosen one, otherwise one line may produce two Gitlab sections in a row.
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22870 >
2023-05-19 14:45:17 +00:00
Guilherme Gallo
2cee21ffa5
ci/lava: Distinguish test suites in DUT vs Docker
...
Test suite in the dut is just running SSH server and waiting for the
docker container to start the SSH session. So it can take all the test
cases accumulated duration, not just the init-stage1.sh part anymore.
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22870 >
2023-05-19 14:45:17 +00:00