history:
- 8d83ffe531 ("radv/ci: Add coverage for ETC2 emulation.")
var added to the jobs as `radv_require_etc2`, but not passed to duts
- 567c32b55c ("radv, drirc: rename radv_require_{etc2,astc}")
var renamed to `vk_require_etc2`, except in the jobs
- 5f177018f7 ("radv/ci: re-enable ET2C emulation testing on non-native GPUs")
var renamed in the jobs, but still not passed to duts
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34796>
The dEQP-VK.ray_tracing_pipeline.* ones might need a bigger net to catch
them all, but I didn't want to prematurely ignore too many tests, so for
now I'm just dumping a big list.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34811>
../../../../../../../mesa/src/compiler/nir/nir_lower_gs_intrinsics.c: In function ‘nir_lower_gs_intrinsics’:
../../../../../../../mesa/src/compiler/nir/nir_lower_gs_intrinsics.c:523:93: warning: ‘state’ may be used uninitialized [-Wmaybe-uninitialized]
523 | state.decomposed_primitive_count_vars[i] = state.decomposed_primitive_count_vars[0];
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~
../../../../../../../mesa/src/compiler/nir/nir_lower_gs_intrinsics.c:464:17: note: ‘state’ declared here
464 | struct state state;
| ^~~~~
It's always initialized by the first iteration of the loop, but GCC
doesn't seem to know that.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34785>
../../../../../../../mesa/src/compiler/nir/nir_opt_shrink_vectors.c: In function ‘shrink_dest_to_read_mask’:
../../../../../../../mesa/src/compiler/nir/nir_opt_shrink_vectors.c:140:36: warning: writing 16 bytes into a region of size 15 [-Wstringop-overflow=]
140 | swizzle[first_bit + i] = i;
| ~~~~~~~~~~~~~~~~~~~~~~~^~~
../../../../../../../mesa/src/compiler/nir/nir_opt_shrink_vectors.c:138:18: note: at offset [1, 15] into destination object ‘swizzle’ of size 16
138 | uint8_t swizzle[NIR_MAX_VEC_COMPONENTS] = { 0 };
| ^~~~~~~
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34785>
In function ‘SHA1Update’,
inlined from ‘SHA1Pad’ at ../../../../../../../mesa/src/util/sha1/sha1.c:157:2,
inlined from ‘SHA1Final’ at ../../../../../../../mesa/src/util/sha1/sha1.c:168:2:
../../../../../../../mesa/src/util/sha1/sha1.c:135:25: warning: ‘SHA1Transform’ reading 64 bytes from a region of size 1 [-Wstringop-overread]
135 | SHA1Transform(context->state, (uint8_t *)&data[i]);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../../../../../../../mesa/src/util/sha1/sha1.c:135:25: note: referencing argument 2 of type ‘const uint8_t[64]’ {aka ‘const unsigned char[64]’}
../../../../../../../mesa/src/util/sha1/sha1.c: In function ‘SHA1Final’:
../../../../../../../mesa/src/util/sha1/sha1.c:55:1: note: in a call to function ‘SHA1Transform’
55 | SHA1Transform(uint32_t state[5], const uint8_t buffer[SHA1_BLOCK_LENGTH])
| ^~~~~~~~~~~~~
In function ‘SHA1Update’,
inlined from ‘SHA1Pad’ at ../../../../../../../mesa/src/util/sha1/sha1.c:159:3,
inlined from ‘SHA1Final’ at ../../../../../../../mesa/src/util/sha1/sha1.c:168:2:
../../../../../../../mesa/src/util/sha1/sha1.c:135:25: warning: ‘SHA1Transform’ reading 64 bytes from a region of size 1 [-Wstringop-overread]
135 | SHA1Transform(context->state, (uint8_t *)&data[i]);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../../../../../../../mesa/src/util/sha1/sha1.c:135:25: note: referencing argument 2 of type ‘const uint8_t[64]’ {aka ‘const unsigned char[64]’}
../../../../../../../mesa/src/util/sha1/sha1.c: In function ‘SHA1Final’:
../../../../../../../mesa/src/util/sha1/sha1.c:55:1: note: in a call to function ‘SHA1Transform’
55 | SHA1Transform(uint32_t state[5], const uint8_t buffer[SHA1_BLOCK_LENGTH])
| ^~~~~~~~~~~~~
In function ‘SHA1Update’,
inlined from ‘SHA1Pad’ at ../../../../../../../mesa/src/util/sha1/sha1.c:160:2,
inlined from ‘SHA1Final’ at ../../../../../../../mesa/src/util/sha1/sha1.c:168:2:
../../../../../../../mesa/src/util/sha1/sha1.c:135:25: warning: ‘SHA1Transform’ reading 64 bytes from a region of size 8 [-Wstringop-overread]
135 | SHA1Transform(context->state, (uint8_t *)&data[i]);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../../../../../../../mesa/src/util/sha1/sha1.c:135:25: note: referencing argument 2 of type ‘const uint8_t[64]’ {aka ‘const unsigned char[64]’}
../../../../../../../mesa/src/util/sha1/sha1.c: In function ‘SHA1Final’:
../../../../../../../mesa/src/util/sha1/sha1.c:55:1: note: in a call to function ‘SHA1Transform’
55 | SHA1Transform(uint32_t state[5], const uint8_t buffer[SHA1_BLOCK_LENGTH])
| ^~~~~~~~~~~~~
Reaching this code is impossible for the SHA1Update() calls in SHA1Pad().
Use assume() to inform the compiler of this.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34785>
If the render pass writes depth (with direction) but doesn't set
direction on the GPU, the LRZ buffer cannot be used in subsequent
render passes because the direction information is lost.
Fixes rendering in "Elite Dangerous" game.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34577>
- LOAD results in reusing LRZ from previous renderpasses.
- CLEAR clears LRZ.
- DONT_CARE doesn't clear and doesn't load, so LRZ should be
disabled, that was also the initial idea in code, but conditions
didn't work out and are now fixed.
Fixes glcts tests:
KHR-GL46.packed_depth_stencil.blit.depth24_stencil8
KHR-GL46.packed_depth_stencil.blit.depth32f_stencil8
KHR-GLES3.packed_depth_stencil.blit.depth24_stencil8
KHR-GLES3.packed_depth_stencil.blit.depth32f_stencil8
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34577>
No corresponding warnings left. Tighten the screws to prevent new
warnings from creeping in.
v2:
* The debian-clang-release job still needs
-Wno-error=sometimes-uninitialized.
v3:
* Drop more from debian-arm64-asan & debian-testing-msan jobs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34799>
The S3_PATH_FLUSTER variable already included the archive filename.
Appending `vectors.tar.zst` again during upload caused the file to be
stored at the wrong location, which broke retrieval in subsequent builds.
Fix this behavior and rename the variable to S3_FLUSTER_TAR to make its
purpose clearer and avoid future confusion.
Fixes: a3fb667b1d ("ci: Include Fluster vectors in the rootfs")
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34787>
It's not allowed with user queues, so this will make it simpler to support
user queues.
There are 2 groups of registers:
- those that are never set by radv and radeonsi - those are now set
in the shared preamble
- those that are set by radv but not radeonsi - those are now set
in the radeonsi preamble
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34589>
Mary Guillemard